Message ID | 20240704-tsd-rk3588-nvme-v1-3-fb9e8dde9570@cherry.de |
---|---|
State | Accepted |
Commit | 5670a90a0c9ed6c79128ec240115dbddbd05faee |
Delegated to: | Kever Yang |
Headers | show |
Series | rockchip: enable PCIe/NVMe support for Theobroma RK3588 devices | expand |
Am Donnerstag, 4. Juli 2024, 14:53:33 CEST schrieb Quentin Schulz: > From: Quentin Schulz <quentin.schulz@cherry.de> > > This enables PCIe support on Tiger as exposed on > Q7_PCIE[0123]_[RT]X_[PN] signals and more specifically on the `PCI > Express` connector on the Haikou devkit. > > This was tested with a PCIe to NVMe adapter (e.g. > https://www.amazon.de/dp/B07RZZ3TJG). > > Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de> Reviewed-by: Heiko Stuebner <heiko@sntech.de> pcie enum showed the pci-usb-controller card I plugged in so on a rk3588-tiger Tested-by: Heiko Stuebner <heiko@sntech.de> > --- > configs/tiger-rk3588_defconfig | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/configs/tiger-rk3588_defconfig b/configs/tiger-rk3588_defconfig > index 8fcdd063a3d..8eb1027e449 100644 > --- a/configs/tiger-rk3588_defconfig > +++ b/configs/tiger-rk3588_defconfig > @@ -14,6 +14,7 @@ CONFIG_DEBUG_UART_BASE=0xfeb50000 > CONFIG_DEBUG_UART_CLOCK=24000000 > # CONFIG_DEBUG_UART_BOARD_INIT is not set > CONFIG_SYS_LOAD_ADDR=0xc00800 > +CONFIG_PCI=y > CONFIG_DEBUG_UART=y > CONFIG_FIT=y > CONFIG_FIT_VERBOSE=y > @@ -41,6 +42,7 @@ CONFIG_CMD_I2C=y > # CONFIG_CMD_LOADB is not set > # CONFIG_CMD_LOADS is not set > CONFIG_CMD_MMC=y > +CONFIG_CMD_PCI=y > # CONFIG_CMD_SF is not set > CONFIG_CMD_USB=y > # CONFIG_CMD_SETEXPR is not set > @@ -89,6 +91,8 @@ CONFIG_PHY_MICREL=y > CONFIG_PHY_MICREL_KSZ90X1=y > CONFIG_DWC_ETH_QOS=y > CONFIG_DWC_ETH_QOS_ROCKCHIP=y > +CONFIG_NVME_PCI=y > +CONFIG_PCIE_DW_ROCKCHIP=y > CONFIG_PHY_ROCKCHIP_INNO_USB2=y > CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y > CONFIG_PHY_ROCKCHIP_USBDP=y > >
On 2024/7/4 20:53, Quentin Schulz wrote: > From: Quentin Schulz <quentin.schulz@cherry.de> > > This enables PCIe support on Tiger as exposed on > Q7_PCIE[0123]_[RT]X_[PN] signals and more specifically on the `PCI > Express` connector on the Haikou devkit. > > This was tested with a PCIe to NVMe adapter (e.g. > https://www.amazon.de/dp/B07RZZ3TJG). > > Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Thanks, - Kever > --- > configs/tiger-rk3588_defconfig | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/configs/tiger-rk3588_defconfig b/configs/tiger-rk3588_defconfig > index 8fcdd063a3d..8eb1027e449 100644 > --- a/configs/tiger-rk3588_defconfig > +++ b/configs/tiger-rk3588_defconfig > @@ -14,6 +14,7 @@ CONFIG_DEBUG_UART_BASE=0xfeb50000 > CONFIG_DEBUG_UART_CLOCK=24000000 > # CONFIG_DEBUG_UART_BOARD_INIT is not set > CONFIG_SYS_LOAD_ADDR=0xc00800 > +CONFIG_PCI=y > CONFIG_DEBUG_UART=y > CONFIG_FIT=y > CONFIG_FIT_VERBOSE=y > @@ -41,6 +42,7 @@ CONFIG_CMD_I2C=y > # CONFIG_CMD_LOADB is not set > # CONFIG_CMD_LOADS is not set > CONFIG_CMD_MMC=y > +CONFIG_CMD_PCI=y > # CONFIG_CMD_SF is not set > CONFIG_CMD_USB=y > # CONFIG_CMD_SETEXPR is not set > @@ -89,6 +91,8 @@ CONFIG_PHY_MICREL=y > CONFIG_PHY_MICREL_KSZ90X1=y > CONFIG_DWC_ETH_QOS=y > CONFIG_DWC_ETH_QOS_ROCKCHIP=y > +CONFIG_NVME_PCI=y > +CONFIG_PCIE_DW_ROCKCHIP=y > CONFIG_PHY_ROCKCHIP_INNO_USB2=y > CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y > CONFIG_PHY_ROCKCHIP_USBDP=y >
diff --git a/configs/tiger-rk3588_defconfig b/configs/tiger-rk3588_defconfig index 8fcdd063a3d..8eb1027e449 100644 --- a/configs/tiger-rk3588_defconfig +++ b/configs/tiger-rk3588_defconfig @@ -14,6 +14,7 @@ CONFIG_DEBUG_UART_BASE=0xfeb50000 CONFIG_DEBUG_UART_CLOCK=24000000 # CONFIG_DEBUG_UART_BOARD_INIT is not set CONFIG_SYS_LOAD_ADDR=0xc00800 +CONFIG_PCI=y CONFIG_DEBUG_UART=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y @@ -41,6 +42,7 @@ CONFIG_CMD_I2C=y # CONFIG_CMD_LOADB is not set # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y +CONFIG_CMD_PCI=y # CONFIG_CMD_SF is not set CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set @@ -89,6 +91,8 @@ CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_DWC_ETH_QOS=y CONFIG_DWC_ETH_QOS_ROCKCHIP=y +CONFIG_NVME_PCI=y +CONFIG_PCIE_DW_ROCKCHIP=y CONFIG_PHY_ROCKCHIP_INNO_USB2=y CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y CONFIG_PHY_ROCKCHIP_USBDP=y