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[0/3] RISC-V: AMO testsuite cleanup

Message ID 20240625211418.2322391-1-patrick@rivosinc.com
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Series RISC-V: AMO testsuite cleanup | expand

Message

Patrick O'Neill June 25, 2024, 9:14 p.m. UTC 
This is another round of AMO testcase cleanup. Consolidates a lot of testcases
and unifies the testcase names.

Patrick O'Neill (3):
  RISC-V: Rename amo testcases
  RISC-V: Consolidate amo testcase variants
  RISC-V: Update testcase comments to point to PSABI rather than Table
    A.6

 .../gcc.target/riscv/amo/a-rvwmo-fence.c      | 56 +++++++++++++
 ...le-a-6-load-2.c => a-rvwmo-load-acquire.c} |  2 +-
 ...le-a-6-load-1.c => a-rvwmo-load-relaxed.c} |  2 +-
 ...le-a-6-load-3.c => a-rvwmo-load-seq-cst.c} |  2 +-
 ...pat-3.c => a-rvwmo-store-compat-seq-cst.c} |  3 +-
 ...-a-6-store-1.c => a-rvwmo-store-relaxed.c} |  2 +-
 ...-a-6-store-2.c => a-rvwmo-store-release.c} |  2 +-
 .../gcc.target/riscv/amo/a-ztso-fence.c       | 52 +++++++++++++
 ...le-ztso-load-2.c => a-ztso-load-acquire.c} |  2 +-
 ...le-ztso-load-1.c => a-ztso-load-relaxed.c} |  2 +-
 ...le-ztso-load-3.c => a-ztso-load-seq-cst.c} |  2 +-
 ...tore-3.c => a-ztso-store-compat-seq-cst.c} |  3 +-
 ...-ztso-store-1.c => a-ztso-store-relaxed.c} |  2 +-
 ...-ztso-store-2.c => a-ztso-store-release.c} |  2 +-
 .../riscv/amo/amo-table-a-6-amo-add-1.c       | 17 ----
 .../riscv/amo/amo-table-a-6-amo-add-2.c       | 17 ----
 .../riscv/amo/amo-table-a-6-amo-add-3.c       | 17 ----
 .../riscv/amo/amo-table-a-6-amo-add-4.c       | 17 ----
 .../riscv/amo/amo-table-a-6-amo-add-5.c       | 17 ----
 .../riscv/amo/amo-table-a-6-fence-1.c         | 15 ----
 .../riscv/amo/amo-table-a-6-fence-2.c         | 16 ----
 .../riscv/amo/amo-table-a-6-fence-3.c         | 16 ----
 .../riscv/amo/amo-table-a-6-fence-4.c         | 16 ----
 .../riscv/amo/amo-table-a-6-fence-5.c         | 16 ----
 .../riscv/amo/amo-table-ztso-amo-add-1.c      | 17 ----
 .../riscv/amo/amo-table-ztso-amo-add-2.c      | 17 ----
 .../riscv/amo/amo-table-ztso-amo-add-3.c      | 17 ----
 .../riscv/amo/amo-table-ztso-amo-add-4.c      | 17 ----
 .../riscv/amo/amo-table-ztso-amo-add-5.c      | 17 ----
 .../riscv/amo/amo-table-ztso-fence-1.c        | 15 ----
 .../riscv/amo/amo-table-ztso-fence-2.c        | 15 ----
 .../riscv/amo/amo-table-ztso-fence-3.c        | 15 ----
 .../riscv/amo/amo-table-ztso-fence-4.c        | 15 ----
 .../riscv/amo/amo-table-ztso-fence-5.c        | 16 ----
 .../riscv/amo/amo-zalrsc-amo-add-1.c          | 22 ------
 .../riscv/amo/amo-zalrsc-amo-add-2.c          | 22 ------
 .../riscv/amo/amo-zalrsc-amo-add-3.c          | 22 ------
 .../riscv/amo/amo-zalrsc-amo-add-4.c          | 22 ------
 .../riscv/amo/amo-zalrsc-amo-add-5.c          | 22 ------
 ...zalrsc.c => zaamo-preferred-over-zalrsc.c} |  0
 .../riscv/amo/zaamo-rvwmo-amo-add-int.c       | 57 ++++++++++++++
 .../riscv/amo/zaamo-ztso-amo-add-int.c        | 57 ++++++++++++++
 .../riscv/amo/zalrsc-rvwmo-amo-add-int.c      | 78 +++++++++++++++++++
 ...mo-compare-exchange-int-acquire-release.c} |  2 +-
 ...lrsc-rvwmo-compare-exchange-int-acquire.c} |  2 +-
 ...lrsc-rvwmo-compare-exchange-int-consume.c} |  2 +-
 ...lrsc-rvwmo-compare-exchange-int-relaxed.c} |  2 +-
 ...lrsc-rvwmo-compare-exchange-int-release.c} |  2 +-
 ...mo-compare-exchange-int-seq-cst-relaxed.c} |  3 +-
 ...lrsc-rvwmo-compare-exchange-int-seq-cst.c} |  2 +-
 ...lrsc-rvwmo-subword-amo-add-char-acq-rel.c} |  2 +-
 ...lrsc-rvwmo-subword-amo-add-char-acquire.c} |  2 +-
 ...lrsc-rvwmo-subword-amo-add-char-relaxed.c} |  2 +-
 ...lrsc-rvwmo-subword-amo-add-char-release.c} |  2 +-
 ...lrsc-rvwmo-subword-amo-add-char-seq-cst.c} |  2 +-
 .../riscv/amo/zalrsc-ztso-amo-add-int.c       | 78 +++++++++++++++++++
 ...so-compare-exchange-int-acquire-release.c} |  3 +-
 ...alrsc-ztso-compare-exchange-int-acquire.c} |  2 +-
 ...alrsc-ztso-compare-exchange-int-consume.c} |  2 +-
 ...alrsc-ztso-compare-exchange-int-relaxed.c} |  2 +-
 ...alrsc-ztso-compare-exchange-int-release.c} |  2 +-
 ...so-compare-exchange-int-seq-cst-relaxed.c} |  3 +-
 ...alrsc-ztso-compare-exchange-int-seq-cst.c} |  2 +-
 ...alrsc-ztso-subword-amo-add-char-acq-rel.c} |  2 +-
 ...alrsc-ztso-subword-amo-add-char-acquire.c} |  2 +-
 ...alrsc-ztso-subword-amo-add-char-relaxed.c} |  2 +-
 ...alrsc-ztso-subword-amo-add-char-release.c} |  2 +-
 ...alrsc-ztso-subword-amo-add-char-seq-cst.c} |  2 +-
 68 files changed, 419 insertions(+), 471 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/riscv/amo/a-rvwmo-fence.c
 rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-a-6-load-2.c => a-rvwmo-load-acquire.c} (94%)
 rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-a-6-load-1.c => a-rvwmo-load-relaxed.c} (94%)
 rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-a-6-load-3.c => a-rvwmo-load-seq-cst.c} (94%)
 rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-a-6-store-compat-3.c => a-rvwmo-store-compat-seq-cst.c} (93%)
 rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-a-6-store-1.c => a-rvwmo-store-relaxed.c} (94%)
 rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-a-6-store-2.c => a-rvwmo-store-release.c} (94%)
 create mode 100644 gcc/testsuite/gcc.target/riscv/amo/a-ztso-fence.c
 rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-ztso-load-2.c => a-ztso-load-acquire.c} (94%)
 rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-ztso-load-1.c => a-ztso-load-relaxed.c} (94%)
 rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-ztso-load-3.c => a-ztso-load-seq-cst.c} (94%)
 rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-ztso-store-3.c => a-ztso-store-compat-seq-cst.c} (93%)
 rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-ztso-store-1.c => a-ztso-store-relaxed.c} (94%)
 rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-ztso-store-2.c => a-ztso-store-release.c} (94%)
 delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-amo-add-1.c
 delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-amo-add-2.c
 delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-amo-add-3.c
 delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-amo-add-4.c
 delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-amo-add-5.c
 delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-fence-1.c
 delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-fence-2.c
 delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-fence-3.c
 delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-fence-4.c
 delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-fence-5.c
 delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-amo-add-1.c
 delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-amo-add-2.c
 delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-amo-add-3.c
 delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-amo-add-4.c
 delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-amo-add-5.c
 delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-fence-1.c
 delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-fence-2.c
 delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-fence-3.c
 delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-fence-4.c
 delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-fence-5.c
 delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-zalrsc-amo-add-1.c
 delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-zalrsc-amo-add-2.c
 delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-zalrsc-amo-add-3.c
 delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-zalrsc-amo-add-4.c
 delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-zalrsc-amo-add-5.c
 rename gcc/testsuite/gcc.target/riscv/amo/{amo-zaamo-preferred-over-zalrsc.c => zaamo-preferred-over-zalrsc.c} (100%)
 create mode 100644 gcc/testsuite/gcc.target/riscv/amo/zaamo-rvwmo-amo-add-int.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/amo/zaamo-ztso-amo-add-int.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-amo-add-int.c
 rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-a-6-compare-exchange-6.c => zalrsc-rvwmo-compare-exchange-int-acquire-release.c} (81%)
 rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-a-6-compare-exchange-3.c => zalrsc-rvwmo-compare-exchange-int-acquire.c} (79%)
 rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-a-6-compare-exchange-2.c => zalrsc-rvwmo-compare-exchange-int-consume.c} (79%)
 rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-a-6-compare-exchange-1.c => zalrsc-rvwmo-compare-exchange-int-relaxed.c} (79%)
 rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-a-6-compare-exchange-4.c => zalrsc-rvwmo-compare-exchange-int-release.c} (79%)
 rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-a-6-compare-exchange-7.c => zalrsc-rvwmo-compare-exchange-int-seq-cst-relaxed.c} (72%)
 rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-a-6-compare-exchange-5.c => zalrsc-rvwmo-compare-exchange-int-seq-cst.c} (79%)
 rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-a-6-subword-amo-add-4.c => zalrsc-rvwmo-subword-amo-add-char-acq-rel.c} (77%)
 rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-a-6-subword-amo-add-2.c => zalrsc-rvwmo-subword-amo-add-char-acquire.c} (77%)
 rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-a-6-subword-amo-add-1.c => zalrsc-rvwmo-subword-amo-add-char-relaxed.c} (77%)
 rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-a-6-subword-amo-add-3.c => zalrsc-rvwmo-subword-amo-add-char-release.c} (77%)
 rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-a-6-subword-amo-add-5.c => zalrsc-rvwmo-subword-amo-add-char-seq-cst.c} (77%)
 create mode 100644 gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-amo-add-int.c
 rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-ztso-compare-exchange-6.c => zalrsc-ztso-compare-exchange-int-acquire-release.c} (72%)
 rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-ztso-compare-exchange-3.c => zalrsc-ztso-compare-exchange-int-acquire.c} (79%)
 rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-ztso-compare-exchange-2.c => zalrsc-ztso-compare-exchange-int-consume.c} (79%)
 rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-ztso-compare-exchange-1.c => zalrsc-ztso-compare-exchange-int-relaxed.c} (79%)
 rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-ztso-compare-exchange-4.c => zalrsc-ztso-compare-exchange-int-release.c} (79%)
 rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-ztso-compare-exchange-7.c => zalrsc-ztso-compare-exchange-int-seq-cst-relaxed.c} (72%)
 rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-ztso-compare-exchange-5.c => zalrsc-ztso-compare-exchange-int-seq-cst.c} (79%)
 rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-ztso-subword-amo-add-4.c => zalrsc-ztso-subword-amo-add-char-acq-rel.c} (77%)
 rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-ztso-subword-amo-add-2.c => zalrsc-ztso-subword-amo-add-char-acquire.c} (77%)
 rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-ztso-subword-amo-add-1.c => zalrsc-ztso-subword-amo-add-char-relaxed.c} (77%)
 rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-ztso-subword-amo-add-3.c => zalrsc-ztso-subword-amo-add-char-release.c} (77%)
 rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-ztso-subword-amo-add-5.c => zalrsc-ztso-subword-amo-add-char-seq-cst.c} (77%)

--
2.34.1

Comments

Jeff Law June 25, 2024, 9:34 p.m. UTC | #1 
On 6/25/24 3:14 PM, Patrick O'Neill wrote:
> This is another round of AMO testcase cleanup. Consolidates a lot of testcases
> and unifies the testcase names.
> 
> Patrick O'Neill (3):
>    RISC-V: Rename amo testcases
>    RISC-V: Consolidate amo testcase variants
>    RISC-V: Update testcase comments to point to PSABI rather than Table
>      A.6
[ ... ]
This series is OK for the trunk.

Thanks,
Jeff
Patrick O'Neill June 26, 2024, 4:42 p.m. UTC | #2 
On 6/25/24 14:34, Jeff Law wrote:
>
>
> On 6/25/24 3:14 PM, Patrick O'Neill wrote:
>> This is another round of AMO testcase cleanup. Consolidates a lot of 
>> testcases
>> and unifies the testcase names.
>>
>> Patrick O'Neill (3):
>>    RISC-V: Rename amo testcases
>>    RISC-V: Consolidate amo testcase variants
>>    RISC-V: Update testcase comments to point to PSABI rather than Table
>>      A.6
> [ ... ]
> This series is OK for the trunk.
>
> Thanks,
> Jeff
>
Committed.

Patrick