diff mbox series

RISC-V: Fix unresolved mcpu-[67].c tests

Message ID 20240621113150.10398-1-craig.blackmore@embecosm.com
State New
Headers show
Series RISC-V: Fix unresolved mcpu-[67].c tests | expand

Commit Message

Craig Blackmore June 21, 2024, 11:31 a.m. UTC 
These tests check the sched2 dump, so skip them for optimization levels
that do not enable sched2.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/mcpu-6.c: Skip for -O0, -O1, -Og.
	* gcc.target/riscv/mcpu-7.c: Likewise.
---
 gcc/testsuite/gcc.target/riscv/mcpu-6.c | 1 +
 gcc/testsuite/gcc.target/riscv/mcpu-7.c | 1 +
 2 files changed, 2 insertions(+)

Comments

Kito Cheng June 21, 2024, 11:53 a.m. UTC | #1 
LGTM, thanks :)

On Fri, Jun 21, 2024 at 7:33 PM Craig Blackmore <
craig.blackmore@embecosm.com> wrote:

> These tests check the sched2 dump, so skip them for optimization levels
> that do not enable sched2.
>
> gcc/testsuite/ChangeLog:
>
>         * gcc.target/riscv/mcpu-6.c: Skip for -O0, -O1, -Og.
>         * gcc.target/riscv/mcpu-7.c: Likewise.
> ---
>  gcc/testsuite/gcc.target/riscv/mcpu-6.c | 1 +
>  gcc/testsuite/gcc.target/riscv/mcpu-7.c | 1 +
>  2 files changed, 2 insertions(+)
>
> diff --git a/gcc/testsuite/gcc.target/riscv/mcpu-6.c
> b/gcc/testsuite/gcc.target/riscv/mcpu-6.c
> index 96faa01653e..0126011939f 100644
> --- a/gcc/testsuite/gcc.target/riscv/mcpu-6.c
> +++ b/gcc/testsuite/gcc.target/riscv/mcpu-6.c
> @@ -1,4 +1,5 @@
>  /* { dg-do compile } */
> +/* { dg-skip-if "" { *-*-* } { "-O0" "-O1" "-Og" } } */
>  /* Verify -mtune has higher priority than -mcpu for pipeline model .  */
>  /* { dg-options "-mcpu=sifive-u74 -mtune=rocket -fdump-rtl-sched2-details
> -march=rv32i -mabi=ilp32" } */
>  /* { dg-final { scan-rtl-dump "simple_return\[ \]+:alu" "sched2" } } */
> diff --git a/gcc/testsuite/gcc.target/riscv/mcpu-7.c
> b/gcc/testsuite/gcc.target/riscv/mcpu-7.c
> index 6832323e529..656436343bd 100644
> --- a/gcc/testsuite/gcc.target/riscv/mcpu-7.c
> +++ b/gcc/testsuite/gcc.target/riscv/mcpu-7.c
> @@ -1,4 +1,5 @@
>  /* { dg-do compile } */
> +/* { dg-skip-if "" { *-*-* } { "-O0" "-O1" "-Og" } } */
>  /* Verify -mtune has higher priority than -mcpu for pipeline model .  */
>  /* { dg-options "-mcpu=sifive-s21 -mtune=sifive-u74
> -fdump-rtl-sched2-details -march=rv32i -mabi=ilp32" } */
>  /* { dg-final { scan-rtl-dump "simple_return\[ \]+:sifive_7_B" "sched2" }
> } */
> --
> 2.34.1
>
>
Jeff Law June 23, 2024, 4:07 a.m. UTC | #2 
On 6/21/24 5:31 AM, Craig Blackmore wrote:
> These tests check the sched2 dump, so skip them for optimization levels
> that do not enable sched2.
> 
> gcc/testsuite/ChangeLog:
> 
> 	* gcc.target/riscv/mcpu-6.c: Skip for -O0, -O1, -Og.
> 	* gcc.target/riscv/mcpu-7.c: Likewise.
Thanks.  I've pushed this to the trunk.
jeff
diff mbox series

Patch

diff --git a/gcc/testsuite/gcc.target/riscv/mcpu-6.c b/gcc/testsuite/gcc.target/riscv/mcpu-6.c
index 96faa01653e..0126011939f 100644
--- a/gcc/testsuite/gcc.target/riscv/mcpu-6.c
+++ b/gcc/testsuite/gcc.target/riscv/mcpu-6.c
@@ -1,4 +1,5 @@ 
 /* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-O0" "-O1" "-Og" } } */
 /* Verify -mtune has higher priority than -mcpu for pipeline model .  */
 /* { dg-options "-mcpu=sifive-u74 -mtune=rocket -fdump-rtl-sched2-details -march=rv32i -mabi=ilp32" } */
 /* { dg-final { scan-rtl-dump "simple_return\[ \]+:alu" "sched2" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/mcpu-7.c b/gcc/testsuite/gcc.target/riscv/mcpu-7.c
index 6832323e529..656436343bd 100644
--- a/gcc/testsuite/gcc.target/riscv/mcpu-7.c
+++ b/gcc/testsuite/gcc.target/riscv/mcpu-7.c
@@ -1,4 +1,5 @@ 
 /* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-O0" "-O1" "-Og" } } */
 /* Verify -mtune has higher priority than -mcpu for pipeline model .  */
 /* { dg-options "-mcpu=sifive-s21 -mtune=sifive-u74 -fdump-rtl-sched2-details -march=rv32i -mabi=ilp32" } */
 /* { dg-final { scan-rtl-dump "simple_return\[ \]+:sifive_7_B" "sched2" } } */