| Message ID | 20240428142406.28445-5-heesub@gmail.com |
|---|---|
| State | Accepted |
| Commit | cf03330549562b324302187ee3c3b98a030bac9d |
| Delegated to: | Patrice Chotard |
| Headers | show |
| Series | [1/5] dts: stm32mp157c-odyssey: set PLL4_P to 125Mhz for ETH_CLK | expand |
On 4/28/24 16:24, Heesub Shin wrote: > In Odyssey board, we should reset the PHY chipset, toggling G0 pin. > > Signed-off-by: Heesub Shin <heesub@gmail.com> > --- > arch/arm/dts/stm32mp157c-odyssey.dts | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/arch/arm/dts/stm32mp157c-odyssey.dts b/arch/arm/dts/stm32mp157c-odyssey.dts > index b6210cf8b2..4cc5e07683 100644 > --- a/arch/arm/dts/stm32mp157c-odyssey.dts > +++ b/arch/arm/dts/stm32mp157c-odyssey.dts > @@ -75,6 +75,7 @@ > phy-mode = "rgmii-id"; > max-speed = <1000>; > phy-handle = <&phy0>; > + phy-reset-gpios = <&gpiog 0 GPIO_ACTIVE_LOW>; > st,ext-phyclk; > > mdio0 { Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Thanks Patrice
On 4/28/24 16:24, Heesub Shin wrote: > In Odyssey board, we should reset the PHY chipset, toggling G0 pin. > > Signed-off-by: Heesub Shin <heesub@gmail.com> > --- > arch/arm/dts/stm32mp157c-odyssey.dts | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/arch/arm/dts/stm32mp157c-odyssey.dts b/arch/arm/dts/stm32mp157c-odyssey.dts > index b6210cf8b2..4cc5e07683 100644 > --- a/arch/arm/dts/stm32mp157c-odyssey.dts > +++ b/arch/arm/dts/stm32mp157c-odyssey.dts > @@ -75,6 +75,7 @@ > phy-mode = "rgmii-id"; > max-speed = <1000>; > phy-handle = <&phy0>; > + phy-reset-gpios = <&gpiog 0 GPIO_ACTIVE_LOW>; > st,ext-phyclk; > > mdio0 { Applied to u-boot-stm32/next Thanks Patrice
diff --git a/arch/arm/dts/stm32mp157c-odyssey.dts b/arch/arm/dts/stm32mp157c-odyssey.dts index b6210cf8b2..4cc5e07683 100644 --- a/arch/arm/dts/stm32mp157c-odyssey.dts +++ b/arch/arm/dts/stm32mp157c-odyssey.dts @@ -75,6 +75,7 @@ phy-mode = "rgmii-id"; max-speed = <1000>; phy-handle = <&phy0>; + phy-reset-gpios = <&gpiog 0 GPIO_ACTIVE_LOW>; st,ext-phyclk; mdio0 {
In Odyssey board, we should reset the PHY chipset, toggling G0 pin. Signed-off-by: Heesub Shin <heesub@gmail.com> --- arch/arm/dts/stm32mp157c-odyssey.dts | 1 + 1 file changed, 1 insertion(+)