| Message ID | 20240528170406.353616-10-liujianfeng1994@gmail.com |
|---|---|
| State | Accepted |
| Commit | 7a53abb18325979f8efb8ef3daf76951bc807a22 |
| Delegated to: | Kever Yang |
| Headers | show |
| Series | add ArmSoM Sige7 Rk3588 board | expand |
On 2024/5/29 01:04, Jianfeng Liu wrote: > After we sync USB3 DRD nodes from v6.10-rc1, these obsolete nodes > can be removed. > > Signed-off-by: Jianfeng Liu <liujianfeng1994@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Thanks, - Kever > --- > > (no changes since v1) > > arch/arm/dts/rk3588-u-boot.dtsi | 74 --------------------------- > arch/arm/dts/rk3588s-u-boot.dtsi | 85 -------------------------------- > 2 files changed, 159 deletions(-) > > diff --git a/arch/arm/dts/rk3588-u-boot.dtsi b/arch/arm/dts/rk3588-u-boot.dtsi > index 4623580c610..bfe6645c30e 100644 > --- a/arch/arm/dts/rk3588-u-boot.dtsi > +++ b/arch/arm/dts/rk3588-u-boot.dtsi > @@ -4,77 +4,3 @@ > */ > > #include "rk3588s-u-boot.dtsi" > - > -/ { > - usb_host1_xhci: usb@fc400000 { > - compatible = "rockchip,rk3588-dwc3", "snps,dwc3"; > - reg = <0x0 0xfc400000 0x0 0x400000>; > - interrupts = <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH 0>; > - clocks = <&cru REF_CLK_USB3OTG1>, <&cru SUSPEND_CLK_USB3OTG1>, > - <&cru ACLK_USB3OTG1>; > - clock-names = "ref_clk", "suspend_clk", "bus_clk"; > - dr_mode = "otg"; > - phys = <&u2phy1_otg>, <&usbdp_phy1 PHY_TYPE_USB3>; > - phy-names = "usb2-phy", "usb3-phy"; > - phy_type = "utmi_wide"; > - power-domains = <&power RK3588_PD_USB>; > - resets = <&cru SRST_A_USB3OTG1>; > - snps,dis_enblslpm_quirk; > - snps,dis-u2-freeclk-exists-quirk; > - snps,dis-del-phy-power-chg-quirk; > - snps,dis-tx-ipgap-linecheck-quirk; > - status = "disabled"; > - }; > - > - usbdpphy1_grf: syscon@fd5cc000 { > - compatible = "rockchip,rk3588-usbdpphy-grf", "syscon"; > - reg = <0x0 0xfd5cc000 0x0 0x4000>; > - }; > - > - usb2phy1_grf: syscon@fd5d4000 { > - compatible = "rockchip,rk3588-usb2phy-grf", "syscon", "simple-mfd"; > - reg = <0x0 0xfd5d4000 0x0 0x4000>; > - #address-cells = <1>; > - #size-cells = <1>; > - > - u2phy1: usb2phy@4000 { > - compatible = "rockchip,rk3588-usb2phy"; > - reg = <0x4000 0x10>; > - #clock-cells = <0>; > - clocks = <&cru CLK_USB2PHY_HDPTXRXPHY_REF>; > - clock-names = "phyclk"; > - clock-output-names = "usb480m_phy1"; > - interrupts = <GIC_SPI 394 IRQ_TYPE_LEVEL_HIGH 0>; > - resets = <&cru SRST_OTGPHY_U3_1>, <&cru SRST_P_USB2PHY_U3_1_GRF0>; > - reset-names = "phy", "apb"; > - status = "disabled"; > - > - u2phy1_otg: otg-port { > - #phy-cells = <0>; > - status = "disabled"; > - }; > - }; > - }; > - > - usbdp_phy1: phy@fed90000 { > - compatible = "rockchip,rk3588-usbdp-phy"; > - reg = <0x0 0xfed90000 0x0 0x10000>; > - #phy-cells = <1>; > - clocks = <&cru CLK_USBDPPHY_MIPIDCPPHY_REF>, > - <&cru CLK_USBDP_PHY1_IMMORTAL>, > - <&cru PCLK_USBDPPHY1>, > - <&u2phy1>; > - clock-names = "refclk", "immortal", "pclk", "utmi"; > - resets = <&cru SRST_USBDP_COMBO_PHY1_INIT>, > - <&cru SRST_USBDP_COMBO_PHY1_CMN>, > - <&cru SRST_USBDP_COMBO_PHY1_LANE>, > - <&cru SRST_USBDP_COMBO_PHY1_PCS>, > - <&cru SRST_P_USBDPPHY1>; > - reset-names = "init", "cmn", "lane", "pcs_apb", "pma_apb"; > - rockchip,u2phy-grf = <&usb2phy1_grf>; > - rockchip,usb-grf = <&usb_grf>; > - rockchip,usbdpphy-grf = <&usbdpphy1_grf>; > - rockchip,vo-grf = <&vo0_grf>; > - status = "disabled"; > - }; > -}; > diff --git a/arch/arm/dts/rk3588s-u-boot.dtsi b/arch/arm/dts/rk3588s-u-boot.dtsi > index e9d38d5c83b..09d8b311cec 100644 > --- a/arch/arm/dts/rk3588s-u-boot.dtsi > +++ b/arch/arm/dts/rk3588s-u-boot.dtsi > @@ -19,95 +19,10 @@ > bootph-all; > }; > > - usb_host0_xhci: usb@fc000000 { > - compatible = "rockchip,rk3588-dwc3", "snps,dwc3"; > - reg = <0x0 0xfc000000 0x0 0x400000>; > - interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH 0>; > - clocks = <&cru REF_CLK_USB3OTG0>, <&cru SUSPEND_CLK_USB3OTG0>, > - <&cru ACLK_USB3OTG0>; > - clock-names = "ref_clk", "suspend_clk", "bus_clk"; > - dr_mode = "otg"; > - phys = <&u2phy0_otg>, <&usbdp_phy0 PHY_TYPE_USB3>; > - phy-names = "usb2-phy", "usb3-phy"; > - phy_type = "utmi_wide"; > - power-domains = <&power RK3588_PD_USB>; > - resets = <&cru SRST_A_USB3OTG0>; > - snps,dis_enblslpm_quirk; > - snps,dis-u1-entry-quirk; > - snps,dis-u2-entry-quirk; > - snps,dis-u2-freeclk-exists-quirk; > - snps,dis-del-phy-power-chg-quirk; > - snps,dis-tx-ipgap-linecheck-quirk; > - status = "disabled"; > - }; > - > - vo0_grf: syscon@fd5a6000 { > - compatible = "rockchip,rk3588-vo-grf", "syscon"; > - reg = <0x0 0xfd5a6000 0x0 0x2000>; > - clocks = <&cru PCLK_VO0GRF>; > - }; > - > - usb_grf: syscon@fd5ac000 { > - compatible = "rockchip,rk3588-usb-grf", "syscon"; > - reg = <0x0 0xfd5ac000 0x0 0x4000>; > - }; > - > - usbdpphy0_grf: syscon@fd5c8000 { > - compatible = "rockchip,rk3588-usbdpphy-grf", "syscon"; > - reg = <0x0 0xfd5c8000 0x0 0x4000>; > - }; > - > - usb2phy0_grf: syscon@fd5d0000 { > - compatible = "rockchip,rk3588-usb2phy-grf", "syscon", "simple-mfd"; > - reg = <0x0 0xfd5d0000 0x0 0x4000>; > - #address-cells = <1>; > - #size-cells = <1>; > - > - u2phy0: usb2phy@0 { > - compatible = "rockchip,rk3588-usb2phy"; > - reg = <0x0 0x10>; > - #clock-cells = <0>; > - clocks = <&cru CLK_USB2PHY_HDPTXRXPHY_REF>; > - clock-names = "phyclk"; > - clock-output-names = "usb480m_phy0"; > - interrupts = <GIC_SPI 393 IRQ_TYPE_LEVEL_HIGH 0>; > - resets = <&cru SRST_OTGPHY_U3_0>, <&cru SRST_P_USB2PHY_U3_0_GRF0>; > - reset-names = "phy", "apb"; > - status = "disabled"; > - > - u2phy0_otg: otg-port { > - #phy-cells = <0>; > - status = "disabled"; > - }; > - }; > - }; > - > rng: rng@fe378000 { > compatible = "rockchip,trngv1"; > reg = <0x0 0xfe378000 0x0 0x200>; > }; > - > - usbdp_phy0: phy@fed80000 { > - compatible = "rockchip,rk3588-usbdp-phy"; > - reg = <0x0 0xfed80000 0x0 0x10000>; > - #phy-cells = <1>; > - clocks = <&cru CLK_USBDPPHY_MIPIDCPPHY_REF>, > - <&cru CLK_USBDP_PHY0_IMMORTAL>, > - <&cru PCLK_USBDPPHY0>, > - <&u2phy0>; > - clock-names = "refclk", "immortal", "pclk", "utmi"; > - resets = <&cru SRST_USBDP_COMBO_PHY0_INIT>, > - <&cru SRST_USBDP_COMBO_PHY0_CMN>, > - <&cru SRST_USBDP_COMBO_PHY0_LANE>, > - <&cru SRST_USBDP_COMBO_PHY0_PCS>, > - <&cru SRST_P_USBDPPHY0>; > - reset-names = "init", "cmn", "lane", "pcs_apb", "pma_apb"; > - rockchip,u2phy-grf = <&usb2phy0_grf>; > - rockchip,usb-grf = <&usb_grf>; > - rockchip,usbdpphy-grf = <&usbdpphy0_grf>; > - rockchip,vo-grf = <&vo0_grf>; > - status = "disabled"; > - }; > }; > > #ifdef CONFIG_ROCKCHIP_SPI_IMAGE
diff --git a/arch/arm/dts/rk3588-u-boot.dtsi b/arch/arm/dts/rk3588-u-boot.dtsi index 4623580c610..bfe6645c30e 100644 --- a/arch/arm/dts/rk3588-u-boot.dtsi +++ b/arch/arm/dts/rk3588-u-boot.dtsi @@ -4,77 +4,3 @@ */ #include "rk3588s-u-boot.dtsi" - -/ { - usb_host1_xhci: usb@fc400000 { - compatible = "rockchip,rk3588-dwc3", "snps,dwc3"; - reg = <0x0 0xfc400000 0x0 0x400000>; - interrupts = <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH 0>; - clocks = <&cru REF_CLK_USB3OTG1>, <&cru SUSPEND_CLK_USB3OTG1>, - <&cru ACLK_USB3OTG1>; - clock-names = "ref_clk", "suspend_clk", "bus_clk"; - dr_mode = "otg"; - phys = <&u2phy1_otg>, <&usbdp_phy1 PHY_TYPE_USB3>; - phy-names = "usb2-phy", "usb3-phy"; - phy_type = "utmi_wide"; - power-domains = <&power RK3588_PD_USB>; - resets = <&cru SRST_A_USB3OTG1>; - snps,dis_enblslpm_quirk; - snps,dis-u2-freeclk-exists-quirk; - snps,dis-del-phy-power-chg-quirk; - snps,dis-tx-ipgap-linecheck-quirk; - status = "disabled"; - }; - - usbdpphy1_grf: syscon@fd5cc000 { - compatible = "rockchip,rk3588-usbdpphy-grf", "syscon"; - reg = <0x0 0xfd5cc000 0x0 0x4000>; - }; - - usb2phy1_grf: syscon@fd5d4000 { - compatible = "rockchip,rk3588-usb2phy-grf", "syscon", "simple-mfd"; - reg = <0x0 0xfd5d4000 0x0 0x4000>; - #address-cells = <1>; - #size-cells = <1>; - - u2phy1: usb2phy@4000 { - compatible = "rockchip,rk3588-usb2phy"; - reg = <0x4000 0x10>; - #clock-cells = <0>; - clocks = <&cru CLK_USB2PHY_HDPTXRXPHY_REF>; - clock-names = "phyclk"; - clock-output-names = "usb480m_phy1"; - interrupts = <GIC_SPI 394 IRQ_TYPE_LEVEL_HIGH 0>; - resets = <&cru SRST_OTGPHY_U3_1>, <&cru SRST_P_USB2PHY_U3_1_GRF0>; - reset-names = "phy", "apb"; - status = "disabled"; - - u2phy1_otg: otg-port { - #phy-cells = <0>; - status = "disabled"; - }; - }; - }; - - usbdp_phy1: phy@fed90000 { - compatible = "rockchip,rk3588-usbdp-phy"; - reg = <0x0 0xfed90000 0x0 0x10000>; - #phy-cells = <1>; - clocks = <&cru CLK_USBDPPHY_MIPIDCPPHY_REF>, - <&cru CLK_USBDP_PHY1_IMMORTAL>, - <&cru PCLK_USBDPPHY1>, - <&u2phy1>; - clock-names = "refclk", "immortal", "pclk", "utmi"; - resets = <&cru SRST_USBDP_COMBO_PHY1_INIT>, - <&cru SRST_USBDP_COMBO_PHY1_CMN>, - <&cru SRST_USBDP_COMBO_PHY1_LANE>, - <&cru SRST_USBDP_COMBO_PHY1_PCS>, - <&cru SRST_P_USBDPPHY1>; - reset-names = "init", "cmn", "lane", "pcs_apb", "pma_apb"; - rockchip,u2phy-grf = <&usb2phy1_grf>; - rockchip,usb-grf = <&usb_grf>; - rockchip,usbdpphy-grf = <&usbdpphy1_grf>; - rockchip,vo-grf = <&vo0_grf>; - status = "disabled"; - }; -}; diff --git a/arch/arm/dts/rk3588s-u-boot.dtsi b/arch/arm/dts/rk3588s-u-boot.dtsi index e9d38d5c83b..09d8b311cec 100644 --- a/arch/arm/dts/rk3588s-u-boot.dtsi +++ b/arch/arm/dts/rk3588s-u-boot.dtsi @@ -19,95 +19,10 @@ bootph-all; }; - usb_host0_xhci: usb@fc000000 { - compatible = "rockchip,rk3588-dwc3", "snps,dwc3"; - reg = <0x0 0xfc000000 0x0 0x400000>; - interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH 0>; - clocks = <&cru REF_CLK_USB3OTG0>, <&cru SUSPEND_CLK_USB3OTG0>, - <&cru ACLK_USB3OTG0>; - clock-names = "ref_clk", "suspend_clk", "bus_clk"; - dr_mode = "otg"; - phys = <&u2phy0_otg>, <&usbdp_phy0 PHY_TYPE_USB3>; - phy-names = "usb2-phy", "usb3-phy"; - phy_type = "utmi_wide"; - power-domains = <&power RK3588_PD_USB>; - resets = <&cru SRST_A_USB3OTG0>; - snps,dis_enblslpm_quirk; - snps,dis-u1-entry-quirk; - snps,dis-u2-entry-quirk; - snps,dis-u2-freeclk-exists-quirk; - snps,dis-del-phy-power-chg-quirk; - snps,dis-tx-ipgap-linecheck-quirk; - status = "disabled"; - }; - - vo0_grf: syscon@fd5a6000 { - compatible = "rockchip,rk3588-vo-grf", "syscon"; - reg = <0x0 0xfd5a6000 0x0 0x2000>; - clocks = <&cru PCLK_VO0GRF>; - }; - - usb_grf: syscon@fd5ac000 { - compatible = "rockchip,rk3588-usb-grf", "syscon"; - reg = <0x0 0xfd5ac000 0x0 0x4000>; - }; - - usbdpphy0_grf: syscon@fd5c8000 { - compatible = "rockchip,rk3588-usbdpphy-grf", "syscon"; - reg = <0x0 0xfd5c8000 0x0 0x4000>; - }; - - usb2phy0_grf: syscon@fd5d0000 { - compatible = "rockchip,rk3588-usb2phy-grf", "syscon", "simple-mfd"; - reg = <0x0 0xfd5d0000 0x0 0x4000>; - #address-cells = <1>; - #size-cells = <1>; - - u2phy0: usb2phy@0 { - compatible = "rockchip,rk3588-usb2phy"; - reg = <0x0 0x10>; - #clock-cells = <0>; - clocks = <&cru CLK_USB2PHY_HDPTXRXPHY_REF>; - clock-names = "phyclk"; - clock-output-names = "usb480m_phy0"; - interrupts = <GIC_SPI 393 IRQ_TYPE_LEVEL_HIGH 0>; - resets = <&cru SRST_OTGPHY_U3_0>, <&cru SRST_P_USB2PHY_U3_0_GRF0>; - reset-names = "phy", "apb"; - status = "disabled"; - - u2phy0_otg: otg-port { - #phy-cells = <0>; - status = "disabled"; - }; - }; - }; - rng: rng@fe378000 { compatible = "rockchip,trngv1"; reg = <0x0 0xfe378000 0x0 0x200>; }; - - usbdp_phy0: phy@fed80000 { - compatible = "rockchip,rk3588-usbdp-phy"; - reg = <0x0 0xfed80000 0x0 0x10000>; - #phy-cells = <1>; - clocks = <&cru CLK_USBDPPHY_MIPIDCPPHY_REF>, - <&cru CLK_USBDP_PHY0_IMMORTAL>, - <&cru PCLK_USBDPPHY0>, - <&u2phy0>; - clock-names = "refclk", "immortal", "pclk", "utmi"; - resets = <&cru SRST_USBDP_COMBO_PHY0_INIT>, - <&cru SRST_USBDP_COMBO_PHY0_CMN>, - <&cru SRST_USBDP_COMBO_PHY0_LANE>, - <&cru SRST_USBDP_COMBO_PHY0_PCS>, - <&cru SRST_P_USBDPPHY0>; - reset-names = "init", "cmn", "lane", "pcs_apb", "pma_apb"; - rockchip,u2phy-grf = <&usb2phy0_grf>; - rockchip,usb-grf = <&usb_grf>; - rockchip,usbdpphy-grf = <&usbdpphy0_grf>; - rockchip,vo-grf = <&vo0_grf>; - status = "disabled"; - }; }; #ifdef CONFIG_ROCKCHIP_SPI_IMAGE
After we sync USB3 DRD nodes from v6.10-rc1, these obsolete nodes can be removed. Signed-off-by: Jianfeng Liu <liujianfeng1994@gmail.com> --- (no changes since v1) arch/arm/dts/rk3588-u-boot.dtsi | 74 --------------------------- arch/arm/dts/rk3588s-u-boot.dtsi | 85 -------------------------------- 2 files changed, 159 deletions(-)