Message ID | orbk61n1v1.fsf_-_@lxoliva.fsfla.org |
---|---|
State | New |
Headers | show |
Series | [v2,testsuite,powerpc] adjust -m32 counts for fold-vec-extract* | expand |
On Apr 22, 2024, Alexandre Oliva <oliva@adacore.com> wrote: > for gcc/testsuite/ChangeLog > PR testsuite/101169 > * gcc.target/powerpc/fold-vec-extract-double.p7.c: Adjust addi > counts for ilp32. > * gcc.target/powerpc/fold-vec-extract-float.p7.c: Likewise. > * gcc.target/powerpc/fold-vec-extract-float.p8.c: Likewise. > * gcc.target/powerpc/fold-vec-extract-int.p7.c: Likewise. > * gcc.target/powerpc/fold-vec-extract-int.p8.c: Likewise. > * gcc.target/powerpc/fold-vec-extract-short.p7.c: Likewise. > * gcc.target/powerpc/fold-vec-extract-short.p8.c: Likewise. Ping? https://gcc.gnu.org/pipermail/gcc-patches/2024-April/649830.html
Hi, on 2024/4/22 18:11, Alexandre Oliva wrote: > Ping?-ish > https://gcc.gnu.org/pipermail/gcc-patches/2023-May/619678.html > > It's that time of the year again. The good news is that this is the > last patch in my ppc*-vxworks7* set ;-) > > On May 25, 2023, Segher Boessenkool <segher@kernel.crashing.org> wrote: > >> On Thu, May 25, 2023 at 10:55:37AM -0300, Alexandre Oliva wrote: >>> I've actually identified the corresponding change to the >>> lp64 tests, compared the effects of the codegen changes, and concluded >>> the tests needed this changing for ilp32 to keep on testing for the same >>> thing after code changes brought about by changes that AFAICT had been >>> well understood when making the lp64 adjustments. > >>> /* -m32 target has an 'add' in place of one of the 'addi'. */ >>> -/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 2 { target lp64 } } } */ >>> -/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 3 { target ilp32 } } } */ >>> +/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 2 } } */ > >> Just {\madd} or more conservative {\maddi?\M} then? > > I've made these changes in the v2 below. > > Codegen changes caused add instruction count mismatches on > ppc-*-linux-gnu and other 32-bit ppc targets. At some point the > expected counts were adjusted for lp64, but ilp32 differences > remained, and published test results confirm it. > > Regstrapped on x86_64-linux-gnu and ppc64el-linux-gnu. Also tested with > gcc-13 on ppc64-vx7r2 and ppc-vx7r2. Ok to install? > > > for gcc/testsuite/ChangeLog > > PR testsuite/101169 > * gcc.target/powerpc/fold-vec-extract-double.p7.c: Adjust addi > counts for ilp32. > * gcc.target/powerpc/fold-vec-extract-float.p7.c: Likewise. > * gcc.target/powerpc/fold-vec-extract-float.p8.c: Likewise. > * gcc.target/powerpc/fold-vec-extract-int.p7.c: Likewise. > * gcc.target/powerpc/fold-vec-extract-int.p8.c: Likewise. > * gcc.target/powerpc/fold-vec-extract-short.p7.c: Likewise. > * gcc.target/powerpc/fold-vec-extract-short.p8.c: Likewise. > --- > .../powerpc/fold-vec-extract-double.p7.c | 5 ++--- > .../gcc.target/powerpc/fold-vec-extract-float.p7.c | 5 ++--- > .../gcc.target/powerpc/fold-vec-extract-float.p8.c | 2 +- > .../gcc.target/powerpc/fold-vec-extract-int.p7.c | 3 +-- > .../gcc.target/powerpc/fold-vec-extract-int.p8.c | 2 +- > .../gcc.target/powerpc/fold-vec-extract-short.p7.c | 3 +-- > .../gcc.target/powerpc/fold-vec-extract-short.p8.c | 2 +- > 7 files changed, 9 insertions(+), 13 deletions(-) > > diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-double.p7.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-double.p7.c > index 3cae644b90b71..e69d9253e2d28 100644 > --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-double.p7.c > +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-double.p7.c > @@ -13,12 +13,11 @@ > /* { dg-final { scan-assembler-times {\mxxpermdi\M} 1 } } */ > /* { dg-final { scan-assembler-times {\mli\M} 1 } } */ > /* -m32 target has an 'add' in place of one of the 'addi'. */ > -/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 2 { target lp64 } } } */ > -/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 3 { target ilp32 } } } */ > +/* { dg-final { scan-assembler-times {\maddi?\M} 2 } } */ > /* -m32 target has a rlwinm in place of a rldic . */ > /* { dg-final { scan-assembler-times {\mrldic\M|\mrlwinm\M} 1 } } */ > /* { dg-final { scan-assembler-times {\mstxvd2x\M} 1 } } */ > -/* { dg-final { scan-assembler-times {\mlfdx\M|\mlfd\M} 1 } } */ > +/* { dg-final { scan-assembler-times {\mlfdx?\M} 1 } } */ > > #include <altivec.h> > > diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p7.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p7.c > index 59a4979457dcb..9ff197a704906 100644 > --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p7.c > +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p7.c > @@ -12,13 +12,12 @@ > /* { dg-final { scan-assembler-times {\mxscvspdp\M} 1 } } */ > /* { dg-final { scan-assembler-times {\mli\M} 1 } } */ > /* -m32 as an add in place of an addi. */ > -/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 2 { target lp64 } } } */ > -/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 3 { target ilp32 } } } */ > +/* { dg-final { scan-assembler-times {\maddi?\M} 2 } } */ > /* { dg-final { scan-assembler-times {\mstxvd2x\M|\mstvx\M|\mstxv\M} 1 } } */ > /* -m32 uses rlwinm in place of rldic */ > /* { dg-final { scan-assembler-times {\mrldic\M|\mrlwinm\M} 1 } } */ > /* -m32 has lfs in place of lfsx */ > -/* { dg-final { scan-assembler-times {\mlfsx\M|\mlfs\M} 1 } } */ > +/* { dg-final { scan-assembler-times {\mlfsx?\M} 1 } } */ > > #include <altivec.h> > > diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p8.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p8.c > index ce4e43c1fb462..cd80c5e1b19c6 100644 > --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p8.c > +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p8.c > @@ -26,7 +26,7 @@ > /* { dg-final { scan-assembler-times {\mstxvd2x\M} 1 { target ilp32 } } } */ > /* { dg-final { scan-assembler-times {\madd\M} 1 { target ilp32 } } } */ Nit: similar to what this patch changes above, this line can be merged to ... > /* { dg-final { scan-assembler-times {\mlfs\M} 1 { target ilp32 } } } */ > -/* { dg-final { scan-assembler-times {\maddi\M} 2 { target ilp32 } } } */ > +/* { dg-final { scan-assembler-times {\maddi\M} 1 { target ilp32 } } } */ this line with "{\maddi?\M} 2". > > > #include <altivec.h> > diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p7.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p7.c > index 3729a1646e9c9..cc3c803b49cf6 100644 > --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p7.c > +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p7.c > @@ -10,8 +10,7 @@ > // P7 variables: li, addi, stxvw4x, lwa/lwz > > /* { dg-final { scan-assembler-times {\mli\M} 6 } } */ > -/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 9 { target lp64 } } } */ > -/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 12 { target ilp32 } } } */ > +/* { dg-final { scan-assembler-times {\maddi?\M} 9 } } */ > /* { dg-final { scan-assembler-times {\mstxvw4x\M|\mstvx\M|\mstxv\M} 6 } } */ > /* { dg-final { scan-assembler-times {\mrldic\M|\mrlwinm\M} 3 } } */ > /* { dg-final { scan-assembler-times {\mlwz\M|\mlwa\M|\mlwzx\M|\mlwax\M} 6 } } */ > diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p8.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p8.c > index 152fbdd041bec..67db0306df92d 100644 > --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p8.c > +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p8.c > @@ -30,7 +30,7 @@ > /* { dg-final { scan-assembler-times {\mstxvw4x\M} 6 { target ilp32 } } } */ > /* { dg-final { scan-assembler-times {\madd\M} 3 { target ilp32 } } } */ Ditto... > /* { dg-final { scan-assembler-times {\mlwz\M} 6 { target ilp32 } } } */ > -/* { dg-final { scan-assembler-times {\maddi\M} 9 { target ilp32 } } } */ > +/* { dg-final { scan-assembler-times {\maddi\M} 6 { target ilp32 } } } */ > > > > diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p7.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p7.c > index a495d9f3928fa..e16277df847bc 100644 > --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p7.c > +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p7.c > @@ -10,8 +10,7 @@ > // P7 (be) constants: li, addi, stxvw4x, lha/lhz > > /* { dg-final { scan-assembler-times {\mli\M} 6 } } */ > -/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 9 { target lp64 } } } */ > -/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 12 { target ilp32 } } } */ > +/* { dg-final { scan-assembler-times {\maddi?\M} 9 } } */ > /* { dg-final { scan-assembler-times {\mrldic\M|\mrlwinm\M} 3 } } */ > /* { dg-final { scan-assembler-times {\mstxvw4x\M|\mstvx\M} 6 } } */ > /* { dg-final { scan-assembler-times "lhz|lha|lhzx|lhax" 6 } } */ > diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p8.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p8.c > index 9eabc5068d495..45a07d10ea96a 100644 > --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p8.c > +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p8.c > @@ -32,7 +32,7 @@ > /* add and rlwinm instructions only on the variable tests. */ > /* { dg-final { scan-assembler-times {\madd\M} 3 { target ilp32 } } } */ Ditto. OK with these nits tweaked and re-tested well, thanks! BR, Kewen > /* { dg-final { scan-assembler-times "rlwinm" 3 { target ilp32 } } } */ > -/* { dg-final { scan-assembler-times {\maddi\M} 9 { target ilp32 } } } */ > +/* { dg-final { scan-assembler-times {\maddi\M} 6 { target ilp32 } } } */ > /* { dg-final { scan-assembler-times {\mlha\M|\mlhz\M} 6 { target ilp32 } } } */ > > > >
On May 27, 2024, "Kewen.Lin" <linkw@linux.ibm.com> wrote:
> OK with these nits tweaked and re-tested well, thanks!
Thanks, here's what I've retested on ppc64le-linux-gnu, and will push
onto trunk eventually, after retesting also on ppc- and ppc64-vx7r2:
[testsuite] [powerpc] adjust -m32 counts for fold-vec-extract*
Codegen changes caused add instruction count mismatches on
ppc-*-linux-gnu and other 32-bit ppc targets. At some point the
expected counts were adjusted for lp64, but ilp32 differences
remained, and published test results confirm it.
for gcc/testsuite/ChangeLog
PR testsuite/101169
* gcc.target/powerpc/fold-vec-extract-double.p7.c: Adjust addi
counts for ilp32.
* gcc.target/powerpc/fold-vec-extract-float.p7.c: Likewise.
* gcc.target/powerpc/fold-vec-extract-float.p8.c: Likewise.
* gcc.target/powerpc/fold-vec-extract-int.p7.c: Likewise.
* gcc.target/powerpc/fold-vec-extract-int.p8.c: Likewise.
* gcc.target/powerpc/fold-vec-extract-short.p7.c: Likewise.
* gcc.target/powerpc/fold-vec-extract-short.p8.c: Likewise.
---
.../powerpc/fold-vec-extract-double.p7.c | 5 ++---
.../gcc.target/powerpc/fold-vec-extract-float.p7.c | 5 ++---
.../gcc.target/powerpc/fold-vec-extract-float.p8.c | 3 +--
.../gcc.target/powerpc/fold-vec-extract-int.p7.c | 3 +--
.../gcc.target/powerpc/fold-vec-extract-int.p8.c | 3 +--
.../gcc.target/powerpc/fold-vec-extract-short.p7.c | 3 +--
.../gcc.target/powerpc/fold-vec-extract-short.p8.c | 3 +--
7 files changed, 9 insertions(+), 16 deletions(-)
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-double.p7.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-double.p7.c
index 3cae644b90b71..e69d9253e2d28 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-double.p7.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-double.p7.c
@@ -13,12 +13,11 @@
/* { dg-final { scan-assembler-times {\mxxpermdi\M} 1 } } */
/* { dg-final { scan-assembler-times {\mli\M} 1 } } */
/* -m32 target has an 'add' in place of one of the 'addi'. */
-/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 2 { target lp64 } } } */
-/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 3 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\maddi?\M} 2 } } */
/* -m32 target has a rlwinm in place of a rldic . */
/* { dg-final { scan-assembler-times {\mrldic\M|\mrlwinm\M} 1 } } */
/* { dg-final { scan-assembler-times {\mstxvd2x\M} 1 } } */
-/* { dg-final { scan-assembler-times {\mlfdx\M|\mlfd\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mlfdx?\M} 1 } } */
#include <altivec.h>
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p7.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p7.c
index f7c06e9610914..ab03cd8adb00e 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p7.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p7.c
@@ -12,13 +12,12 @@
/* { dg-final { scan-assembler-times {\mxscvspdp\M} 1 } } */
/* { dg-final { scan-assembler-times {\mli\M} 1 } } */
/* -m32 as an add in place of an addi. */
-/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 2 { target lp64 } } } */
-/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 3 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\maddi?\M} 2 } } */
/* { dg-final { scan-assembler-times {\mstxvd2x\M|\mstvx\M|\mstxv\M} 1 } } */
/* -m32 uses rlwinm in place of rldic */
/* { dg-final { scan-assembler-times {\mrldic\M|\mrlwinm\M} 1 } } */
/* -m32 has lfs in place of lfsx */
-/* { dg-final { scan-assembler-times {\mlfsx\M|\mlfs\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mlfsx?\M} 1 } } */
#include <altivec.h>
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p8.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p8.c
index 6819d271c539d..ce435d82c1645 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p8.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p8.c
@@ -24,9 +24,8 @@
/* { dg-final { scan-assembler-times {\mli\M} 1 { target ilp32 } } } */
/* { dg-final { scan-assembler-times {\mrlwinm\M} 1 { target ilp32 } } } */
/* { dg-final { scan-assembler-times {\mstxvd2x\M} 1 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times {\madd\M} 1 { target ilp32 } } } */
/* { dg-final { scan-assembler-times {\mlfs\M} 1 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times {\maddi\M} 2 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\maddi?\M} 2 { target ilp32 } } } */
#include <altivec.h>
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p7.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p7.c
index 5163692695339..20e3d25348952 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p7.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p7.c
@@ -10,8 +10,7 @@
// P7 variables: li, addi, stxvw4x, lwa/lwz
/* { dg-final { scan-assembler-times {\mli\M} 6 } } */
-/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 9 { target lp64 } } } */
-/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 12 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\maddi?\M} 9 } } */
/* { dg-final { scan-assembler-times {\mstxvw4x\M|\mstvx\M|\mstxv\M} 6 } } */
/* { dg-final { scan-assembler-times {\mrldic\M|\mrlwinm\M} 3 } } */
/* { dg-final { scan-assembler-times {\mlwz\M|\mlwa\M|\mlwzx\M|\mlwax\M} 6 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p8.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p8.c
index 67fa89d9e02e6..81d95e456bf01 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p8.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p8.c
@@ -28,9 +28,8 @@
/* { dg-final { scan-assembler-times {\mli\M} 6 { target ilp32 } } } */
/* { dg-final { scan-assembler-times {\mrlwinm\M} 3 { target ilp32 } } } */
/* { dg-final { scan-assembler-times {\mstxvw4x\M} 6 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times {\madd\M} 3 { target ilp32 } } } */
/* { dg-final { scan-assembler-times {\mlwz\M} 6 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times {\maddi\M} 9 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\maddi?\M} 9 { target ilp32 } } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p7.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p7.c
index 5f3b11fc5c10e..d8ed54703c9ea 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p7.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p7.c
@@ -10,8 +10,7 @@
// P7 (be) constants: li, addi, stxvw4x, lha/lhz
/* { dg-final { scan-assembler-times {\mli\M} 6 } } */
-/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 9 { target lp64 } } } */
-/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 12 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\maddi?\M} 9 } } */
/* { dg-final { scan-assembler-times {\mrldic\M|\mrlwinm\M} 3 } } */
/* { dg-final { scan-assembler-times {\mstxvw4x\M|\mstvx\M} 6 } } */
/* { dg-final { scan-assembler-times "lhz|lha|lhzx|lhax" 6 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p8.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p8.c
index 0db99933871ff..af741c1a7ab83 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p8.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p8.c
@@ -30,9 +30,8 @@
/* { dg-final { scan-assembler-times {\mli\M} 6 { target ilp32 } } } */
/* { dg-final { scan-assembler-times "stxvw4x" 6 { target ilp32 } } } */
/* add and rlwinm instructions only on the variable tests. */
-/* { dg-final { scan-assembler-times {\madd\M} 3 { target ilp32 } } } */
/* { dg-final { scan-assembler-times "rlwinm" 3 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times {\maddi\M} 9 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\maddi?\M} 9 { target ilp32 } } } */
/* { dg-final { scan-assembler-times {\mlha\M|\mlhz\M} 6 { target ilp32 } } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-double.p7.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-double.p7.c index 3cae644b90b71..e69d9253e2d28 100644 --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-double.p7.c +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-double.p7.c @@ -13,12 +13,11 @@ /* { dg-final { scan-assembler-times {\mxxpermdi\M} 1 } } */ /* { dg-final { scan-assembler-times {\mli\M} 1 } } */ /* -m32 target has an 'add' in place of one of the 'addi'. */ -/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 2 { target lp64 } } } */ -/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 3 { target ilp32 } } } */ +/* { dg-final { scan-assembler-times {\maddi?\M} 2 } } */ /* -m32 target has a rlwinm in place of a rldic . */ /* { dg-final { scan-assembler-times {\mrldic\M|\mrlwinm\M} 1 } } */ /* { dg-final { scan-assembler-times {\mstxvd2x\M} 1 } } */ -/* { dg-final { scan-assembler-times {\mlfdx\M|\mlfd\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mlfdx?\M} 1 } } */ #include <altivec.h> diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p7.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p7.c index 59a4979457dcb..9ff197a704906 100644 --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p7.c +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p7.c @@ -12,13 +12,12 @@ /* { dg-final { scan-assembler-times {\mxscvspdp\M} 1 } } */ /* { dg-final { scan-assembler-times {\mli\M} 1 } } */ /* -m32 as an add in place of an addi. */ -/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 2 { target lp64 } } } */ -/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 3 { target ilp32 } } } */ +/* { dg-final { scan-assembler-times {\maddi?\M} 2 } } */ /* { dg-final { scan-assembler-times {\mstxvd2x\M|\mstvx\M|\mstxv\M} 1 } } */ /* -m32 uses rlwinm in place of rldic */ /* { dg-final { scan-assembler-times {\mrldic\M|\mrlwinm\M} 1 } } */ /* -m32 has lfs in place of lfsx */ -/* { dg-final { scan-assembler-times {\mlfsx\M|\mlfs\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mlfsx?\M} 1 } } */ #include <altivec.h> diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p8.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p8.c index ce4e43c1fb462..cd80c5e1b19c6 100644 --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p8.c +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p8.c @@ -26,7 +26,7 @@ /* { dg-final { scan-assembler-times {\mstxvd2x\M} 1 { target ilp32 } } } */ /* { dg-final { scan-assembler-times {\madd\M} 1 { target ilp32 } } } */ /* { dg-final { scan-assembler-times {\mlfs\M} 1 { target ilp32 } } } */ -/* { dg-final { scan-assembler-times {\maddi\M} 2 { target ilp32 } } } */ +/* { dg-final { scan-assembler-times {\maddi\M} 1 { target ilp32 } } } */ #include <altivec.h> diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p7.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p7.c index 3729a1646e9c9..cc3c803b49cf6 100644 --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p7.c +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p7.c @@ -10,8 +10,7 @@ // P7 variables: li, addi, stxvw4x, lwa/lwz /* { dg-final { scan-assembler-times {\mli\M} 6 } } */ -/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 9 { target lp64 } } } */ -/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 12 { target ilp32 } } } */ +/* { dg-final { scan-assembler-times {\maddi?\M} 9 } } */ /* { dg-final { scan-assembler-times {\mstxvw4x\M|\mstvx\M|\mstxv\M} 6 } } */ /* { dg-final { scan-assembler-times {\mrldic\M|\mrlwinm\M} 3 } } */ /* { dg-final { scan-assembler-times {\mlwz\M|\mlwa\M|\mlwzx\M|\mlwax\M} 6 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p8.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p8.c index 152fbdd041bec..67db0306df92d 100644 --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p8.c +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p8.c @@ -30,7 +30,7 @@ /* { dg-final { scan-assembler-times {\mstxvw4x\M} 6 { target ilp32 } } } */ /* { dg-final { scan-assembler-times {\madd\M} 3 { target ilp32 } } } */ /* { dg-final { scan-assembler-times {\mlwz\M} 6 { target ilp32 } } } */ -/* { dg-final { scan-assembler-times {\maddi\M} 9 { target ilp32 } } } */ +/* { dg-final { scan-assembler-times {\maddi\M} 6 { target ilp32 } } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p7.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p7.c index a495d9f3928fa..e16277df847bc 100644 --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p7.c +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p7.c @@ -10,8 +10,7 @@ // P7 (be) constants: li, addi, stxvw4x, lha/lhz /* { dg-final { scan-assembler-times {\mli\M} 6 } } */ -/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 9 { target lp64 } } } */ -/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 12 { target ilp32 } } } */ +/* { dg-final { scan-assembler-times {\maddi?\M} 9 } } */ /* { dg-final { scan-assembler-times {\mrldic\M|\mrlwinm\M} 3 } } */ /* { dg-final { scan-assembler-times {\mstxvw4x\M|\mstvx\M} 6 } } */ /* { dg-final { scan-assembler-times "lhz|lha|lhzx|lhax" 6 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p8.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p8.c index 9eabc5068d495..45a07d10ea96a 100644 --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p8.c +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p8.c @@ -32,7 +32,7 @@ /* add and rlwinm instructions only on the variable tests. */ /* { dg-final { scan-assembler-times {\madd\M} 3 { target ilp32 } } } */ /* { dg-final { scan-assembler-times "rlwinm" 3 { target ilp32 } } } */ -/* { dg-final { scan-assembler-times {\maddi\M} 9 { target ilp32 } } } */ +/* { dg-final { scan-assembler-times {\maddi\M} 6 { target ilp32 } } } */ /* { dg-final { scan-assembler-times {\mlha\M|\mlhz\M} 6 { target ilp32 } } } */