| Message ID | 20240518093157.407144-10-npiggin@gmail.com |
|---|---|
| State | Not Applicable |
| Headers | show |
| Series | target/ppc: Various TCG emulation patches | expand |
On 5/18/24 11:31, Nicholas Piggin wrote: > +void spr_core_write_generic32(DisasContext *ctx, int sprn, int gprn) > +{ > + TCGv t0 = tcg_temp_new(); > + if (!(ctx->flags & POWERPC_FLAG_SMT)) { > + spr_write_generic32(ctx, sprn, gprn); > + return; > + } > + > + if (!gen_serialize(ctx)) { > + return; > + } > + > + tcg_gen_ext32u_tl(t0, cpu_gpr[gprn]); Better to delay allocating the temp until needed, so that you don't allocate one along the return paths. r~
On Sat May 18, 2024 at 9:26 PM AEST, Richard Henderson wrote: > On 5/18/24 11:31, Nicholas Piggin wrote: > > +void spr_core_write_generic32(DisasContext *ctx, int sprn, int gprn) > > +{ > > + TCGv t0 = tcg_temp_new(); > > + if (!(ctx->flags & POWERPC_FLAG_SMT)) { > > + spr_write_generic32(ctx, sprn, gprn); > > + return; > > + } > > + > > + if (!gen_serialize(ctx)) { > > + return; > > + } > > + > > + tcg_gen_ext32u_tl(t0, cpu_gpr[gprn]); > > Better to delay allocating the temp until needed, so that you don't allocate one along the > return paths. Will fix. Thanks, Nick
diff --git a/target/ppc/spr_common.h b/target/ppc/spr_common.h index 9e40b3b608..85f73b860b 100644 --- a/target/ppc/spr_common.h +++ b/target/ppc/spr_common.h @@ -83,6 +83,8 @@ void spr_read_generic(DisasContext *ctx, int gprn, int sprn); void spr_write_generic(DisasContext *ctx, int sprn, int gprn); void spr_write_generic32(DisasContext *ctx, int sprn, int gprn); void spr_core_write_generic(DisasContext *ctx, int sprn, int gprn); +void spr_core_write_generic32(DisasContext *ctx, int sprn, int gprn); +void spr_core_lpar_write_generic(DisasContext *ctx, int sprn, int gprn); void spr_write_MMCR0(DisasContext *ctx, int sprn, int gprn); void spr_write_MMCR1(DisasContext *ctx, int sprn, int gprn); void spr_write_MMCRA(DisasContext *ctx, int sprn, int gprn); diff --git a/target/ppc/translate.c b/target/ppc/translate.c index c4b4f7ea62..ccd90a5feb 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -537,6 +537,32 @@ void spr_core_write_generic(DisasContext *ctx, int sprn, int gprn) spr_store_dump_spr(sprn); } +void spr_core_write_generic32(DisasContext *ctx, int sprn, int gprn) +{ + TCGv t0 = tcg_temp_new(); + if (!(ctx->flags & POWERPC_FLAG_SMT)) { + spr_write_generic32(ctx, sprn, gprn); + return; + } + + if (!gen_serialize(ctx)) { + return; + } + + tcg_gen_ext32u_tl(t0, cpu_gpr[gprn]); + gen_helper_spr_core_write_generic(tcg_env, tcg_constant_i32(sprn), t0); + spr_store_dump_spr(sprn); +} + +void spr_core_lpar_write_generic(DisasContext *ctx, int sprn, int gprn) +{ + if (ctx->flags & POWERPC_FLAG_SMT_1LPAR) { + spr_core_write_generic(ctx, sprn, gprn); + } else { + spr_write_generic(ctx, sprn, gprn); + } +} + static void spr_write_CTRL_ST(DisasContext *ctx, int sprn, int gprn) { /* This does not implement >1 thread */
An SPR can be either per-thread, per-core, or per-LPAR. Per-LPAR means per-thread or per-core, depending on 1LPAR mode. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> --- target/ppc/spr_common.h | 2 ++ target/ppc/translate.c | 26 ++++++++++++++++++++++++++ 2 files changed, 28 insertions(+)