| Message ID | 20240425220659.2056955-3-n-francis@ti.com |
|---|---|
| State | Accepted |
| Commit | 27c5c8371ddd18e0ca1a83b4b075ce523229d9db |
| Delegated to: | Tom Rini |
| Headers | show |
| Series | Generate all SR boot binaries | expand |
On 4/25/24 5:06 PM, Neha Malcom Francis wrote: > J7200 has SR1.0 and SR2.0 having three variants of each GP, HS-FS and > HS-SE. Current build does not generate HS-SE SR1.0 and HS-FS SR1.0 so > add support for them. > SR1.0 silicon for J7200 is rare as it was replaced by SR2.0 before broad-market release (IIRC), but for completeness this is fine to have supported, Reviewed-by: Andrew Davis <afd@ti.com> > Reported-by: Suman Anna <s-anna@ti.com> > Reported-by: Aniket Limaye <a-limaye@ti.com> > Signed-off-by: Neha Malcom Francis <n-francis@ti.com> > --- > arch/arm/dts/k3-j7200-binman.dtsi | 95 ++++++++++++++++++++++++++++++- > 1 file changed, 94 insertions(+), 1 deletion(-) > > diff --git a/arch/arm/dts/k3-j7200-binman.dtsi b/arch/arm/dts/k3-j7200-binman.dtsi > index 06db8659876..e8020fec2dc 100644 > --- a/arch/arm/dts/k3-j7200-binman.dtsi > +++ b/arch/arm/dts/k3-j7200-binman.dtsi > @@ -1,6 +1,6 @@ > // SPDX-License-Identifier: GPL-2.0 > /* > - * Copyright (C) 2022-2023 Texas Instruments Incorporated - https://www.ti.com/ > + * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/ > */ > > #include "k3-binman.dtsi" > @@ -47,6 +47,52 @@ > config = "pm-cfg_j7200.yaml"; > }; > > +&binman { > + tiboot3-j7200-hs-evm.bin { > + filename = "tiboot3-j7200-hs-evm.bin"; > + ti-secure-rom { > + content = <&u_boot_spl_sr1>, <&ti_fs_enc_sr1>, <&combined_tifs_cfg_sr1>, > + <&combined_dm_cfg_sr1>, <&sysfw_inner_cert_sr1>; > + combined; > + dm-data; > + core-opts = <2>; > + sysfw-inner-cert; > + keyfile = "custMpk.pem"; > + sw-rev = <1>; > + content-sbl = <&u_boot_spl_sr1>; > + content-sysfw = <&ti_fs_enc_sr1>; > + content-sysfw-data = <&combined_tifs_cfg_sr1>; > + content-sysfw-inner-cert = <&sysfw_inner_cert_sr1>; > + content-dm-data = <&combined_dm_cfg_sr1>; > + load = <0x41c00000>; > + load-sysfw = <0x40000>; > + load-sysfw-data = <0x7f000>; > + load-dm-data = <0x41c80000>; > + }; > + u_boot_spl_sr1: u-boot-spl { > + no-expanded; > + }; > + ti_fs_enc_sr1: ti-fs-enc.bin { > + filename = "ti-sysfw/ti-fs-firmware-j7200-hs-enc.bin"; > + type = "blob-ext"; > + optional; > + }; > + combined_tifs_cfg_sr1: combined-tifs-cfg.bin { > + filename = "combined-tifs-cfg.bin"; > + type = "blob-ext"; > + }; > + sysfw_inner_cert_sr1: sysfw-inner-cert { > + filename = "ti-sysfw/ti-fs-firmware-j7200-hs-cert.bin"; > + type = "blob-ext"; > + optional; > + }; > + combined_dm_cfg_sr1: combined-dm-cfg.bin { > + filename = "combined-dm-cfg.bin"; > + type = "blob-ext"; > + }; > + }; > +}; > + > &binman { > tiboot3-j7200_sr2-hs-evm.bin { > filename = "tiboot3-j7200_sr2-hs-evm.bin"; > @@ -92,6 +138,53 @@ > }; > }; > > +&binman { > + tiboot3-j7200-hs-fs-evm.bin { > + filename = "tiboot3-j7200-hs-fs-evm.bin"; > + ti-secure-rom { > + content = <&u_boot_spl_fs_sr1>, <&ti_fs_enc_fs_sr1>, > + <&combined_tifs_cfg_fs_sr1>, <&combined_dm_cfg_fs_sr1>, > + <&sysfw_inner_cert_fs_sr1>; > + combined; > + dm-data; > + core-opts = <2>; > + sysfw-inner-cert; > + keyfile = "custMpk.pem"; > + sw-rev = <1>; > + content-sbl = <&u_boot_spl_fs_sr1>; > + content-sysfw = <&ti_fs_enc_fs_sr1>; > + content-sysfw-data = <&combined_tifs_cfg_fs_sr1>; > + content-sysfw-inner-cert = <&sysfw_inner_cert_fs_sr1>; > + content-dm-data = <&combined_dm_cfg_fs_sr1>; > + load = <0x41c00000>; > + load-sysfw = <0x40000>; > + load-sysfw-data = <0x7f000>; > + load-dm-data = <0x41c80000>; > + }; > + u_boot_spl_fs_sr1: u-boot-spl { > + no-expanded; > + }; > + ti_fs_enc_fs_sr1: ti-fs-enc.bin { > + filename = "ti-sysfw/ti-fs-firmware-j7200-hs-fs-enc.bin"; > + type = "blob-ext"; > + optional; > + }; > + combined_tifs_cfg_fs_sr1: combined-tifs-cfg.bin { > + filename = "combined-tifs-cfg.bin"; > + type = "blob-ext"; > + }; > + sysfw_inner_cert_fs_sr1: sysfw-inner-cert { > + filename = "ti-sysfw/ti-fs-firmware-j7200-hs-fs-cert.bin"; > + type = "blob-ext"; > + optional; > + }; > + combined_dm_cfg_fs_sr1: combined-dm-cfg.bin { > + filename = "combined-dm-cfg.bin"; > + type = "blob-ext"; > + }; > + }; > +}; > + > &binman { > tiboot3-j7200_sr2-hs-fs-evm.bin { > filename = "tiboot3-j7200_sr2-hs-fs-evm.bin";
diff --git a/arch/arm/dts/k3-j7200-binman.dtsi b/arch/arm/dts/k3-j7200-binman.dtsi index 06db8659876..e8020fec2dc 100644 --- a/arch/arm/dts/k3-j7200-binman.dtsi +++ b/arch/arm/dts/k3-j7200-binman.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* - * Copyright (C) 2022-2023 Texas Instruments Incorporated - https://www.ti.com/ + * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/ */ #include "k3-binman.dtsi" @@ -47,6 +47,52 @@ config = "pm-cfg_j7200.yaml"; }; +&binman { + tiboot3-j7200-hs-evm.bin { + filename = "tiboot3-j7200-hs-evm.bin"; + ti-secure-rom { + content = <&u_boot_spl_sr1>, <&ti_fs_enc_sr1>, <&combined_tifs_cfg_sr1>, + <&combined_dm_cfg_sr1>, <&sysfw_inner_cert_sr1>; + combined; + dm-data; + core-opts = <2>; + sysfw-inner-cert; + keyfile = "custMpk.pem"; + sw-rev = <1>; + content-sbl = <&u_boot_spl_sr1>; + content-sysfw = <&ti_fs_enc_sr1>; + content-sysfw-data = <&combined_tifs_cfg_sr1>; + content-sysfw-inner-cert = <&sysfw_inner_cert_sr1>; + content-dm-data = <&combined_dm_cfg_sr1>; + load = <0x41c00000>; + load-sysfw = <0x40000>; + load-sysfw-data = <0x7f000>; + load-dm-data = <0x41c80000>; + }; + u_boot_spl_sr1: u-boot-spl { + no-expanded; + }; + ti_fs_enc_sr1: ti-fs-enc.bin { + filename = "ti-sysfw/ti-fs-firmware-j7200-hs-enc.bin"; + type = "blob-ext"; + optional; + }; + combined_tifs_cfg_sr1: combined-tifs-cfg.bin { + filename = "combined-tifs-cfg.bin"; + type = "blob-ext"; + }; + sysfw_inner_cert_sr1: sysfw-inner-cert { + filename = "ti-sysfw/ti-fs-firmware-j7200-hs-cert.bin"; + type = "blob-ext"; + optional; + }; + combined_dm_cfg_sr1: combined-dm-cfg.bin { + filename = "combined-dm-cfg.bin"; + type = "blob-ext"; + }; + }; +}; + &binman { tiboot3-j7200_sr2-hs-evm.bin { filename = "tiboot3-j7200_sr2-hs-evm.bin"; @@ -92,6 +138,53 @@ }; }; +&binman { + tiboot3-j7200-hs-fs-evm.bin { + filename = "tiboot3-j7200-hs-fs-evm.bin"; + ti-secure-rom { + content = <&u_boot_spl_fs_sr1>, <&ti_fs_enc_fs_sr1>, + <&combined_tifs_cfg_fs_sr1>, <&combined_dm_cfg_fs_sr1>, + <&sysfw_inner_cert_fs_sr1>; + combined; + dm-data; + core-opts = <2>; + sysfw-inner-cert; + keyfile = "custMpk.pem"; + sw-rev = <1>; + content-sbl = <&u_boot_spl_fs_sr1>; + content-sysfw = <&ti_fs_enc_fs_sr1>; + content-sysfw-data = <&combined_tifs_cfg_fs_sr1>; + content-sysfw-inner-cert = <&sysfw_inner_cert_fs_sr1>; + content-dm-data = <&combined_dm_cfg_fs_sr1>; + load = <0x41c00000>; + load-sysfw = <0x40000>; + load-sysfw-data = <0x7f000>; + load-dm-data = <0x41c80000>; + }; + u_boot_spl_fs_sr1: u-boot-spl { + no-expanded; + }; + ti_fs_enc_fs_sr1: ti-fs-enc.bin { + filename = "ti-sysfw/ti-fs-firmware-j7200-hs-fs-enc.bin"; + type = "blob-ext"; + optional; + }; + combined_tifs_cfg_fs_sr1: combined-tifs-cfg.bin { + filename = "combined-tifs-cfg.bin"; + type = "blob-ext"; + }; + sysfw_inner_cert_fs_sr1: sysfw-inner-cert { + filename = "ti-sysfw/ti-fs-firmware-j7200-hs-fs-cert.bin"; + type = "blob-ext"; + optional; + }; + combined_dm_cfg_fs_sr1: combined-dm-cfg.bin { + filename = "combined-dm-cfg.bin"; + type = "blob-ext"; + }; + }; +}; + &binman { tiboot3-j7200_sr2-hs-fs-evm.bin { filename = "tiboot3-j7200_sr2-hs-fs-evm.bin";
J7200 has SR1.0 and SR2.0 having three variants of each GP, HS-FS and HS-SE. Current build does not generate HS-SE SR1.0 and HS-FS SR1.0 so add support for them. Reported-by: Suman Anna <s-anna@ti.com> Reported-by: Aniket Limaye <a-limaye@ti.com> Signed-off-by: Neha Malcom Francis <n-francis@ti.com> --- arch/arm/dts/k3-j7200-binman.dtsi | 95 ++++++++++++++++++++++++++++++- 1 file changed, 94 insertions(+), 1 deletion(-)