Message ID | 20240503111436.113089-1-yuklin.soo@starfivetech.com |
---|---|
Headers | show |
Series | Add Pinctrl driver for Starfive JH8100 SoC | expand |
On Fri, May 3, 2024 at 1:14 PM Alex Soo <yuklin.soo@starfivetech.com> wrote: > Starfive JH8100 SoC consists of 4 pinctrl domains - sys_east, > sys_west, sys_gmac, and aon. This patch series adds pinctrl > drivers for these 4 pinctrl domains and this patch series is > depending on the JH8100 base patch series in [1] and [2]. > The relevant dt-binding documentation for each pinctrl domain has > been updated accordingly. > > [1] https://lore.kernel.org/lkml/20231201121410.95298-1-jeeheng.sia@starfivetech.com/ > [2] https://lore.kernel.org/lkml/20231206115000.295825-1-jeeheng.sia@starfivetech.com/ v3 is starting to look very nice, why is this patch set still in "RFC"? I would like some proper review from the StarFive maintainers at this point so we can get it finished. Yours, Linus Walleij
> -----Original Message----- > From: Linus Walleij <linus.walleij@linaro.org> > Sent: Monday, May 6, 2024 2:35 PM > To: Yuklin Soo <yuklin.soo@starfivetech.com> > Cc: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>; Hal Feng > <hal.feng@starfivetech.com>; Leyfoon Tan <leyfoon.tan@starfivetech.com>; > Jianlong Huang <jianlong.huang@starfivetech.com>; Emil Renner Berthing > <kernel@esmil.dk>; Rob Herring <robh@kernel.org>; Krzysztof Kozlowski > <krzysztof.kozlowski+dt@linaro.org>; Conor Dooley <conor+dt@kernel.org>; > Drew Fustini <drew@beagleboard.org>; linux-gpio@vger.kernel.org; linux- > kernel@vger.kernel.org; devicetree@vger.kernel.org; linux- > riscv@lists.infradead.org; Paul Walmsley <paul.walmsley@sifive.com>; Palmer > Dabbelt <palmer@dabbelt.com>; Albert Ou <aou@eecs.berkeley.edu> > Subject: Re: [RFC PATCH v3 0/7] Add Pinctrl driver for Starfive JH8100 SoC > > On Fri, May 3, 2024 at 1:14 PM Alex Soo <yuklin.soo@starfivetech.com> > wrote: > > > Starfive JH8100 SoC consists of 4 pinctrl domains - sys_east, > > sys_west, sys_gmac, and aon. This patch series adds pinctrl drivers > > for these 4 pinctrl domains and this patch series is depending on the > > JH8100 base patch series in [1] and [2]. > > The relevant dt-binding documentation for each pinctrl domain has been > > updated accordingly. > > > > [1] > > https://lore.kernel.org/lkml/20231201121410.95298-1-jeeheng.sia@starfi > > vetech.com/ [2] > > https://lore.kernel.org/lkml/20231206115000.295825-1- > jeeheng.sia@starf > > ivetech.com/ > > v3 is starting to look very nice, why is this patch set still in "RFC"? > > I would like some proper review from the StarFive maintainers at this point so > we can get it finished. > > Yours, > Linus Walleij Hi Linus Thanks for reviewing the patches. There is a discussion in another thread about the JH8100 SoC being validated on FPGA/Emulation only now. The suggestion is to send the patches as "RFC" before the real silicon availability. https://patchew.org/linux/20231201121410.95298-1-jeeheng.sia@starfivetech.com/20231201121410.95298-3-jeeheng.sia@starfivetech.com/ Regards Ley Foon
On Mon, May 06, 2024 at 07:31:19AM +0000, Leyfoon Tan wrote: > > > > -----Original Message----- > > From: Linus Walleij <linus.walleij@linaro.org> > > Sent: Monday, May 6, 2024 2:35 PM > > To: Yuklin Soo <yuklin.soo@starfivetech.com> > > Cc: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>; Hal Feng > > <hal.feng@starfivetech.com>; Leyfoon Tan <leyfoon.tan@starfivetech.com>; > > Jianlong Huang <jianlong.huang@starfivetech.com>; Emil Renner Berthing > > <kernel@esmil.dk>; Rob Herring <robh@kernel.org>; Krzysztof Kozlowski > > <krzysztof.kozlowski+dt@linaro.org>; Conor Dooley <conor+dt@kernel.org>; > > Drew Fustini <drew@beagleboard.org>; linux-gpio@vger.kernel.org; linux- > > kernel@vger.kernel.org; devicetree@vger.kernel.org; linux- > > riscv@lists.infradead.org; Paul Walmsley <paul.walmsley@sifive.com>; Palmer > > Dabbelt <palmer@dabbelt.com>; Albert Ou <aou@eecs.berkeley.edu> > > Subject: Re: [RFC PATCH v3 0/7] Add Pinctrl driver for Starfive JH8100 SoC > > > > On Fri, May 3, 2024 at 1:14 PM Alex Soo <yuklin.soo@starfivetech.com> > > wrote: > > > > > Starfive JH8100 SoC consists of 4 pinctrl domains - sys_east, > > > sys_west, sys_gmac, and aon. This patch series adds pinctrl drivers > > > for these 4 pinctrl domains and this patch series is depending on the > > > JH8100 base patch series in [1] and [2]. > > > The relevant dt-binding documentation for each pinctrl domain has been > > > updated accordingly. > > > > > > [1] > > > https://lore.kernel.org/lkml/20231201121410.95298-1-jeeheng.sia@starfi > > > vetech.com/ [2] > > > https://lore.kernel.org/lkml/20231206115000.295825-1- > > jeeheng.sia@starf > > > ivetech.com/ > > > > v3 is starting to look very nice, why is this patch set still in "RFC"? > > > > I would like some proper review from the StarFive maintainers at this point so > > we can get it finished. > > > > Yours, > > Linus Walleij > > Hi Linus > > Thanks for reviewing the patches. > > There is a discussion in another thread about the JH8100 SoC being validated on FPGA/Emulation only now. The suggestion is to send the patches as "RFC" before the real silicon availability. > > https://patchew.org/linux/20231201121410.95298-1-jeeheng.sia@starfivetech.com/20231201121410.95298-3-jeeheng.sia@starfivetech.com/ I know I said "drivers" in that mail you link to, but I was mostly concerned about binding headers etc, of which I think there are actually none here, so see my reply to this thread a few days ago: https://lore.kernel.org/all/20240503-undress-mantra-e5e46b2f6360@spud/
Fri, May 03, 2024 at 07:14:29PM +0800, Alex Soo kirjoitti: > Starfive JH8100 SoC consists of 4 pinctrl domains - sys_east, > sys_west, sys_gmac, and aon. This patch series adds pinctrl > drivers for these 4 pinctrl domains and this patch series is > depending on the JH8100 base patch series in [1] and [2]. > The relevant dt-binding documentation for each pinctrl domain has > been updated accordingly. I commented one of pinctrl: prefixed patch, but it looks like the same comments are applicable to all of them.