Message ID | 20240408132925.1880571-1-quic_kriskura@quicinc.com |
---|---|
Headers | show |
Series | Add multiport support for DWC3 controllers | expand |
On Mon, Apr 08, 2024, Krishna Kurapati wrote: > All DWC3 Multi Port controllers that exist today only support host mode. > Temporarily map XHCI address space for host-only controllers and parse > XHCI Extended Capabilities registers to read number of usb2 ports and > usb3 ports present on multiport controller. Each USB Port is at least HS > capable. > > The port info for usb2 and usb3 phy are identified as num_usb2_ports > and num_usb3_ports. The intention is as follows: > > Wherever we need to perform phy operations like: > > LOOP_OVER_NUMBER_OF_AVAILABLE_PORTS() > { > phy_set_mode(dwc->usb2_generic_phy[i], PHY_MODE_USB_HOST); > phy_set_mode(dwc->usb3_generic_phy[i], PHY_MODE_USB_HOST); > } > > If number of usb2 ports is 3, loop can go from index 0-2 for > usb2_generic_phy. If number of usb3-ports is 2, we don't know for sure, > if the first 2 ports are SS capable or some other ports like (2 and 3) > are SS capable. So instead, num_usb2_ports is used to loop around all > phy's (both hs and ss) for performing phy operations. If any > usb3_generic_phy turns out to be NULL, phy operation just bails out. > num_usb3_ports is used to modify GUSB3PIPECTL registers while setting up > phy's as we need to know how many SS capable ports are there for this. > > Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com> > Reviewed-by: Bjorn Andersson <quic_bjorande@quicinc.com> > --- > drivers/usb/dwc3/core.c | 61 +++++++++++++++++++++++++++++++++++++++++ > drivers/usb/dwc3/core.h | 5 ++++ > 2 files changed, 66 insertions(+) > > diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c > index 31684cdaaae3..ddab30531f8a 100644 > --- a/drivers/usb/dwc3/core.c > +++ b/drivers/usb/dwc3/core.c > @@ -39,6 +39,7 @@ > #include "io.h" > > #include "debug.h" > +#include "../host/xhci-ext-caps.h" > > #define DWC3_DEFAULT_AUTOSUSPEND_DELAY 5000 /* ms */ > > @@ -1881,10 +1882,56 @@ static int dwc3_get_clocks(struct dwc3 *dwc) > return 0; > } > > +static int dwc3_get_num_ports(struct dwc3 *dwc) > +{ > + void __iomem *base; > + u8 major_revision; > + u32 offset; > + u32 val; > + > + /* > + * Remap xHCI address space to access XHCI ext cap regs since it is > + * needed to get information on number of ports present. > + */ > + base = ioremap(dwc->xhci_resources[0].start, > + resource_size(&dwc->xhci_resources[0])); > + if (!base) > + return -ENOMEM; > + > + offset = 0; > + do { > + offset = xhci_find_next_ext_cap(base, offset, > + XHCI_EXT_CAPS_PROTOCOL); > + if (!offset) > + break; > + > + val = readl(base + offset); > + major_revision = XHCI_EXT_PORT_MAJOR(val); > + > + val = readl(base + offset + 0x08); > + if (major_revision == 0x03) { > + dwc->num_usb3_ports += XHCI_EXT_PORT_COUNT(val); > + } else if (major_revision <= 0x02) { > + dwc->num_usb2_ports += XHCI_EXT_PORT_COUNT(val); > + } else { > + dev_warn(dwc->dev, "unrecognized port major revision %d\n", > + major_revision); > + } > + } while (1); > + > + dev_dbg(dwc->dev, "hs-ports: %u ss-ports: %u\n", > + dwc->num_usb2_ports, dwc->num_usb3_ports); > + > + iounmap(base); > + > + return 0; > +} > + > static int dwc3_probe(struct platform_device *pdev) > { > struct device *dev = &pdev->dev; > struct resource *res, dwc_res; > + unsigned int hw_mode; > void __iomem *regs; > struct dwc3 *dwc; > int ret; > @@ -1968,6 +2015,20 @@ static int dwc3_probe(struct platform_device *pdev) > goto err_disable_clks; > } > > + /* > + * Currently only DWC3 controllers that are host-only capable > + * can have more than one port. > + */ > + hw_mode = DWC3_GHWPARAMS0_MODE(dwc->hwparams.hwparams0); > + if (hw_mode == DWC3_GHWPARAMS0_MODE_HOST) { > + ret = dwc3_get_num_ports(dwc); > + if (ret) > + goto err_disable_clks; > + } else { > + dwc->num_usb2_ports = 1; > + dwc->num_usb3_ports = 1; > + } > + > spin_lock_init(&dwc->lock); > mutex_init(&dwc->mutex); > > diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h > index 7e80dd3d466b..341e4c73cb2e 100644 > --- a/drivers/usb/dwc3/core.h > +++ b/drivers/usb/dwc3/core.h > @@ -1039,6 +1039,8 @@ struct dwc3_scratchpad_array { > * @usb3_phy: pointer to USB3 PHY > * @usb2_generic_phy: pointer to USB2 PHY > * @usb3_generic_phy: pointer to USB3 PHY > + * @num_usb2_ports: number of USB2 ports > + * @num_usb3_ports: number of USB3 ports > * @phys_ready: flag to indicate that PHYs are ready > * @ulpi: pointer to ulpi interface > * @ulpi_ready: flag to indicate that ULPI is initialized > @@ -1187,6 +1189,9 @@ struct dwc3 { > struct phy *usb2_generic_phy; > struct phy *usb3_generic_phy; > > + u8 num_usb2_ports; > + u8 num_usb3_ports; > + > bool phys_ready; > > struct ulpi *ulpi; > -- > 2.34.1 > Acked-by: Thinh Nguyen <Thinh.Nguyen@synopsys.com> Thanks, Thinh
On Mon, Apr 08, 2024, Krishna Kurapati wrote: > Currently the DWC3 driver supports only single port controller > which requires at least one HS PHY and at most one SS PHY. > > But the DWC3 USB controller can be connected to multiple ports and > each port can have their own PHYs. Each port of the multiport > controller can either be HS+SS capable or HS only capable > Proper quantification of them is required to modify GUSB2PHYCFG > and GUSB3PIPECTL registers appropriately. > > Add support for detecting, obtaining and configuring PHYs supported > by a multiport controller. Limit support to multiport controllers > with up to four ports for now (e.g. as needed for SC8280XP). > > Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com> > Reviewed-by: Johan Hovold <johan+linaro@kernel.org> > --- > drivers/usb/dwc3/core.c | 251 ++++++++++++++++++++++++++++------------ > drivers/usb/dwc3/core.h | 14 ++- > drivers/usb/dwc3/drd.c | 15 ++- > 3 files changed, 193 insertions(+), 87 deletions(-) > <snip> > @@ -1937,6 +2020,10 @@ static int dwc3_get_num_ports(struct dwc3 *dwc) > > iounmap(base); > > + if (dwc->num_usb2_ports > DWC3_MAX_PORTS || > + dwc->num_usb3_ports > DWC3_MAX_PORTS) > + return -ENOMEM; This should be -EINVAL. > + > return 0; > } <snip> > diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h > index 341e4c73cb2e..df2e111aa848 100644 > --- a/drivers/usb/dwc3/core.h > +++ b/drivers/usb/dwc3/core.h > @@ -33,6 +33,12 @@ > > #include <linux/power_supply.h> > > +/* > + * Maximum number of ports currently supported for multiport > + * controllers. This macro here is being used per USB2 vs USB3 ports rather than USB2 + USB3, unlike the xHCI MAXPORTS. You can clarify in the comment and rename the macro to avoid any confusion. You can also create 2 separate macros for number of USB2 and USB3 ports even if they share the same value. As noted[*], we support have different max number of usb2 ports vs usb3 ports. I would suggest splitting the macros. [*] https://lore.kernel.org/linux-usb/20230801013031.ft3zpoatiyfegmh6@synopsys.com/ > + */ > +#define DWC3_MAX_PORTS 4 > + > But it's not a big issue whether you decided to push a new version or a create a separate patch for the comments above. Here's my Ack: Acked-by: Thinh Nguyen <Thinh.Nguyen@synopsys.com> Thanks, Thinh
On Mon, Apr 08, 2024, Krishna Kurapati wrote: > The logic for requesting interrupts is duplicated for each interrupt. In > the upcoming patches that introduces support for multiport, it would be > better to clean up the duplication before reading mulitport related > interrupts. > > Refactor interrupt setup call by adding a new helper function for > requesting the wakeup interrupts. To simplify implementation, make > the display name same as the interrupt name expected in DT. > > Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com> > Reviewed-by: Johan Hovold <johan+linaro@kernel.org> > --- > drivers/usb/dwc3/dwc3-qcom.c | 53 ++++++++++++++++-------------------- > 1 file changed, 24 insertions(+), 29 deletions(-) > > diff --git a/drivers/usb/dwc3/dwc3-qcom.c b/drivers/usb/dwc3/dwc3-qcom.c > index f6b2fab49d5e..cae5dab8fcfc 100644 > --- a/drivers/usb/dwc3/dwc3-qcom.c > +++ b/drivers/usb/dwc3/dwc3-qcom.c > @@ -501,6 +501,22 @@ static void dwc3_qcom_select_utmi_clk(struct dwc3_qcom *qcom) > PIPE_UTMI_CLK_DIS); > } > > +static int dwc3_qcom_request_irq(struct dwc3_qcom *qcom, int irq, > + const char *name) > +{ > + int ret; > + > + /* Keep wakeup interrupts disabled until suspend */ > + ret = devm_request_threaded_irq(qcom->dev, irq, NULL, > + qcom_dwc3_resume_irq, > + IRQF_ONESHOT | IRQF_NO_AUTOEN, > + name, qcom); > + if (ret) > + dev_err(qcom->dev, "failed to request irq %s: %d\n", name, ret); > + > + return ret; > +} > + > static int dwc3_qcom_setup_irq(struct platform_device *pdev) > { > struct dwc3_qcom *qcom = platform_get_drvdata(pdev); > @@ -509,54 +525,33 @@ static int dwc3_qcom_setup_irq(struct platform_device *pdev) > > irq = platform_get_irq_byname_optional(pdev, "qusb2_phy"); > if (irq > 0) { > - /* Keep wakeup interrupts disabled until suspend */ > - ret = devm_request_threaded_irq(qcom->dev, irq, NULL, > - qcom_dwc3_resume_irq, > - IRQF_ONESHOT | IRQF_NO_AUTOEN, > - "qcom_dwc3 QUSB2", qcom); > - if (ret) { > - dev_err(qcom->dev, "qusb2_phy_irq failed: %d\n", ret); > + ret = dwc3_qcom_request_irq(qcom, irq, "qusb2_phy"); > + if (ret) > return ret; > - } > qcom->qusb2_phy_irq = irq; > } > > irq = platform_get_irq_byname_optional(pdev, "dp_hs_phy_irq"); > if (irq > 0) { > - ret = devm_request_threaded_irq(qcom->dev, irq, NULL, > - qcom_dwc3_resume_irq, > - IRQF_ONESHOT | IRQF_NO_AUTOEN, > - "qcom_dwc3 DP_HS", qcom); > - if (ret) { > - dev_err(qcom->dev, "dp_hs_phy_irq failed: %d\n", ret); > + ret = dwc3_qcom_request_irq(qcom, irq, "dp_hs_phy_irq"); > + if (ret) > return ret; > - } > qcom->dp_hs_phy_irq = irq; > } > > irq = platform_get_irq_byname_optional(pdev, "dm_hs_phy_irq"); > if (irq > 0) { > - ret = devm_request_threaded_irq(qcom->dev, irq, NULL, > - qcom_dwc3_resume_irq, > - IRQF_ONESHOT | IRQF_NO_AUTOEN, > - "qcom_dwc3 DM_HS", qcom); > - if (ret) { > - dev_err(qcom->dev, "dm_hs_phy_irq failed: %d\n", ret); > + ret = dwc3_qcom_request_irq(qcom, irq, "dm_hs_phy_irq"); > + if (ret) > return ret; > - } > qcom->dm_hs_phy_irq = irq; > } > > irq = platform_get_irq_byname_optional(pdev, "ss_phy_irq"); > if (irq > 0) { > - ret = devm_request_threaded_irq(qcom->dev, irq, NULL, > - qcom_dwc3_resume_irq, > - IRQF_ONESHOT | IRQF_NO_AUTOEN, > - "qcom_dwc3 SS", qcom); > - if (ret) { > - dev_err(qcom->dev, "ss_phy_irq failed: %d\n", ret); > + ret = dwc3_qcom_request_irq(qcom, irq, "ss_phy_irq"); > + if (ret) > return ret; > - } > qcom->ss_phy_irq = irq; > } > > -- > 2.34.1 > Acked-by: Thinh Nguyen <Thinh.Nguyen@synopsys.com> Thanks, Thinh
On Mon, Apr 08, 2024, Krishna Kurapati wrote: > On multiport supported controllers, each port has its own DP/DM > and SS (if super speed capable) interrupts. As per the bindings, > their interrupt names differ from standard ones having "_x" added > as suffix (x indicates port number). Identify from the interrupt > names whether the controller is a multiport controller or not. > Refactor dwc3_qcom_setup_irq() call to parse multiport interrupts > along with non-multiport ones accordingly.. > > Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com> > Reviewed-by: Johan Hovold <johan+linaro@kernel.org> > --- > drivers/usb/dwc3/dwc3-qcom.c | 137 ++++++++++++++++++++++++++--------- > 1 file changed, 103 insertions(+), 34 deletions(-) > > diff --git a/drivers/usb/dwc3/dwc3-qcom.c b/drivers/usb/dwc3/dwc3-qcom.c > index cae5dab8fcfc..35eb338514bc 100644 > --- a/drivers/usb/dwc3/dwc3-qcom.c > +++ b/drivers/usb/dwc3/dwc3-qcom.c > @@ -52,6 +52,13 @@ > #define APPS_USB_AVG_BW 0 > #define APPS_USB_PEAK_BW MBps_to_icc(40) > > +struct dwc3_qcom_port { > + int qusb2_phy_irq; > + int dp_hs_phy_irq; > + int dm_hs_phy_irq; > + int ss_phy_irq; > +}; > + > struct dwc3_qcom { > struct device *dev; > void __iomem *qscratch_base; > @@ -59,11 +66,8 @@ struct dwc3_qcom { > struct clk **clks; > int num_clocks; > struct reset_control *resets; > - > - int qusb2_phy_irq; > - int dp_hs_phy_irq; > - int dm_hs_phy_irq; > - int ss_phy_irq; > + struct dwc3_qcom_port ports[DWC3_MAX_PORTS]; > + u8 num_ports; > enum usb_device_speed usb2_speed; > > struct extcon_dev *edev; > @@ -354,24 +358,24 @@ static void dwc3_qcom_disable_wakeup_irq(int irq) > > static void dwc3_qcom_disable_interrupts(struct dwc3_qcom *qcom) > { > - dwc3_qcom_disable_wakeup_irq(qcom->qusb2_phy_irq); > + dwc3_qcom_disable_wakeup_irq(qcom->ports[0].qusb2_phy_irq); > > if (qcom->usb2_speed == USB_SPEED_LOW) { > - dwc3_qcom_disable_wakeup_irq(qcom->dm_hs_phy_irq); > + dwc3_qcom_disable_wakeup_irq(qcom->ports[0].dm_hs_phy_irq); > } else if ((qcom->usb2_speed == USB_SPEED_HIGH) || > (qcom->usb2_speed == USB_SPEED_FULL)) { > - dwc3_qcom_disable_wakeup_irq(qcom->dp_hs_phy_irq); > + dwc3_qcom_disable_wakeup_irq(qcom->ports[0].dp_hs_phy_irq); > } else { > - dwc3_qcom_disable_wakeup_irq(qcom->dp_hs_phy_irq); > - dwc3_qcom_disable_wakeup_irq(qcom->dm_hs_phy_irq); > + dwc3_qcom_disable_wakeup_irq(qcom->ports[0].dp_hs_phy_irq); > + dwc3_qcom_disable_wakeup_irq(qcom->ports[0].dm_hs_phy_irq); > } > > - dwc3_qcom_disable_wakeup_irq(qcom->ss_phy_irq); > + dwc3_qcom_disable_wakeup_irq(qcom->ports[0].ss_phy_irq); > } > > static void dwc3_qcom_enable_interrupts(struct dwc3_qcom *qcom) > { > - dwc3_qcom_enable_wakeup_irq(qcom->qusb2_phy_irq, 0); > + dwc3_qcom_enable_wakeup_irq(qcom->ports[0].qusb2_phy_irq, 0); > > /* > * Configure DP/DM line interrupts based on the USB2 device attached to > @@ -383,20 +387,20 @@ static void dwc3_qcom_enable_interrupts(struct dwc3_qcom *qcom) > */ > > if (qcom->usb2_speed == USB_SPEED_LOW) { > - dwc3_qcom_enable_wakeup_irq(qcom->dm_hs_phy_irq, > - IRQ_TYPE_EDGE_FALLING); > + dwc3_qcom_enable_wakeup_irq(qcom->ports[0].dm_hs_phy_irq, > + IRQ_TYPE_EDGE_FALLING); > } else if ((qcom->usb2_speed == USB_SPEED_HIGH) || > (qcom->usb2_speed == USB_SPEED_FULL)) { > - dwc3_qcom_enable_wakeup_irq(qcom->dp_hs_phy_irq, > - IRQ_TYPE_EDGE_FALLING); > + dwc3_qcom_enable_wakeup_irq(qcom->ports[0].dp_hs_phy_irq, > + IRQ_TYPE_EDGE_FALLING); > } else { > - dwc3_qcom_enable_wakeup_irq(qcom->dp_hs_phy_irq, > - IRQ_TYPE_EDGE_RISING); > - dwc3_qcom_enable_wakeup_irq(qcom->dm_hs_phy_irq, > - IRQ_TYPE_EDGE_RISING); > + dwc3_qcom_enable_wakeup_irq(qcom->ports[0].dp_hs_phy_irq, > + IRQ_TYPE_EDGE_RISING); > + dwc3_qcom_enable_wakeup_irq(qcom->ports[0].dm_hs_phy_irq, > + IRQ_TYPE_EDGE_RISING); > } > > - dwc3_qcom_enable_wakeup_irq(qcom->ss_phy_irq, 0); > + dwc3_qcom_enable_wakeup_irq(qcom->ports[0].ss_phy_irq, 0); > } > > static int dwc3_qcom_suspend(struct dwc3_qcom *qcom, bool wakeup) > @@ -517,42 +521,107 @@ static int dwc3_qcom_request_irq(struct dwc3_qcom *qcom, int irq, > return ret; > } > > -static int dwc3_qcom_setup_irq(struct platform_device *pdev) > +static int dwc3_qcom_setup_port_irq(struct platform_device *pdev, int port_index, bool is_multiport) > { > struct dwc3_qcom *qcom = platform_get_drvdata(pdev); > + const char *irq_name; > int irq; > int ret; > > - irq = platform_get_irq_byname_optional(pdev, "qusb2_phy"); > + if (is_multiport) > + irq_name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "dp_hs_phy_%d", port_index + 1); > + else > + irq_name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "dp_hs_phy_irq"); > + if (!irq_name) > + return -ENOMEM; > + > + irq = platform_get_irq_byname_optional(pdev, irq_name); > if (irq > 0) { > - ret = dwc3_qcom_request_irq(qcom, irq, "qusb2_phy"); > + ret = dwc3_qcom_request_irq(qcom, irq, irq_name); > if (ret) > return ret; > - qcom->qusb2_phy_irq = irq; > + qcom->ports[port_index].dp_hs_phy_irq = irq; > } > > - irq = platform_get_irq_byname_optional(pdev, "dp_hs_phy_irq"); > + if (is_multiport) > + irq_name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "dm_hs_phy_%d", port_index + 1); > + else > + irq_name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "dm_hs_phy_irq"); > + if (!irq_name) > + return -ENOMEM; > + > + irq = platform_get_irq_byname_optional(pdev, irq_name); > if (irq > 0) { > - ret = dwc3_qcom_request_irq(qcom, irq, "dp_hs_phy_irq"); > + ret = dwc3_qcom_request_irq(qcom, irq, irq_name); > if (ret) > return ret; > - qcom->dp_hs_phy_irq = irq; > + qcom->ports[port_index].dm_hs_phy_irq = irq; > } > > - irq = platform_get_irq_byname_optional(pdev, "dm_hs_phy_irq"); > + if (is_multiport) > + irq_name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "ss_phy_%d", port_index + 1); > + else > + irq_name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "ss_phy_irq"); > + if (!irq_name) > + return -ENOMEM; > + > + irq = platform_get_irq_byname_optional(pdev, irq_name); > if (irq > 0) { > - ret = dwc3_qcom_request_irq(qcom, irq, "dm_hs_phy_irq"); > + ret = dwc3_qcom_request_irq(qcom, irq, irq_name); > if (ret) > return ret; > - qcom->dm_hs_phy_irq = irq; > + qcom->ports[port_index].ss_phy_irq = irq; > } > > - irq = platform_get_irq_byname_optional(pdev, "ss_phy_irq"); > + if (is_multiport) > + return 0; > + > + irq = platform_get_irq_byname_optional(pdev, "qusb2_phy"); > if (irq > 0) { > - ret = dwc3_qcom_request_irq(qcom, irq, "ss_phy_irq"); > + ret = dwc3_qcom_request_irq(qcom, irq, "qusb2_phy"); > + if (ret) > + return ret; > + qcom->ports[port_index].qusb2_phy_irq = irq; > + } > + > + return 0; > +} > + > +static int dwc3_qcom_find_num_ports(struct platform_device *pdev) > +{ > + char irq_name[14]; > + int port_num; > + int irq; > + > + irq = platform_get_irq_byname_optional(pdev, "dp_hs_phy_1"); > + if (irq <= 0) > + return 1; > + > + for (port_num = 2; port_num <= DWC3_MAX_PORTS; port_num++) { > + sprintf(irq_name, "dp_hs_phy_%d", port_num); > + > + irq = platform_get_irq_byname_optional(pdev, irq_name); > + if (irq <= 0) > + return port_num - 1; > + } > + > + return DWC3_MAX_PORTS; > +} > + > +static int dwc3_qcom_setup_irq(struct platform_device *pdev) > +{ > + struct dwc3_qcom *qcom = platform_get_drvdata(pdev); > + bool is_multiport; > + int ret; > + int i; > + > + qcom->num_ports = dwc3_qcom_find_num_ports(pdev); > + is_multiport = (qcom->num_ports > 1); > + > + for (i = 0; i < qcom->num_ports; i++) { > + ret = dwc3_qcom_setup_port_irq(pdev, i, is_multiport); > if (ret) > return ret; > - qcom->ss_phy_irq = irq; > } > > return 0; > -- > 2.34.1 > Acked-by: Thinh Nguyen <Thinh.Nguyen@synopsys.com> Thanks, Thinh
On Mon, Apr 08, 2024, Krishna Kurapati wrote: > DWC3 Qcom wrapper currently supports only wakeup configuration > for single port controllers. Read speed of each port connected > to the controller and enable wakeup for each of them accordingly. > > Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com> > Reviewed-by: Johan Hovold <johan+linaro@kernel.org> > --- > drivers/usb/dwc3/dwc3-qcom.c | 71 +++++++++++++++++++++--------------- > 1 file changed, 41 insertions(+), 30 deletions(-) > > diff --git a/drivers/usb/dwc3/dwc3-qcom.c b/drivers/usb/dwc3/dwc3-qcom.c > index 35eb338514bc..12182e0f8f45 100644 > --- a/drivers/usb/dwc3/dwc3-qcom.c > +++ b/drivers/usb/dwc3/dwc3-qcom.c > @@ -57,6 +57,7 @@ struct dwc3_qcom_port { > int dp_hs_phy_irq; > int dm_hs_phy_irq; > int ss_phy_irq; > + enum usb_device_speed usb2_speed; > }; > > struct dwc3_qcom { > @@ -68,7 +69,6 @@ struct dwc3_qcom { > struct reset_control *resets; > struct dwc3_qcom_port ports[DWC3_MAX_PORTS]; > u8 num_ports; > - enum usb_device_speed usb2_speed; > > struct extcon_dev *edev; > struct extcon_dev *host_edev; > @@ -307,7 +307,7 @@ static bool dwc3_qcom_is_host(struct dwc3_qcom *qcom) > return dwc->xhci; > } > > -static enum usb_device_speed dwc3_qcom_read_usb2_speed(struct dwc3_qcom *qcom) > +static enum usb_device_speed dwc3_qcom_read_usb2_speed(struct dwc3_qcom *qcom, int port_index) > { > struct dwc3 *dwc = platform_get_drvdata(qcom->dwc3); > struct usb_device *udev; > @@ -318,14 +318,8 @@ static enum usb_device_speed dwc3_qcom_read_usb2_speed(struct dwc3_qcom *qcom) > */ > hcd = platform_get_drvdata(dwc->xhci); > > - /* > - * It is possible to query the speed of all children of > - * USB2.0 root hub via usb_hub_for_each_child(). DWC3 code > - * currently supports only 1 port per controller. So > - * this is sufficient. > - */ > #ifdef CONFIG_USB > - udev = usb_hub_find_child(hcd->self.root_hub, 1); > + udev = usb_hub_find_child(hcd->self.root_hub, port_index + 1); > #else > udev = NULL; > #endif > @@ -356,26 +350,26 @@ static void dwc3_qcom_disable_wakeup_irq(int irq) > disable_irq_nosync(irq); > } > > -static void dwc3_qcom_disable_interrupts(struct dwc3_qcom *qcom) > +static void dwc3_qcom_disable_port_interrupts(struct dwc3_qcom_port *port) > { > - dwc3_qcom_disable_wakeup_irq(qcom->ports[0].qusb2_phy_irq); > + dwc3_qcom_disable_wakeup_irq(port->qusb2_phy_irq); > > - if (qcom->usb2_speed == USB_SPEED_LOW) { > - dwc3_qcom_disable_wakeup_irq(qcom->ports[0].dm_hs_phy_irq); > - } else if ((qcom->usb2_speed == USB_SPEED_HIGH) || > - (qcom->usb2_speed == USB_SPEED_FULL)) { > - dwc3_qcom_disable_wakeup_irq(qcom->ports[0].dp_hs_phy_irq); > + if (port->usb2_speed == USB_SPEED_LOW) { > + dwc3_qcom_disable_wakeup_irq(port->dm_hs_phy_irq); > + } else if ((port->usb2_speed == USB_SPEED_HIGH) || > + (port->usb2_speed == USB_SPEED_FULL)) { > + dwc3_qcom_disable_wakeup_irq(port->dp_hs_phy_irq); > } else { > - dwc3_qcom_disable_wakeup_irq(qcom->ports[0].dp_hs_phy_irq); > - dwc3_qcom_disable_wakeup_irq(qcom->ports[0].dm_hs_phy_irq); > + dwc3_qcom_disable_wakeup_irq(port->dp_hs_phy_irq); > + dwc3_qcom_disable_wakeup_irq(port->dm_hs_phy_irq); > } > > - dwc3_qcom_disable_wakeup_irq(qcom->ports[0].ss_phy_irq); > + dwc3_qcom_disable_wakeup_irq(port->ss_phy_irq); > } > > -static void dwc3_qcom_enable_interrupts(struct dwc3_qcom *qcom) > +static void dwc3_qcom_enable_port_interrupts(struct dwc3_qcom_port *port) > { > - dwc3_qcom_enable_wakeup_irq(qcom->ports[0].qusb2_phy_irq, 0); > + dwc3_qcom_enable_wakeup_irq(port->qusb2_phy_irq, 0); > > /* > * Configure DP/DM line interrupts based on the USB2 device attached to > @@ -386,21 +380,37 @@ static void dwc3_qcom_enable_interrupts(struct dwc3_qcom *qcom) > * DP and DM lines as rising edge to detect HS/HS/LS device connect scenario. > */ > > - if (qcom->usb2_speed == USB_SPEED_LOW) { > - dwc3_qcom_enable_wakeup_irq(qcom->ports[0].dm_hs_phy_irq, > + if (port->usb2_speed == USB_SPEED_LOW) { > + dwc3_qcom_enable_wakeup_irq(port->dm_hs_phy_irq, > IRQ_TYPE_EDGE_FALLING); > - } else if ((qcom->usb2_speed == USB_SPEED_HIGH) || > - (qcom->usb2_speed == USB_SPEED_FULL)) { > - dwc3_qcom_enable_wakeup_irq(qcom->ports[0].dp_hs_phy_irq, > + } else if ((port->usb2_speed == USB_SPEED_HIGH) || > + (port->usb2_speed == USB_SPEED_FULL)) { > + dwc3_qcom_enable_wakeup_irq(port->dp_hs_phy_irq, > IRQ_TYPE_EDGE_FALLING); > } else { > - dwc3_qcom_enable_wakeup_irq(qcom->ports[0].dp_hs_phy_irq, > + dwc3_qcom_enable_wakeup_irq(port->dp_hs_phy_irq, > IRQ_TYPE_EDGE_RISING); > - dwc3_qcom_enable_wakeup_irq(qcom->ports[0].dm_hs_phy_irq, > + dwc3_qcom_enable_wakeup_irq(port->dm_hs_phy_irq, > IRQ_TYPE_EDGE_RISING); > } > > - dwc3_qcom_enable_wakeup_irq(qcom->ports[0].ss_phy_irq, 0); > + dwc3_qcom_enable_wakeup_irq(port->ss_phy_irq, 0); > +} > + > +static void dwc3_qcom_disable_interrupts(struct dwc3_qcom *qcom) > +{ > + int i; > + > + for (i = 0; i < qcom->num_ports; i++) > + dwc3_qcom_disable_port_interrupts(&qcom->ports[i]); > +} > + > +static void dwc3_qcom_enable_interrupts(struct dwc3_qcom *qcom) > +{ > + int i; > + > + for (i = 0; i < qcom->num_ports; i++) > + dwc3_qcom_enable_port_interrupts(&qcom->ports[i]); > } > > static int dwc3_qcom_suspend(struct dwc3_qcom *qcom, bool wakeup) > @@ -427,7 +437,8 @@ static int dwc3_qcom_suspend(struct dwc3_qcom *qcom, bool wakeup) > * freezable workqueue. > */ > if (dwc3_qcom_is_host(qcom) && wakeup) { > - qcom->usb2_speed = dwc3_qcom_read_usb2_speed(qcom); > + for (i = 0; i < qcom->num_ports; i++) > + qcom->ports[i].usb2_speed = dwc3_qcom_read_usb2_speed(qcom, i); > dwc3_qcom_enable_interrupts(qcom); > } > > -- > 2.34.1 > Acked-by: Thinh Nguyen <Thinh.Nguyen@synopsys.com> Thanks, Thinh
On Mon, Apr 08, 2024, Krishna Kurapati wrote: > Power event IRQ is used for wakeup in cases: > a) where the controller is super speed capable and missing an > ss_phy interrupt. > b) where the GIC is not capable of detecting DP/DM hs phy irq's. > > Power event IRQ stat register indicates whether high speed phy > entered and exited L2 successfully during suspend and resume. > Indicate the same for all ports of multiport. > > Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com> > Reviewed-by: Johan Hovold <johan+linaro@kernel.org> > --- > drivers/usb/dwc3/dwc3-qcom.c | 22 +++++++++++++++++----- > 1 file changed, 17 insertions(+), 5 deletions(-) > > diff --git a/drivers/usb/dwc3/dwc3-qcom.c b/drivers/usb/dwc3/dwc3-qcom.c > index 12182e0f8f45..d3e6d5d5e8bf 100644 > --- a/drivers/usb/dwc3/dwc3-qcom.c > +++ b/drivers/usb/dwc3/dwc3-qcom.c > @@ -52,6 +52,13 @@ > #define APPS_USB_AVG_BW 0 > #define APPS_USB_PEAK_BW MBps_to_icc(40) > > +static const u32 pwr_evnt_irq_stat_reg[DWC3_MAX_PORTS] = { DWC3_MAX_PORTS is not qcom specific. For qcom specific max ports, please create your own macro here. > + 0x58, > + 0x1dc, > + 0x228, > + 0x238, > +}; > + > struct dwc3_qcom_port { > int qusb2_phy_irq; > int dp_hs_phy_irq; > @@ -421,9 +428,11 @@ static int dwc3_qcom_suspend(struct dwc3_qcom *qcom, bool wakeup) > if (qcom->is_suspended) > return 0; > > - val = readl(qcom->qscratch_base + PWR_EVNT_IRQ_STAT_REG); > - if (!(val & PWR_EVNT_LPM_IN_L2_MASK)) > - dev_err(qcom->dev, "HS-PHY not in L2\n"); > + for (i = 0; i < qcom->num_ports; i++) { > + val = readl(qcom->qscratch_base + pwr_evnt_irq_stat_reg[i]); > + if (!(val & PWR_EVNT_LPM_IN_L2_MASK)) > + dev_err(qcom->dev, "port-%d HS-PHY not in L2\n", i + 1); > + } > > for (i = qcom->num_clocks - 1; i >= 0; i--) > clk_disable_unprepare(qcom->clks[i]); > @@ -472,8 +481,11 @@ static int dwc3_qcom_resume(struct dwc3_qcom *qcom, bool wakeup) > dev_warn(qcom->dev, "failed to enable interconnect: %d\n", ret); > > /* Clear existing events from PHY related to L2 in/out */ > - dwc3_qcom_setbits(qcom->qscratch_base, PWR_EVNT_IRQ_STAT_REG, > - PWR_EVNT_LPM_IN_L2_MASK | PWR_EVNT_LPM_OUT_L2_MASK); > + for (i = 0; i < qcom->num_ports; i++) { > + dwc3_qcom_setbits(qcom->qscratch_base, > + pwr_evnt_irq_stat_reg[i], > + PWR_EVNT_LPM_IN_L2_MASK | PWR_EVNT_LPM_OUT_L2_MASK); > + } > > qcom->is_suspended = false; > > -- > 2.34.1 > Whether or not you decided to create v21: Acked-by: Thinh Nguyen <Thinh.Nguyen@synopsys.com> Thanks, Thinh
On 4/9/2024 6:41 AM, Thinh Nguyen wrote: > On Mon, Apr 08, 2024, Krishna Kurapati wrote: >> Currently the DWC3 driver supports only single port controller >> which requires at least one HS PHY and at most one SS PHY. >> >> But the DWC3 USB controller can be connected to multiple ports and >> each port can have their own PHYs. Each port of the multiport >> controller can either be HS+SS capable or HS only capable >> Proper quantification of them is required to modify GUSB2PHYCFG >> and GUSB3PIPECTL registers appropriately. >> >> Add support for detecting, obtaining and configuring PHYs supported >> by a multiport controller. Limit support to multiport controllers >> with up to four ports for now (e.g. as needed for SC8280XP). >> >> Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com> >> Reviewed-by: Johan Hovold <johan+linaro@kernel.org> >> --- >> drivers/usb/dwc3/core.c | 251 ++++++++++++++++++++++++++++------------ >> drivers/usb/dwc3/core.h | 14 ++- >> drivers/usb/dwc3/drd.c | 15 ++- >> 3 files changed, 193 insertions(+), 87 deletions(-) >> > > <snip> > >> @@ -1937,6 +2020,10 @@ static int dwc3_get_num_ports(struct dwc3 *dwc) >> >> iounmap(base); >> >> + if (dwc->num_usb2_ports > DWC3_MAX_PORTS || >> + dwc->num_usb3_ports > DWC3_MAX_PORTS) >> + return -ENOMEM; > > This should be -EINVAL. > >> + >> return 0; >> } > > <snip> > >> diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h >> index 341e4c73cb2e..df2e111aa848 100644 >> --- a/drivers/usb/dwc3/core.h >> +++ b/drivers/usb/dwc3/core.h >> @@ -33,6 +33,12 @@ >> >> #include <linux/power_supply.h> >> >> +/* >> + * Maximum number of ports currently supported for multiport >> + * controllers. > > This macro here is being used per USB2 vs USB3 ports rather than USB2 + > USB3, unlike the xHCI MAXPORTS. You can clarify in the comment and > rename the macro to avoid any confusion. You can also create 2 separate > macros for number of USB2 and USB3 ports even if they share the same > value. > > As noted[*], we support have different max number of usb2 ports vs usb3 > ports. I would suggest splitting the macros. > Hi Thinh, This macro was intended only to identify how many USB2 (or USB3) Phy's were serviced/operated by this driver, not how many logical ports present (like in xHCI). I don't think it would be confusing currently given that it is only used to identify number of generic phy instances to allocate and not used for any other purpose. Once the num_usb2_ports and num_usb3_ports are read by get_num_ports(...) call, they directly indicate how many ports are HS and SS respectively. Keeping the same in mind, I returned ENOMEM above (as you mentioned) because we don't allocate more than DWC3_MAX_PORTS and if the number of hs or ss ports is more than that, we simply return ENOMEM saying the driver doesn't support operating those many phy's. > [*] https://lore.kernel.org/linux-usb/20230801013031.ft3zpoatiyfegmh6@synopsys.com/ > >> + */ >> +#define DWC3_MAX_PORTS 4 >> + >> > > But it's not a big issue whether you decided to push a new version or a > create a separate patch for the comments above. Here's my Ack: > Since this is not a bug, I would prefer to make a separate patch to rename the macros. (If that is fine). > Acked-by: Thinh Nguyen <Thinh.Nguyen@synopsys.com> > > Thanks, > Thinh
On Tue, Apr 09, 2024, Krishna Kurapati PSSNV wrote: > > > On 4/9/2024 6:41 AM, Thinh Nguyen wrote: > > On Mon, Apr 08, 2024, Krishna Kurapati wrote: > > > Currently the DWC3 driver supports only single port controller > > > which requires at least one HS PHY and at most one SS PHY. > > > > > > But the DWC3 USB controller can be connected to multiple ports and > > > each port can have their own PHYs. Each port of the multiport > > > controller can either be HS+SS capable or HS only capable > > > Proper quantification of them is required to modify GUSB2PHYCFG > > > and GUSB3PIPECTL registers appropriately. > > > > > > Add support for detecting, obtaining and configuring PHYs supported > > > by a multiport controller. Limit support to multiport controllers > > > with up to four ports for now (e.g. as needed for SC8280XP). > > > > > > Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com> > > > Reviewed-by: Johan Hovold <johan+linaro@kernel.org> > > > --- > > > drivers/usb/dwc3/core.c | 251 ++++++++++++++++++++++++++++------------ > > > drivers/usb/dwc3/core.h | 14 ++- > > > drivers/usb/dwc3/drd.c | 15 ++- > > > 3 files changed, 193 insertions(+), 87 deletions(-) > > > > > > > <snip> > > > > > @@ -1937,6 +2020,10 @@ static int dwc3_get_num_ports(struct dwc3 *dwc) > > > iounmap(base); > > > + if (dwc->num_usb2_ports > DWC3_MAX_PORTS || > > > + dwc->num_usb3_ports > DWC3_MAX_PORTS) > > > + return -ENOMEM; > > > > This should be -EINVAL. > > > > > + > > > return 0; > > > } > > > > <snip> > > > > > diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h > > > index 341e4c73cb2e..df2e111aa848 100644 > > > --- a/drivers/usb/dwc3/core.h > > > +++ b/drivers/usb/dwc3/core.h > > > @@ -33,6 +33,12 @@ > > > #include <linux/power_supply.h> > > > +/* > > > + * Maximum number of ports currently supported for multiport > > > + * controllers. > > > > This macro here is being used per USB2 vs USB3 ports rather than USB2 + > > USB3, unlike the xHCI MAXPORTS. You can clarify in the comment and > > rename the macro to avoid any confusion. You can also create 2 separate > > macros for number of USB2 and USB3 ports even if they share the same > > value. > > > > As noted[*], we support have different max number of usb2 ports vs usb3 > > ports. I would suggest splitting the macros. > > > > Hi Thinh, > > This macro was intended only to identify how many USB2 (or USB3) Phy's were > serviced/operated by this driver, not how many logical ports present (like That's not what you described in the comment right above the macro... > in xHCI). I don't think it would be confusing currently given that it is > only used to identify number of generic phy instances to allocate and not > used for any other purpose. Once the num_usb2_ports and num_usb3_ports are > read by get_num_ports(...) call, they directly indicate how many ports are Those fields are clear. But for DWC3_MAX_PORTS, based on the name and comment of the macro, it's not clear. > HS and SS respectively. Keeping the same in mind, I returned ENOMEM above > (as you mentioned) because we don't allocate more than DWC3_MAX_PORTS and if > the number of hs or ss ports is more than that, we simply return ENOMEM > saying the driver doesn't support operating those many phy's. The error code -ENOMEM indicates out of memory failure. The check condition dwc->num_usb2_ports > DWC3_MAX_PORTS indicates invalid config. There's no allocation in that check. > > > [*] https://urldefense.com/v3/__https://lore.kernel.org/linux-usb/20230801013031.ft3zpoatiyfegmh6@synopsys.com/__;!!A4F2R9G_pg!azHqgm92ENkFQrpv6Fhs6PCe210VGOAIrsuGFhrgmfaor8N_kWLu6rxkPpbeCBTLL4NbUpOWlQ0ufmP9DFwO9iFc0XdSEg$ > > > > > + */ > > > +#define DWC3_MAX_PORTS 4 > > > + > > > > > > > But it's not a big issue whether you decided to push a new version or a > > create a separate patch for the comments above. Here's my Ack: > > > > Since this is not a bug, I would prefer to make a separate patch to rename > the macros. (If that is fine). > That is fine with me. Thanks for your effort pursuing and continue working on this series. BR, Thinh
On 4/9/2024 11:43 PM, Thinh Nguyen wrote: > On Tue, Apr 09, 2024, Krishna Kurapati PSSNV wrote: >> >> >> On 4/9/2024 6:41 AM, Thinh Nguyen wrote: >>> On Mon, Apr 08, 2024, Krishna Kurapati wrote: >>>> Currently the DWC3 driver supports only single port controller >>>> which requires at least one HS PHY and at most one SS PHY. >>>> >>>> But the DWC3 USB controller can be connected to multiple ports and >>>> each port can have their own PHYs. Each port of the multiport >>>> controller can either be HS+SS capable or HS only capable >>>> Proper quantification of them is required to modify GUSB2PHYCFG >>>> and GUSB3PIPECTL registers appropriately. >>>> >>>> Add support for detecting, obtaining and configuring PHYs supported >>>> by a multiport controller. Limit support to multiport controllers >>>> with up to four ports for now (e.g. as needed for SC8280XP). >>>> >>>> Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com> >>>> Reviewed-by: Johan Hovold <johan+linaro@kernel.org> >>>> --- >>>> drivers/usb/dwc3/core.c | 251 ++++++++++++++++++++++++++++------------ >>>> drivers/usb/dwc3/core.h | 14 ++- >>>> drivers/usb/dwc3/drd.c | 15 ++- >>>> 3 files changed, 193 insertions(+), 87 deletions(-) >>>> >>> >>> <snip> >>> >>>> @@ -1937,6 +2020,10 @@ static int dwc3_get_num_ports(struct dwc3 *dwc) >>>> iounmap(base); >>>> + if (dwc->num_usb2_ports > DWC3_MAX_PORTS || >>>> + dwc->num_usb3_ports > DWC3_MAX_PORTS) >>>> + return -ENOMEM; >>> >>> This should be -EINVAL. >>> >>>> + >>>> return 0; >>>> } >>> >>> <snip> >>> >>>> diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h >>>> index 341e4c73cb2e..df2e111aa848 100644 >>>> --- a/drivers/usb/dwc3/core.h >>>> +++ b/drivers/usb/dwc3/core.h >>>> @@ -33,6 +33,12 @@ >>>> #include <linux/power_supply.h> >>>> +/* >>>> + * Maximum number of ports currently supported for multiport >>>> + * controllers. >>> >>> This macro here is being used per USB2 vs USB3 ports rather than USB2 + >>> USB3, unlike the xHCI MAXPORTS. You can clarify in the comment and >>> rename the macro to avoid any confusion. You can also create 2 separate >>> macros for number of USB2 and USB3 ports even if they share the same >>> value. >>> >>> As noted[*], we support have different max number of usb2 ports vs usb3 >>> ports. I would suggest splitting the macros. >>> >> >> Hi Thinh, >> >> This macro was intended only to identify how many USB2 (or USB3) Phy's were >> serviced/operated by this driver, not how many logical ports present (like > > That's not what you described in the comment right above the macro... > >> in xHCI). I don't think it would be confusing currently given that it is >> only used to identify number of generic phy instances to allocate and not >> used for any other purpose. Once the num_usb2_ports and num_usb3_ports are >> read by get_num_ports(...) call, they directly indicate how many ports are > > Those fields are clear. But for DWC3_MAX_PORTS, based on the name and > comment of the macro, it's not clear. > >> HS and SS respectively. Keeping the same in mind, I returned ENOMEM above >> (as you mentioned) because we don't allocate more than DWC3_MAX_PORTS and if >> the number of hs or ss ports is more than that, we simply return ENOMEM >> saying the driver doesn't support operating those many phy's. > > The error code -ENOMEM indicates out of memory failure. The check > condition dwc->num_usb2_ports > DWC3_MAX_PORTS indicates invalid config. > There's no allocation in that check. > >> >>> [*] https://urldefense.com/v3/__https://lore.kernel.org/linux-usb/20230801013031.ft3zpoatiyfegmh6@synopsys.com/__;!!A4F2R9G_pg!azHqgm92ENkFQrpv6Fhs6PCe210VGOAIrsuGFhrgmfaor8N_kWLu6rxkPpbeCBTLL4NbUpOWlQ0ufmP9DFwO9iFc0XdSEg$ >>> >>>> + */ >>>> +#define DWC3_MAX_PORTS 4 >>>> + >>>> >>> >>> But it's not a big issue whether you decided to push a new version or a >>> create a separate patch for the comments above. Here's my Ack: >>> >> >> Since this is not a bug, I would prefer to make a separate patch to rename >> the macros. (If that is fine). >> > > That is fine with me. Thanks for your effort pursuing and continue > working on this series. > Thanks Thinh. If there are no other issues, I will wait till Greg picks the series up. Thanks for the reviews throughout the series. Regards, Krishna,
On Wed, Apr 10, 2024 at 10:10:54AM +0530, Krishna Kurapati PSSNV wrote: > > > On 4/9/2024 11:43 PM, Thinh Nguyen wrote: > > On Tue, Apr 09, 2024, Krishna Kurapati PSSNV wrote: > > > > > > > > > On 4/9/2024 6:41 AM, Thinh Nguyen wrote: > > > > On Mon, Apr 08, 2024, Krishna Kurapati wrote: > > > > > Currently the DWC3 driver supports only single port controller > > > > > which requires at least one HS PHY and at most one SS PHY. > > > > > > > > > > But the DWC3 USB controller can be connected to multiple ports and > > > > > each port can have their own PHYs. Each port of the multiport > > > > > controller can either be HS+SS capable or HS only capable > > > > > Proper quantification of them is required to modify GUSB2PHYCFG > > > > > and GUSB3PIPECTL registers appropriately. > > > > > > > > > > Add support for detecting, obtaining and configuring PHYs supported > > > > > by a multiport controller. Limit support to multiport controllers > > > > > with up to four ports for now (e.g. as needed for SC8280XP). > > > > > > > > > > Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com> > > > > > Reviewed-by: Johan Hovold <johan+linaro@kernel.org> > > > > > --- > > > > > drivers/usb/dwc3/core.c | 251 ++++++++++++++++++++++++++++------------ > > > > > drivers/usb/dwc3/core.h | 14 ++- > > > > > drivers/usb/dwc3/drd.c | 15 ++- > > > > > 3 files changed, 193 insertions(+), 87 deletions(-) > > > > > > > > > > > > > <snip> > > > > > > > > > @@ -1937,6 +2020,10 @@ static int dwc3_get_num_ports(struct dwc3 *dwc) > > > > > iounmap(base); > > > > > + if (dwc->num_usb2_ports > DWC3_MAX_PORTS || > > > > > + dwc->num_usb3_ports > DWC3_MAX_PORTS) > > > > > + return -ENOMEM; > > > > > > > > This should be -EINVAL. > > > > > > > > > + > > > > > return 0; > > > > > } > > > > > > > > <snip> > > > > > > > > > diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h > > > > > index 341e4c73cb2e..df2e111aa848 100644 > > > > > --- a/drivers/usb/dwc3/core.h > > > > > +++ b/drivers/usb/dwc3/core.h > > > > > @@ -33,6 +33,12 @@ > > > > > #include <linux/power_supply.h> > > > > > +/* > > > > > + * Maximum number of ports currently supported for multiport > > > > > + * controllers. > > > > > > > > This macro here is being used per USB2 vs USB3 ports rather than USB2 + > > > > USB3, unlike the xHCI MAXPORTS. You can clarify in the comment and > > > > rename the macro to avoid any confusion. You can also create 2 separate > > > > macros for number of USB2 and USB3 ports even if they share the same > > > > value. > > > > > > > > As noted[*], we support have different max number of usb2 ports vs usb3 > > > > ports. I would suggest splitting the macros. > > > > > > > > > > Hi Thinh, > > > > > > This macro was intended only to identify how many USB2 (or USB3) Phy's were > > > serviced/operated by this driver, not how many logical ports present (like > > > > That's not what you described in the comment right above the macro... > > > > > in xHCI). I don't think it would be confusing currently given that it is > > > only used to identify number of generic phy instances to allocate and not > > > used for any other purpose. Once the num_usb2_ports and num_usb3_ports are > > > read by get_num_ports(...) call, they directly indicate how many ports are > > > > Those fields are clear. But for DWC3_MAX_PORTS, based on the name and > > comment of the macro, it's not clear. > > > > > HS and SS respectively. Keeping the same in mind, I returned ENOMEM above > > > (as you mentioned) because we don't allocate more than DWC3_MAX_PORTS and if > > > the number of hs or ss ports is more than that, we simply return ENOMEM > > > saying the driver doesn't support operating those many phy's. > > > > The error code -ENOMEM indicates out of memory failure. The check > > condition dwc->num_usb2_ports > DWC3_MAX_PORTS indicates invalid config. > > There's no allocation in that check. > > > > > > > > > [*] https://urldefense.com/v3/__https://lore.kernel.org/linux-usb/20230801013031.ft3zpoatiyfegmh6@synopsys.com/__;!!A4F2R9G_pg!azHqgm92ENkFQrpv6Fhs6PCe210VGOAIrsuGFhrgmfaor8N_kWLu6rxkPpbeCBTLL4NbUpOWlQ0ufmP9DFwO9iFc0XdSEg$ > > > > > > > > > + */ > > > > > +#define DWC3_MAX_PORTS 4 > > > > > + > > > > > > > > > > > > > But it's not a big issue whether you decided to push a new version or a > > > > create a separate patch for the comments above. Here's my Ack: > > > > > > > > > > Since this is not a bug, I would prefer to make a separate patch to rename > > > the macros. (If that is fine). > > > > > > > That is fine with me. Thanks for your effort pursuing and continue > > working on this series. > > > > Thanks Thinh. If there are no other issues, I will wait till Greg picks the > series up. Thanks for the reviews throughout the series. I can't take it yet, based on the review of this patch, so I'll wait for a new version of the series. thanks, greg k-h