| Message ID | 20240404142806.459873-1-stijn@linux-ipv6.be |
|---|---|
| State | Under Review |
| Delegated to: | Stijn Tintel |
| Headers | show |
| Series | realtek/rtl839x: Edgecore ECS4100-12PH support | expand |
On 2024-04-04 16:28, stijn@linux-ipv6.be wrote: > -netgear,gs110tpp-v1) > - ucidef_set_poe 130 "$(filter_port_list "$lan_list" "lan9 lan10")" > - ;; If adding a device, surely these remove lines should not be there?
On 4/04/2024 18:00, Paul D wrote: > On 2024-04-04 16:28, stijn@linux-ipv6.be wrote: > >> -netgear,gs110tpp-v1) >> - ucidef_set_poe 130 "$(filter_port_list "$lan_list" "lan9 lan10")" >> - ;; > If adding a device, surely these remove lines should not be there? > > Try looking closer. It's called maintaining alphabetical order.
On 4/04/2024 17:28, stijn@linux-ipv6.be wrote: > Add support for the Edgecore ECS4100-12PH, an 8-port PoE Gigabit > Ethernet switch with 2 combo RJ45/SFP and 2 SFP ports. > FYI: this patch and WIP changes are also available in my staging tree: https://git.openwrt.org/?p=openwrt/staging/stintel.git;a=shortlog;h=refs/heads/ecs4100
Hi stijn, I have some comments below. On 2024/04/04 23:28, stijn@linux-ipv6.be wrote: > Add support for the Edgecore ECS4100-12PH, an 8-port PoE Gigabit > Ethernet switch with 2 combo RJ45/SFP and 2 SFP ports. > > Hardware: > * SoC: RTL8392M > * RAM: 256MiB > * Flash: 32MiB SPI-NOR > * Ethernet: > * 8x GbE RJ45 PoE (built-in RTL8218B) > * 2x GbE RJ45 / SFP combo > * 2x SFP > * Console: RJ45 RS232 port on front panel > * PoE: Nuvoton M0516 + 2x Broadcom BCM59121 PSE > > Installation via bootloader: > * open serial console (baud rate 115200) > * interrupt boot process by pressing any key during boot > * boot the OpenWrt initramfs: > # rtk network on > # setenv bootcmd 'mtdparts default;sf probe 0;sf read 0x81000000 0x00200000 0x400000;bootm' > # tftpboot 0x8f000000 /tftpboot/openwrt-realtek-rtl839x-edgecore_ecs4100-12ph-initramfs-kernel.bin > # bootm > * copy openwrt-realtek-rtl839x-edgecore_ecs4100-12ph-squashfs-sysupgrade.bin > to /tmp and use sysupgrade to install it: > # sysupgrade /tmp/openwrt-realtek-rtl839x-edgecore_ecs4100-12ph-squashfs-sysupgrade.bin > > Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be> > --- > I took the DTS from the TIP OpenWiFi project. It was introduced in the > initial commit of their Github repo [1]. I added gpio1 and > label-mac-device, and changed rtl838x-soc in the compatible line to > rtl839x-soc. The info page and photo on svanheule's website suggest > RTL8392M, while my units use RTL8393M. My units have the exact same P/N > and revision on the PCB as in the photo. Since there appear to be units > based on RTL8392M, I'll keep the original DTS filename unless someone > tells me otherwise. > > All 4 SFP slots seem to detect SFP insertion and removal, however I > didn't manage to get a link on either of the ports. As I have very > limited experience with SFP/fiber on Linux, I'd appreciate some guidance > on how to test this properly. > > [1] https://github.com/Telecominfraproject/wlan-ap/commit/528a778e3864064bfccd8295abd1ec23da778843 > --- > package/boot/uboot-envtools/files/realtek | 1 + > .../realtek/base-files/etc/board.d/02_network | 7 +- > .../rtl8392_edgecore_ecs4100-12ph.dts | 305 ++++++++++++++++++ > target/linux/realtek/image/rtl839x.mk | 8 + > 4 files changed, 318 insertions(+), 3 deletions(-) > create mode 100644 target/linux/realtek/dts-5.15/rtl8392_edgecore_ecs4100-12ph.dts > > diff --git a/package/boot/uboot-envtools/files/realtek b/package/boot/uboot-envtools/files/realtek > index cd2446432d..4137133061 100644 > --- a/package/boot/uboot-envtools/files/realtek > +++ b/package/boot/uboot-envtools/files/realtek > @@ -37,6 +37,7 @@ zyxel,gs1900-24hp-v2) > [ -n "$idx2" ] && \ > ubootenv_add_uci_sys_config "/dev/mtd$idx2" "0x0" "0x1000" "0x10000" > ;; > +edgecore,ecs4100-12ph|\ > tplink,sg2008p-v1|\ > tplink,sg2210p-v3|\ > tplink,sg2452p-v4) > diff --git a/target/linux/realtek/base-files/etc/board.d/02_network b/target/linux/realtek/base-files/etc/board.d/02_network > index db1d99f4ec..b41eb59b2b 100644 > --- a/target/linux/realtek/base-files/etc/board.d/02_network > +++ b/target/linux/realtek/base-files/etc/board.d/02_network > @@ -80,6 +80,10 @@ d-link,dgs-1210-28mp-f) > ucidef_set_poe 370 "lan8 lan7 lan6 lan5 lan4 lan3 lan2 lan1 lan16 lan15 lan14 lan13 lan12 lan11 lan10 lan9 lan24 lan23 > lan22 lan21 lan20 lan19 lan18 lan17" > ;; > +edgecore,ecs4100-12ph|\ > +netgear,gs110tpp-v1) > + ucidef_set_poe 130 "$(filter_port_list "$lan_list" "lan9 lan10")" > + ;; > engenius,ews2910p) > ucidef_set_poe 60 "$(filter_port_list "$lan_list" "lan9 lan10")" > ;; > @@ -89,9 +93,6 @@ hpe,1920-8g-poe-65w) > hpe,1920-8g-poe-180w) > ucidef_set_poe 180 "$(filter_port_list_reversed "$lan_list" "lan9 lan10")" > ;; > -netgear,gs110tpp-v1) > - ucidef_set_poe 130 "$(filter_port_list "$lan_list" "lan9 lan10")" > - ;; > netgear,gs110tup-v1) > ucidef_set_poe 240 "$(filter_port_list "$lan_list" "lan9 lan10")" > ;; > diff --git a/target/linux/realtek/dts-5.15/rtl8392_edgecore_ecs4100-12ph.dts b/target/linux/realtek/dts-5.15/rtl8392_edgecore_ecs4100-12ph.dts > new file mode 100644 > index 0000000000..067bf24f5a > --- /dev/null > +++ b/target/linux/realtek/dts-5.15/rtl8392_edgecore_ecs4100-12ph.dts > @@ -0,0 +1,305 @@ > +// SPDX-License-Identifier: GPL-2.0-or-later > + > +#include "rtl839x.dtsi" > + > +#include <dt-bindings/input/input.h> > +#include <dt-bindings/gpio/gpio.h> > + > +/ { > + compatible = "edgecore,ecs4100-12ph", "realtek,rtl839x-soc"; > + model = "Edgecore ECS4100-12PH Switch"; > + > + aliases { > + label-mac-device = ðernet0; > + led-boot = &led_sys; > + led-failsafe = &led_sys; > + led-running = &led_sys; > + led-upgrade = &led_sys; > + }; > + > + chosen { > + bootargs = "console=ttyS0,115200"; > + }; > + > + memory@0 { > + device_type = "memory"; > + reg = <0x0 0x10000000>; > + }; > + > + gpio1: rtl8231-gpio { > + compatible = "realtek,rtl8231-gpio"; > + #gpio-cells = <2>; > + indirect-access-bus-id = <3>; > + gpio-controller; > + }; > + > + /* i2c of the left SFP cage: port 9 */ > + i2c0: i2c-gpio-0 { > + compatible = "i2c-gpio"; > + sda-gpios = <&gpio1 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; > + scl-gpios = <&gpio1 7 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; > + i2c-gpio,delay-us = <2>; > + #address-cells = <1>; > + #size-cells = <0>; > + }; > + > + sfp0: sfp-p9 { > + compatible = "sff,sfp"; > + i2c-bus = <&i2c0>; > + los-gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>; > + mod-def0-gpio = <&gpio1 8 GPIO_ACTIVE_LOW>; > + }; > + > + i2c1: i2c-gpio-1 { > + compatible = "i2c-gpio"; > + sda-gpios = <&gpio1 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; > + scl-gpios = <&gpio1 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; > + i2c-gpio,delay-us = <2>; > + #address-cells = <1>; > + #size-cells = <0>; > + }; > + > + sfp1: sfp-p10 { > + compatible = "sff,sfp"; > + i2c-bus = <&i2c1>; > + los-gpio = <&gpio0 14 GPIO_ACTIVE_HIGH>; > + mod-def0-gpio = <&gpio1 3 GPIO_ACTIVE_LOW>; > + }; > + > + i2c2: i2c-gpio-2 { > + compatible = "i2c-gpio"; > + sda-gpios = <&gpio1 22 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; > + scl-gpios = <&gpio1 23 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; > + i2c-gpio,delay-us = <2>; > + #address-cells = <1>; > + #size-cells = <0>; > + }; > + > + sfp2: sfp-p11 { > + compatible = "sff,sfp"; > + i2c-bus = <&i2c2>; > + los-gpio = <&gpio0 21 GPIO_ACTIVE_HIGH>; > + mod-def0-gpio = <&gpio1 24 GPIO_ACTIVE_LOW>; > + }; > + > + i2c3: i2c-gpio-3 { > + compatible = "i2c-gpio"; > + sda-gpios = <&gpio1 11 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; > + scl-gpios = <&gpio1 12 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; > + i2c-gpio,delay-us = <2>; > + #address-cells = <1>; > + #size-cells = <0>; > + }; > + > + sfp3: sfp-p12 { > + compatible = "sff,sfp"; > + i2c-bus = <&i2c3>; > + los-gpio = <&gpio0 22 GPIO_ACTIVE_HIGH>; > + mod-def0-gpio = <&gpio1 13 GPIO_ACTIVE_LOW>; > + }; > + > + i2c4: i2c-gpio-4 { > + compatible = "i2c-gpio"; > + sda-gpios = <&gpio1 29 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; > + scl-gpios = <&gpio1 30 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; > + i2c-gpio,delay-us = <2>; > + #address-cells = <1>; > + #size-cells = <0>; > + > + adt7470@2f { > + compatible = "adi,adt7470"; > + reg = <0x2f>; > + }; > + > + lm75b@48 { > + compatible = "nxp,lm75a"; > + reg = <0x48>; > + }; > + > + eeprom@506 { > + compatible = "atmel,24c32"; > + reg = <0x56>; > + }; > + }; > + > + watchdog { > + compatible = "linux,wdt-gpio"; > + gpios = <&gpio0 20 GPIO_ACTIVE_LOW>; > + hw_algo = "toggle"; > + hw_margin_ms = <1200>; > + }; > + > + reboot@0 { > + compatible = "edgecore,reboot"; Isn't this a "gpio-restart"? I can't find any informations about "edgecore,reboot". > + gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>; > + }; > + > + fan0: gpio-fan { > + #cooling-cells = <2>; > + compatible = "gpio-fan"; > + gpio-fan,speed-map = <0 0 3000 1>; > + gpios = <&gpio1 9 GPIO_ACTIVE_LOW>; > + status = "okay"; > + }; > +}; > + > +&gpio0 { > + poe_enable { > + gpio-hog; > + gpios = <16 GPIO_ACTIVE_HIGH>; > + output-high; > + }; > + > + poe_reset { > + gpio-hog; > + gpios = <18 GPIO_ACTIVE_HIGH>; > + output-high; > + }; > +}; > + > +&spi0 { > + status = "okay"; > + > + flash@0 { > + compatible = "jedec,spi-nor"; > + reg = <0>; > + spi-max-frequency = <10000000>; > + > + partitions { > + compatible = "fixed-partitions"; > + #address-cells = <1>; > + #size-cells = <1>; > + > + partition@0 { > + label = "u-boot"; > + reg = <0x0 0x40000>; > + read-only; > + }; > + partition@100000 { > + label = "u-boot-env"; > + reg = <0x100000 0x100000>; > + read-only; > + }; > + partition@200000 { > + label = "firmware"; > + reg = <0x200000 0xdf0000>; > + compatible = "openwrt,uimage", "denx,uimage"; > + }; > + partition@ff0000 { > + label = "certificates"; > + reg = <0xff0000 0x10000>; > + }; > + }; > + }; > +}; > + > +ðernet0 { > + mdio: mdio-bus { > + compatible = "realtek,rtl838x-mdio"; > + regmap = <ðernet0>; > + #address-cells = <1>; > + #size-cells = <0>; > + > + INTERNAL_PHY(0) > + INTERNAL_PHY(1) > + INTERNAL_PHY(2) > + INTERNAL_PHY(3) > + INTERNAL_PHY(4) > + INTERNAL_PHY(5) > + INTERNAL_PHY(6) > + INTERNAL_PHY(7) > + > + phy48: ethernet-phy@48 { > + reg = <48>; > + compatible = "ethernet-phy-ieee802.3-c22"; > + sfp = <&sfp0>; > + }; > + > + phy49: ethernet-phy@49 { > + reg = <49>; > + compatible = "ethernet-phy-ieee802.3-c22"; > + sfp = <&sfp1>; > + }; > + > + phy50: ethernet-phy@50 { > + reg = <50>; > + compatible = "ethernet-phy-ieee802.3-c22"; > + sfp = <&sfp2>; > + }; > + > + phy51: ethernet-phy@51 { > + reg = <51>; > + compatible = "ethernet-phy-ieee802.3-c22"; > + sfp = <&sfp3>; > + }; > + }; > +}; > + > +&switch0 { > + ext_io: ext-io@e4 { > + compatible = "realtek,rtl8390-eio", "syscon"; IIRC, a driver for "realtek,rtl8390-eio" is not provided on OpenWrt. You need to mux sys-led pin as a gpio[1] and define this LED using gpio-leds. [1]: https://github.com/openwrt/openwrt/blob/c7d83d4379fb2c08f22e7a4f2852aaf9b37c3790/target/linux/realtek/dts-5.15/rtl839x.dtsi#L289-L292 > + reg = <0xe4 0x17c>; > + > + led_sys: sys-led { > + active-low; > + label = "green:status"; > + linux,default-trigger = "default-on"; > + }; > + }; > + ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + SWITCH_PORT(0, 1, qsgmii) > + SWITCH_PORT(1, 2, qsgmii) > + SWITCH_PORT(2, 3, qsgmii) > + SWITCH_PORT(3, 4, qsgmii) > + SWITCH_PORT(4, 5, qsgmii) > + SWITCH_PORT(5, 6, qsgmii) > + SWITCH_PORT(6, 7, qsgmii) > + SWITCH_PORT(7, 8, qsgmii) > + > + port@48 { > + reg = <48>; > + label = "lan9"; > + phy-mode = "sgmii"; > + phy-handle = <&phy48>; > + managed = "in-band-status"; > + }; > + > + port@49 { > + reg = <49>; > + label = "lan10"; > + phy-mode = "sgmii"; > + phy-handle = <&phy49>; > + managed = "in-band-status"; > + }; > + > + port@50 { > + reg = <50>; > + label = "lan11"; > + phy-mode = "sgmii"; > + phy-handle = <&phy50>; > + managed = "in-band-status"; > + }; > + > + port@51 { > + reg = <51>; > + label = "lan12"; > + phy-mode = "sgmii"; > + phy-handle = <&phy51>; > + managed = "in-band-status"; > + }; > + > + port@52 { > + ethernet = <ðernet0>; > + reg = <52>; > + phy-mode = "qsgmii"; > + > + fixed-link { > + speed = <1000>; > + full-duplex; > + }; > + }; > + }; > +}; > diff --git a/target/linux/realtek/image/rtl839x.mk b/target/linux/realtek/image/rtl839x.mk > index 65078e0c44..90a58180fd 100644 > --- a/target/linux/realtek/image/rtl839x.mk > +++ b/target/linux/realtek/image/rtl839x.mk > @@ -9,6 +9,14 @@ define Device/d-link_dgs-1210-52 > endef > TARGET_DEVICES += d-link_dgs-1210-52 > > +define Device/edgecore_ecs4100-12ph > + SOC := rtl8392 > + DEVICE_VENDOR := Edgecore > + DEVICE_MODEL := ECS4100-12PH > + IMAGE_SIZE := 14336k > +endef > +TARGET_DEVICES += edgecore_ecs4100-12ph > + > # When the factory image won't fit anymore, it can be removed. > # New installation will be performed booting the initramfs image from > # ram and then flashing the sysupgrade image from OpenWrt Best, Hiroshi
On 2024-04-04 17:02, Stijn Tintel wrote: > On 4/04/2024 18:00, Paul D wrote: >> On 2024-04-04 16:28, stijn@linux-ipv6.be wrote: >> >>> -netgear,gs110tpp-v1) >>> - ucidef_set_poe 130 "$(filter_port_list "$lan_list" "lan9 lan10")" >>> - ;; >> If adding a device, surely these remove lines should not be there? >> >> > Try looking closer. It's called maintaining alphabetical order. > Yep.
Hi Stijn, On Thu, 2024-04-04 at 17:28 +0300, stijn@linux-ipv6.be wrote: > Add support for the Edgecore ECS4100-12PH, an 8-port PoE Gigabit > Ethernet switch with 2 combo RJ45/SFP and 2 SFP ports. > > Hardware: > * SoC: RTL8392M > * RAM: 256MiB > * Flash: 32MiB SPI-NOR > * Ethernet: > * 8x GbE RJ45 PoE (built-in RTL8218B) According to the board picture, that's not a built-in RTL8218B ;-) > * 2x GbE RJ45 / SFP combo > * 2x SFP Any idea if these go to the RTL8214FC or straight to the SoC? > * Console: RJ45 RS232 port on front panel > * PoE: Nuvoton M0516 + 2x Broadcom BCM59121 PSE > > Installation via bootloader: > * open serial console (baud rate 115200) > * interrupt boot process by pressing any key during boot > * boot the OpenWrt initramfs: > # rtk network on > # setenv bootcmd 'mtdparts default;sf probe 0;sf read 0x81000000 0x00200000 > 0x400000;bootm' This is only 4MiB. Does it limit the total total image size or just the kernel size? I suppose this also means flashing (initramfs) images from the vendor interface does not work? > # tftpboot 0x8f000000 /tftpboot/openwrt-realtek-rtl839x-edgecore_ecs4100-12ph- > initramfs-kernel.bin > # bootm > * copy openwrt-realtek-rtl839x-edgecore_ecs4100-12ph-squashfs-sysupgrade.bin > to /tmp and use sysupgrade to install it: > # sysupgrade /tmp/openwrt-realtek-rtl839x-edgecore_ecs4100-12ph-squashfs- > sysupgrade.bin > > Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be> > --- > I took the DTS from the TIP OpenWiFi project. It was introduced in the > initial commit of their Github repo [1]. I added gpio1 and > label-mac-device, and changed rtl838x-soc in the compatible line to > rtl839x-soc. The info page and photo on svanheule's website suggest > RTL8392M, while my units use RTL8393M. My units have the exact same P/N > and revision on the PCB as in the photo. Since there appear to be units > based on RTL8392M, I'll keep the original DTS filename unless someone > tells me otherwise. The RTL8392M and RTL8393M appear very similar in specs, so perhaps they are pin- compatible. Either has a lot more switching capacity than what this device provides :-) Did you check what your bootlog reports as chip ID? > > All 4 SFP slots seem to detect SFP insertion and removal, however I > didn't manage to get a link on either of the ports. As I have very > limited experience with SFP/fiber on Linux, I'd appreciate some guidance > on how to test this properly. This could also be due to a lacking implementation of the RTL8214FC phy. The SDK the drivers are based on use register stuffing values for specific SoC/phy combinations, without any form of documentation (i.e. hard to figure out what's going on). These are provided as the "firmware" files in OpenWrt, so maybe this 8393/8214FC combination just hasn't come up yet. > > [1] > https://github.com/Telecominfraproject/wlan-ap/commit/528a778e3864064bfccd8295abd1ec23da778843 > --- > [...] > diff --git a/target/linux/realtek/dts-5.15/rtl8392_edgecore_ecs4100-12ph.dts > b/target/linux/realtek/dts-5.15/rtl8392_edgecore_ecs4100-12ph.dts > new file mode 100644 > index 0000000000..067bf24f5a > --- /dev/null > +++ b/target/linux/realtek/dts-5.15/rtl8392_edgecore_ecs4100-12ph.dts > @@ -0,0 +1,305 @@ > +// SPDX-License-Identifier: GPL-2.0-or-later > + > +#include "rtl839x.dtsi" > + > +#include <dt-bindings/input/input.h> > +#include <dt-bindings/gpio/gpio.h> > + > +/ { > + compatible = "edgecore,ecs4100-12ph", "realtek,rtl839x-soc"; > + model = "Edgecore ECS4100-12PH Switch"; > + > + aliases { > + label-mac-device = ðernet0; > + led-boot = &led_sys; > + led-failsafe = &led_sys; > + led-running = &led_sys; > + led-upgrade = &led_sys; > + }; > + > + chosen { > + bootargs = "console=ttyS0,115200"; > + }; > + > + memory@0 { > + device_type = "memory"; > + reg = <0x0 0x10000000>; > + }; > + > + gpio1: rtl8231-gpio { > + compatible = "realtek,rtl8231-gpio"; > + #gpio-cells = <2>; > + indirect-access-bus-id = <3>; > + gpio-controller; > + }; > + > + /* i2c of the left SFP cage: port 9 */ Only a comment for this node, but not for the others? You can leave this one out. > + i2c0: i2c-gpio-0 { > + compatible = "i2c-gpio"; > + sda-gpios = <&gpio1 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; > + scl-gpios = <&gpio1 7 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; > + i2c-gpio,delay-us = <2>; > + #address-cells = <1>; > + #size-cells = <0>; > + }; > + > + sfp0: sfp-p9 { > + compatible = "sff,sfp"; > + i2c-bus = <&i2c0>; > + los-gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>; > + mod-def0-gpio = <&gpio1 8 GPIO_ACTIVE_LOW>; Interesting to see they mixed internal and external GPIOs. (I'm guessing this allows the kernel to support interrupts on the LoS line) [...] > + > + i2c4: i2c-gpio-4 { > + compatible = "i2c-gpio"; > + sda-gpios = <&gpio1 29 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; > + scl-gpios = <&gpio1 30 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; > + i2c-gpio,delay-us = <2>; > + #address-cells = <1>; > + #size-cells = <0>; > + > + adt7470@2f { > + compatible = "adi,adt7470"; > + reg = <0x2f>; > + }; > + > + lm75b@48 { > + compatible = "nxp,lm75a"; > + reg = <0x48>; > + }; Can you use this to define a thermal zone? See e.g. rtl8393_panasonic_m48eg-pn28480k.dts > + > + eeprom@506 { > + compatible = "atmel,24c32"; > + reg = <0x56>; > + }; Any idea what is stored here? > + }; > + > + watchdog { > + compatible = "linux,wdt-gpio"; > + gpios = <&gpio0 20 GPIO_ACTIVE_LOW>; > + hw_algo = "toggle"; > + hw_margin_ms = <1200>; > + }; > + > + reboot@0 { You'll want to check the leading whitespaces in this file. > + compatible = "edgecore,reboot"; > + gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>; > + }; See Hiroshi's comment on gpio-restart. > + > + fan0: gpio-fan { > + #cooling-cells = <2>; > + compatible = "gpio-fan"; > + gpio-fan,speed-map = <0 0 3000 1>; > + gpios = <&gpio1 9 GPIO_ACTIVE_LOW>; > + status = "okay"; > + }; > +}; > + > +&gpio0 { > + poe_enable { > + gpio-hog; > + gpios = <16 GPIO_ACTIVE_HIGH>; > + output-high; > + }; > + > + poe_reset { > + gpio-hog; > + gpios = <18 GPIO_ACTIVE_HIGH>; > + output-high; > + }; Active-high reset line hogged high? I'm reading this as "keep PoE permanently in reset". Perhaps GPIO_ACTIVE_LOW with output-low is what you're looking for. > +}; > + > +&spi0 { > + status = "okay"; > + > + flash@0 { > + compatible = "jedec,spi-nor"; > + reg = <0>; > + spi-max-frequency = <10000000>; > + > + partitions { > + compatible = "fixed-partitions"; > + #address-cells = <1>; > + #size-cells = <1>; > + > + partition@0 { > + label = "u-boot"; > + reg = <0x0 0x40000>; > + read-only; > + }; > + partition@100000 { > + label = "u-boot-env"; > + reg = <0x100000 0x100000>; > + read-only; > + }; Will you fold your the other changes in your tree into the partition layout? [...] > + > +&switch0 { > + ext_io: ext-io@e4 { > + compatible = "realtek,rtl8390-eio", "syscon"; As Hiroshi noted, this driver doesn't exist in OpenWrt. A GPIO controlled LED also offers a lot more flexibility than the two supported blinking rates in by hardware. See rtl8393_zyxel_gs1900-48.dts for an example. [...] > > +define Device/edgecore_ecs4100-12ph > + SOC := rtl8392 > + DEVICE_VENDOR := Edgecore > + DEVICE_MODEL := ECS4100-12PH > + IMAGE_SIZE := 14336k As mentioned above, you might also need to limit the kernel size to 4 MiB, if that's what the bootloader supports. Best, Sander
On 4/04/2024 19:42, INAGAKI Hiroshi wrote: > Hi stijn, Hi Hiroshi, > I have some comments below. Thanks for reviewing! > > On 2024/04/04 23:28, stijn@linux-ipv6.be wrote: >> + >> + reboot@0 { >> + compatible = "edgecore,reboot"; > > Isn't this a "gpio-restart"? I can't find any informations about > "edgecore,reboot". Changing this to gpio-restart caused the device to reboot early during boot. After commenting out the gpio-restart node and testing with gpioset, it turns out it needs to be active-low. >> + >> +&switch0 { >> + ext_io: ext-io@e4 { >> + compatible = "realtek,rtl8390-eio", "syscon"; > > IIRC, a driver for "realtek,rtl8390-eio" is not provided on OpenWrt. > You need to mux sys-led pin as a gpio[1] and define this LED using > gpio-leds. > > [1]: > https://github.com/openwrt/openwrt/blob/c7d83d4379fb2c08f22e7a4f2852aaf9b37c3790/target/linux/realtek/dts-5.15/rtl839x.dtsi#L289-L292 Done. The diag LED now exhibits the usual OpenWrt LED behaviour. Thanks, Stijn
diff --git a/package/boot/uboot-envtools/files/realtek b/package/boot/uboot-envtools/files/realtek index cd2446432d..4137133061 100644 --- a/package/boot/uboot-envtools/files/realtek +++ b/package/boot/uboot-envtools/files/realtek @@ -37,6 +37,7 @@ zyxel,gs1900-24hp-v2) [ -n "$idx2" ] && \ ubootenv_add_uci_sys_config "/dev/mtd$idx2" "0x0" "0x1000" "0x10000" ;; +edgecore,ecs4100-12ph|\ tplink,sg2008p-v1|\ tplink,sg2210p-v3|\ tplink,sg2452p-v4) diff --git a/target/linux/realtek/base-files/etc/board.d/02_network b/target/linux/realtek/base-files/etc/board.d/02_network index db1d99f4ec..b41eb59b2b 100644 --- a/target/linux/realtek/base-files/etc/board.d/02_network +++ b/target/linux/realtek/base-files/etc/board.d/02_network @@ -80,6 +80,10 @@ d-link,dgs-1210-28mp-f) ucidef_set_poe 370 "lan8 lan7 lan6 lan5 lan4 lan3 lan2 lan1 lan16 lan15 lan14 lan13 lan12 lan11 lan10 lan9 lan24 lan23 lan22 lan21 lan20 lan19 lan18 lan17" ;; +edgecore,ecs4100-12ph|\ +netgear,gs110tpp-v1) + ucidef_set_poe 130 "$(filter_port_list "$lan_list" "lan9 lan10")" + ;; engenius,ews2910p) ucidef_set_poe 60 "$(filter_port_list "$lan_list" "lan9 lan10")" ;; @@ -89,9 +93,6 @@ hpe,1920-8g-poe-65w) hpe,1920-8g-poe-180w) ucidef_set_poe 180 "$(filter_port_list_reversed "$lan_list" "lan9 lan10")" ;; -netgear,gs110tpp-v1) - ucidef_set_poe 130 "$(filter_port_list "$lan_list" "lan9 lan10")" - ;; netgear,gs110tup-v1) ucidef_set_poe 240 "$(filter_port_list "$lan_list" "lan9 lan10")" ;; diff --git a/target/linux/realtek/dts-5.15/rtl8392_edgecore_ecs4100-12ph.dts b/target/linux/realtek/dts-5.15/rtl8392_edgecore_ecs4100-12ph.dts new file mode 100644 index 0000000000..067bf24f5a --- /dev/null +++ b/target/linux/realtek/dts-5.15/rtl8392_edgecore_ecs4100-12ph.dts @@ -0,0 +1,305 @@ +// SPDX-License-Identifier: GPL-2.0-or-later + +#include "rtl839x.dtsi" + +#include <dt-bindings/input/input.h> +#include <dt-bindings/gpio/gpio.h> + +/ { + compatible = "edgecore,ecs4100-12ph", "realtek,rtl839x-soc"; + model = "Edgecore ECS4100-12PH Switch"; + + aliases { + label-mac-device = ðernet0; + led-boot = &led_sys; + led-failsafe = &led_sys; + led-running = &led_sys; + led-upgrade = &led_sys; + }; + + chosen { + bootargs = "console=ttyS0,115200"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x10000000>; + }; + + gpio1: rtl8231-gpio { + compatible = "realtek,rtl8231-gpio"; + #gpio-cells = <2>; + indirect-access-bus-id = <3>; + gpio-controller; + }; + + /* i2c of the left SFP cage: port 9 */ + i2c0: i2c-gpio-0 { + compatible = "i2c-gpio"; + sda-gpios = <&gpio1 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + scl-gpios = <&gpio1 7 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + i2c-gpio,delay-us = <2>; + #address-cells = <1>; + #size-cells = <0>; + }; + + sfp0: sfp-p9 { + compatible = "sff,sfp"; + i2c-bus = <&i2c0>; + los-gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>; + mod-def0-gpio = <&gpio1 8 GPIO_ACTIVE_LOW>; + }; + + i2c1: i2c-gpio-1 { + compatible = "i2c-gpio"; + sda-gpios = <&gpio1 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + scl-gpios = <&gpio1 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + i2c-gpio,delay-us = <2>; + #address-cells = <1>; + #size-cells = <0>; + }; + + sfp1: sfp-p10 { + compatible = "sff,sfp"; + i2c-bus = <&i2c1>; + los-gpio = <&gpio0 14 GPIO_ACTIVE_HIGH>; + mod-def0-gpio = <&gpio1 3 GPIO_ACTIVE_LOW>; + }; + + i2c2: i2c-gpio-2 { + compatible = "i2c-gpio"; + sda-gpios = <&gpio1 22 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + scl-gpios = <&gpio1 23 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + i2c-gpio,delay-us = <2>; + #address-cells = <1>; + #size-cells = <0>; + }; + + sfp2: sfp-p11 { + compatible = "sff,sfp"; + i2c-bus = <&i2c2>; + los-gpio = <&gpio0 21 GPIO_ACTIVE_HIGH>; + mod-def0-gpio = <&gpio1 24 GPIO_ACTIVE_LOW>; + }; + + i2c3: i2c-gpio-3 { + compatible = "i2c-gpio"; + sda-gpios = <&gpio1 11 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + scl-gpios = <&gpio1 12 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + i2c-gpio,delay-us = <2>; + #address-cells = <1>; + #size-cells = <0>; + }; + + sfp3: sfp-p12 { + compatible = "sff,sfp"; + i2c-bus = <&i2c3>; + los-gpio = <&gpio0 22 GPIO_ACTIVE_HIGH>; + mod-def0-gpio = <&gpio1 13 GPIO_ACTIVE_LOW>; + }; + + i2c4: i2c-gpio-4 { + compatible = "i2c-gpio"; + sda-gpios = <&gpio1 29 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + scl-gpios = <&gpio1 30 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + i2c-gpio,delay-us = <2>; + #address-cells = <1>; + #size-cells = <0>; + + adt7470@2f { + compatible = "adi,adt7470"; + reg = <0x2f>; + }; + + lm75b@48 { + compatible = "nxp,lm75a"; + reg = <0x48>; + }; + + eeprom@506 { + compatible = "atmel,24c32"; + reg = <0x56>; + }; + }; + + watchdog { + compatible = "linux,wdt-gpio"; + gpios = <&gpio0 20 GPIO_ACTIVE_LOW>; + hw_algo = "toggle"; + hw_margin_ms = <1200>; + }; + + reboot@0 { + compatible = "edgecore,reboot"; + gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>; + }; + + fan0: gpio-fan { + #cooling-cells = <2>; + compatible = "gpio-fan"; + gpio-fan,speed-map = <0 0 3000 1>; + gpios = <&gpio1 9 GPIO_ACTIVE_LOW>; + status = "okay"; + }; +}; + +&gpio0 { + poe_enable { + gpio-hog; + gpios = <16 GPIO_ACTIVE_HIGH>; + output-high; + }; + + poe_reset { + gpio-hog; + gpios = <18 GPIO_ACTIVE_HIGH>; + output-high; + }; +}; + +&spi0 { + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <10000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "u-boot"; + reg = <0x0 0x40000>; + read-only; + }; + partition@100000 { + label = "u-boot-env"; + reg = <0x100000 0x100000>; + read-only; + }; + partition@200000 { + label = "firmware"; + reg = <0x200000 0xdf0000>; + compatible = "openwrt,uimage", "denx,uimage"; + }; + partition@ff0000 { + label = "certificates"; + reg = <0xff0000 0x10000>; + }; + }; + }; +}; + +ðernet0 { + mdio: mdio-bus { + compatible = "realtek,rtl838x-mdio"; + regmap = <ðernet0>; + #address-cells = <1>; + #size-cells = <0>; + + INTERNAL_PHY(0) + INTERNAL_PHY(1) + INTERNAL_PHY(2) + INTERNAL_PHY(3) + INTERNAL_PHY(4) + INTERNAL_PHY(5) + INTERNAL_PHY(6) + INTERNAL_PHY(7) + + phy48: ethernet-phy@48 { + reg = <48>; + compatible = "ethernet-phy-ieee802.3-c22"; + sfp = <&sfp0>; + }; + + phy49: ethernet-phy@49 { + reg = <49>; + compatible = "ethernet-phy-ieee802.3-c22"; + sfp = <&sfp1>; + }; + + phy50: ethernet-phy@50 { + reg = <50>; + compatible = "ethernet-phy-ieee802.3-c22"; + sfp = <&sfp2>; + }; + + phy51: ethernet-phy@51 { + reg = <51>; + compatible = "ethernet-phy-ieee802.3-c22"; + sfp = <&sfp3>; + }; + }; +}; + +&switch0 { + ext_io: ext-io@e4 { + compatible = "realtek,rtl8390-eio", "syscon"; + reg = <0xe4 0x17c>; + + led_sys: sys-led { + active-low; + label = "green:status"; + linux,default-trigger = "default-on"; + }; + }; + ports { + #address-cells = <1>; + #size-cells = <0>; + + SWITCH_PORT(0, 1, qsgmii) + SWITCH_PORT(1, 2, qsgmii) + SWITCH_PORT(2, 3, qsgmii) + SWITCH_PORT(3, 4, qsgmii) + SWITCH_PORT(4, 5, qsgmii) + SWITCH_PORT(5, 6, qsgmii) + SWITCH_PORT(6, 7, qsgmii) + SWITCH_PORT(7, 8, qsgmii) + + port@48 { + reg = <48>; + label = "lan9"; + phy-mode = "sgmii"; + phy-handle = <&phy48>; + managed = "in-band-status"; + }; + + port@49 { + reg = <49>; + label = "lan10"; + phy-mode = "sgmii"; + phy-handle = <&phy49>; + managed = "in-band-status"; + }; + + port@50 { + reg = <50>; + label = "lan11"; + phy-mode = "sgmii"; + phy-handle = <&phy50>; + managed = "in-band-status"; + }; + + port@51 { + reg = <51>; + label = "lan12"; + phy-mode = "sgmii"; + phy-handle = <&phy51>; + managed = "in-band-status"; + }; + + port@52 { + ethernet = <ðernet0>; + reg = <52>; + phy-mode = "qsgmii"; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + }; +}; diff --git a/target/linux/realtek/image/rtl839x.mk b/target/linux/realtek/image/rtl839x.mk index 65078e0c44..90a58180fd 100644 --- a/target/linux/realtek/image/rtl839x.mk +++ b/target/linux/realtek/image/rtl839x.mk @@ -9,6 +9,14 @@ define Device/d-link_dgs-1210-52 endef TARGET_DEVICES += d-link_dgs-1210-52 +define Device/edgecore_ecs4100-12ph + SOC := rtl8392 + DEVICE_VENDOR := Edgecore + DEVICE_MODEL := ECS4100-12PH + IMAGE_SIZE := 14336k +endef +TARGET_DEVICES += edgecore_ecs4100-12ph + # When the factory image won't fit anymore, it can be removed. # New installation will be performed booting the initramfs image from # ram and then flashing the sysupgrade image from OpenWrt
Add support for the Edgecore ECS4100-12PH, an 8-port PoE Gigabit Ethernet switch with 2 combo RJ45/SFP and 2 SFP ports. Hardware: * SoC: RTL8392M * RAM: 256MiB * Flash: 32MiB SPI-NOR * Ethernet: * 8x GbE RJ45 PoE (built-in RTL8218B) * 2x GbE RJ45 / SFP combo * 2x SFP * Console: RJ45 RS232 port on front panel * PoE: Nuvoton M0516 + 2x Broadcom BCM59121 PSE Installation via bootloader: * open serial console (baud rate 115200) * interrupt boot process by pressing any key during boot * boot the OpenWrt initramfs: # rtk network on # setenv bootcmd 'mtdparts default;sf probe 0;sf read 0x81000000 0x00200000 0x400000;bootm' # tftpboot 0x8f000000 /tftpboot/openwrt-realtek-rtl839x-edgecore_ecs4100-12ph-initramfs-kernel.bin # bootm * copy openwrt-realtek-rtl839x-edgecore_ecs4100-12ph-squashfs-sysupgrade.bin to /tmp and use sysupgrade to install it: # sysupgrade /tmp/openwrt-realtek-rtl839x-edgecore_ecs4100-12ph-squashfs-sysupgrade.bin Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be> --- I took the DTS from the TIP OpenWiFi project. It was introduced in the initial commit of their Github repo [1]. I added gpio1 and label-mac-device, and changed rtl838x-soc in the compatible line to rtl839x-soc. The info page and photo on svanheule's website suggest RTL8392M, while my units use RTL8393M. My units have the exact same P/N and revision on the PCB as in the photo. Since there appear to be units based on RTL8392M, I'll keep the original DTS filename unless someone tells me otherwise. All 4 SFP slots seem to detect SFP insertion and removal, however I didn't manage to get a link on either of the ports. As I have very limited experience with SFP/fiber on Linux, I'd appreciate some guidance on how to test this properly. [1] https://github.com/Telecominfraproject/wlan-ap/commit/528a778e3864064bfccd8295abd1ec23da778843 --- package/boot/uboot-envtools/files/realtek | 1 + .../realtek/base-files/etc/board.d/02_network | 7 +- .../rtl8392_edgecore_ecs4100-12ph.dts | 305 ++++++++++++++++++ target/linux/realtek/image/rtl839x.mk | 8 + 4 files changed, 318 insertions(+), 3 deletions(-) create mode 100644 target/linux/realtek/dts-5.15/rtl8392_edgecore_ecs4100-12ph.dts