diff mbox series

e1000: add support for i225-IT

Message ID 20240304152338.93453-1-marjolaine.amate@odyssee-systemes.fr
State Accepted
Commit 85d44e424a32b49f2c9ddf002a684e43bb7828c1
Delegated to: Ramon Fried
Headers show
Series e1000: add support for i225-IT | expand

Commit Message

Marjolaine Amate March 4, 2024, 3:23 p.m. UTC 
This patch adds support for i225-IT in e1000 driver.
Add e1000_phy_igc.

Signed-off-by: Marjolaine Amate <marjolaine.amate@odyssee-systemes.fr>
---
 drivers/net/e1000.c | 15 ++++++++++++++-
 drivers/net/e1000.h |  2 ++
 include/pci_ids.h   |  2 ++
 3 files changed, 18 insertions(+), 1 deletion(-)

Comments

Tom Rini March 28, 2024, 3:09 p.m. UTC | #1 
On Mon, Mar 04, 2024 at 04:23:38PM +0100, Marjolaine Amate wrote:

> This patch adds support for i225-IT in e1000 driver.
> Add e1000_phy_igc.
> 
> Signed-off-by: Marjolaine Amate <marjolaine.amate@odyssee-systemes.fr>

Applied to u-boot/next, thanks!
diff mbox series

Patch

diff --git a/drivers/net/e1000.c b/drivers/net/e1000.c
index 84a2a7cf90..4e7ba66677 100644
--- a/drivers/net/e1000.c
+++ b/drivers/net/e1000.c
@@ -116,6 +116,8 @@  static struct pci_device_id e1000_supported[] = {
 	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_I210_SERDES) },
 	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_I210_SERDES_FLASHLESS) },
 	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_I210_1000BASEKX) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_I225_UNPROGRAMMED) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_I225_IT) },
 
 	{}
 };
@@ -1575,6 +1577,8 @@  e1000_set_mac_type(struct e1000_hw *hw)
 	case PCI_DEVICE_ID_INTEL_I210_SERDES:
 	case PCI_DEVICE_ID_INTEL_I210_SERDES_FLASHLESS:
 	case PCI_DEVICE_ID_INTEL_I210_1000BASEKX:
+	case PCI_DEVICE_ID_INTEL_I225_UNPROGRAMMED:
+	case PCI_DEVICE_ID_INTEL_I225_IT:
 		hw->mac_type = e1000_igb;
 		break;
 	default:
@@ -3258,7 +3262,8 @@  e1000_setup_copper_link(struct e1000_hw *hw)
 		if (ret_val)
 			return ret_val;
 	} else if (hw->phy_type == e1000_phy_m88 ||
-		hw->phy_type == e1000_phy_igb) {
+		hw->phy_type == e1000_phy_igb ||
+		hw->phy_type == e1000_phy_igc) {
 		ret_val = e1000_copper_link_mgp_setup(hw);
 		if (ret_val)
 			return ret_val;
@@ -4531,6 +4536,8 @@  e1000_get_phy_cfg_done(struct e1000_hw *hw)
 	case e1000_igb:
 		while (timeout) {
 			if (hw->mac_type == e1000_igb) {
+				if (hw->phy_type == e1000_phy_igc)
+					break;
 				if (E1000_READ_REG(hw, I210_EEMNGCTL) & cfg_mask)
 					break;
 			} else {
@@ -4769,6 +4776,7 @@  e1000_phy_reset(struct e1000_hw *hw)
 	case e1000_phy_igp_3:
 	case e1000_phy_ife:
 	case e1000_phy_igb:
+	case e1000_phy_igc:
 		ret_val = e1000_phy_hw_reset(hw);
 		if (ret_val)
 			return ret_val;
@@ -4834,6 +4842,9 @@  static int e1000_set_phy_type (struct e1000_hw *hw)
 	case I210_I_PHY_ID:
 		hw->phy_type = e1000_phy_igb;
 		break;
+	case I225_I_PHY_ID:
+		hw->phy_type = e1000_phy_igc;
+		break;
 		/* Fall Through */
 	default:
 		/* Should never have loaded on this device */
@@ -4941,6 +4952,8 @@  e1000_detect_gig_phy(struct e1000_hw *hw)
 	case e1000_igb:
 		if (hw->phy_id == I210_I_PHY_ID)
 			match = true;
+		if (hw->phy_id == I225_I_PHY_ID)
+			match = true;
 		break;
 	default:
 		DEBUGOUT("Invalid MAC type %d\n", hw->mac_type);
diff --git a/drivers/net/e1000.h b/drivers/net/e1000.h
index f788394da8..e1311126a3 100644
--- a/drivers/net/e1000.h
+++ b/drivers/net/e1000.h
@@ -212,6 +212,7 @@  typedef enum {
 	e1000_phy_igp_3,
 	e1000_phy_ife,
 	e1000_phy_igb,
+	e1000_phy_igc,
 	e1000_phy_bm,
 	e1000_phy_undefined = 0xFF
 } e1000_phy_type;
@@ -2420,6 +2421,7 @@  struct e1000_hw {
 #define BME1000_E_PHY_ID     0x01410CB0
 
 #define I210_I_PHY_ID		0x01410C00
+#define I225_I_PHY_ID		0x67C9DCC0
 
 /* Miscellaneous PHY bit definitions. */
 #define PHY_PREAMBLE			0xFFFFFFFF
diff --git a/include/pci_ids.h b/include/pci_ids.h
index b63bf45168..f1886c3a75 100644
--- a/include/pci_ids.h
+++ b/include/pci_ids.h
@@ -2710,6 +2710,8 @@ 
 #define PCI_DEVICE_ID_INTEL_I211_COPPER			0x1539
 #define PCI_DEVICE_ID_INTEL_I210_COPPER_FLASHLESS	0x157b
 #define PCI_DEVICE_ID_INTEL_I210_SERDES_FLASHLESS	0x157c
+#define PCI_DEVICE_ID_INTEL_I225_UNPROGRAMMED		0x15dF
+#define PCI_DEVICE_ID_INTEL_I225_IT			0x0d9f
 #define PCI_DEVICE_ID_INTEL_80960_RP	0x1960
 #define PCI_DEVICE_ID_INTEL_82840_HB	0x1a21
 #define PCI_DEVICE_ID_INTEL_82845_HB	0x1a30