| Message ID | 1a0c62cd-27d3-40e3-b424-9b2056739a84@yahoo.co.jp |
|---|---|
| State | New |
| Headers | show |
| Series | xtensa: Add supplementary split pattern for "*addsubx" | expand |
On Thu, Mar 21, 2024 at 4:36 PM Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp> wrote: > > int test(int a) { > return a * 4 + 30000; > } > > In the example above, since Xtensa has instructions to add register value > scaled by 2, 4 or 8 (and corresponding define_insns), we would expect them > to be used but not, because it is transformed before reaching the RTL > generation pass as below: > > int test(int a) { > return (a + 7500) * 4; > } > > Fortunately, the RTL combination pass tries a splitting pattern that matches > the first example, so it is easy to solve by defining that pattern. > > gcc/ChangeLog: > > * config/xtensa/xtensa.md: Add new split pattern described above. > --- > gcc/config/xtensa/xtensa.md | 14 ++++++++++++++ > 1 file changed, 14 insertions(+) Regtested for target=xtensa-linux-uclibc, no new regressions. Committed to master.
diff --git a/gcc/config/xtensa/xtensa.md b/gcc/config/xtensa/xtensa.md index 5cdf4dffe70..fbe40ec671a 100644 --- a/gcc/config/xtensa/xtensa.md +++ b/gcc/config/xtensa/xtensa.md @@ -194,6 +194,20 @@ (set_attr "mode" "SI") (set_attr "length" "3")]) +(define_split + [(set (match_operand:SI 0 "register_operand") + (plus:SI (ashift:SI (match_operand:SI 1 "register_operand") + (match_operand:SI 3 "addsubx_operand")) + (match_operand:SI 2 "const_int_operand")))] + "TARGET_ADDX && can_create_pseudo_p ()" + [(set (match_dup 0) + (plus:SI (ashift:SI (match_dup 1) + (match_dup 3)) + (match_dup 2)))] +{ + operands[2] = force_reg (SImode, operands[2]); +}) + (define_expand "adddi3" [(set (match_operand:DI 0 "register_operand") (plus:DI (match_operand:DI 1 "register_operand")
int test(int a) { return a * 4 + 30000; } In the example above, since Xtensa has instructions to add register value scaled by 2, 4 or 8 (and corresponding define_insns), we would expect them to be used but not, because it is transformed before reaching the RTL generation pass as below: int test(int a) { return (a + 7500) * 4; } Fortunately, the RTL combination pass tries a splitting pattern that matches the first example, so it is easy to solve by defining that pattern. gcc/ChangeLog: * config/xtensa/xtensa.md: Add new split pattern described above. --- gcc/config/xtensa/xtensa.md | 14 ++++++++++++++ 1 file changed, 14 insertions(+)