Message ID | 20240304-rk3588-saradc-v3-3-7424e2ed5d3b@theobroma-systems.com |
---|---|
State | Accepted |
Delegated to: | Kever Yang |
Headers | show |
Series | rockchip: add support for SARADCv2 and RK806 PMIC and regulators | expand |
On 2024/3/4 19:29, Quentin Schulz wrote: > From: William Wu <william.wu@rock-chips.com> > > On RK809 in PMIC_POWER_ENX registers, in order to set or clear a bit N, > the bit at offset N + 4 needs to be set otherwise nothing is done. > > This fixes the inability to modify the SWITCH state on RK809. > > Cc: Quentin Schulz <foss+uboot@0leil.net> > Signed-off-by: William Wu <william.wu@rock-chips.com> > [reworded commit log] > Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Thanks, - Kever > --- > drivers/power/regulator/rk8xx.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/power/regulator/rk8xx.c b/drivers/power/regulator/rk8xx.c > index 97d73ac95e0..e905df3a800 100644 > --- a/drivers/power/regulator/rk8xx.c > +++ b/drivers/power/regulator/rk8xx.c > @@ -901,7 +901,7 @@ static int switch_set_enable(struct udevice *dev, bool enable) > case RK809_ID: > mask = (1 << (sw + 2)) | (1 << (sw + 6)); > ret = pmic_clrsetbits(dev->parent, RK817_POWER_EN(3), mask, > - enable ? mask : 0); > + enable ? mask : (1 << (sw + 6))); > break; > case RK818_ID: > mask = 1 << 6; >
diff --git a/drivers/power/regulator/rk8xx.c b/drivers/power/regulator/rk8xx.c index 97d73ac95e0..e905df3a800 100644 --- a/drivers/power/regulator/rk8xx.c +++ b/drivers/power/regulator/rk8xx.c @@ -901,7 +901,7 @@ static int switch_set_enable(struct udevice *dev, bool enable) case RK809_ID: mask = (1 << (sw + 2)) | (1 << (sw + 6)); ret = pmic_clrsetbits(dev->parent, RK817_POWER_EN(3), mask, - enable ? mask : 0); + enable ? mask : (1 << (sw + 6))); break; case RK818_ID: mask = 1 << 6;