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[00/15] arm64: renesas: Add R-Car V4M and Gray Hawk Single support

Message ID cover.1704726960.git.geert+renesas@glider.be
Headers show
Series arm64: renesas: Add R-Car V4M and Gray Hawk Single support | expand

Message

Geert Uytterhoeven Jan. 8, 2024, 3:33 p.m. UTC
Hi all,

This patch series adds initial support for the Renesas R-Car V4M
(R8A779G0) SoC and the Renesas Gray Hawk Single development board.

As both driver code and DTS have hard dependencies on DT binding
definitions, all patches in this series are supposed to go in through
the renesas-devel, renesas-clk, and/or renesas-pmdomain trees, using a
shared branch for DT binding definitions, as usual.

Note that this series does not include the DT binding update for the
HSCIF serial ports, as Greg does not like receiving new patches during
the merge window.

For testing, this series can be found at
https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git/log/?h=topic/v4m-gray-hawk-single-v1

Thanks for your comments (especially about the naming of the compatible
value and DTB for Gray Hawk Single :-)!

Cong Dang (1):
  clk: renesas: cpg-mssr: Add support for R-Car V4M

Duy Nguyen (6):
  dt-bindings: clock: Add R8A779H0 V4M CPG Core Clock Definitions
  dt-bindings: power: renesas,rcar-sysc: Document R-Car V4M support
  dt-bindings: power: Add r8a779h0 SYSC power domain definitions
  pmdomain: renesas: r8a779h0-sysc: Add r8a779h0 support
  soc: renesas: Identify R-Car V4M
  soc: renesas: rcar-rst: Add support for R-Car V4M

Geert Uytterhoeven (6):
  dt-bindings: clock: renesas,cpg-mssr: Document R-Car V4M support
  dt-bindings: reset: renesas,rst: Document R-Car V4M support
  dt-bindings: soc: renesas: Document R-Car V4M Gray Hawk Single
  clk: renesas: rcar-gen4: Add support for FRQCRC1
  soc: renesas: Introduce ARCH_RCAR_GEN4
  arm64: dts: renesas: Add Gray Hawk Single board support

Hai Pham (1):
  arm64: dts: renesas: Add Renesas R8A779H0 SoC support

Linh Phung (1):
  arm64: defconfig: Enable R8A779H0 SoC

 .../bindings/clock/renesas,cpg-mssr.yaml      |   1 +
 .../bindings/power/renesas,rcar-sysc.yaml     |   1 +
 .../bindings/reset/renesas,rst.yaml           |   1 +
 .../bindings/soc/renesas/renesas.yaml         |   6 +
 arch/arm64/boot/dts/renesas/Makefile          |   2 +
 .../dts/renesas/r8a779h0-gray-hawk-single.dts |  52 ++++
 arch/arm64/boot/dts/renesas/r8a779h0.dtsi     | 121 +++++++++
 arch/arm64/configs/defconfig                  |   1 +
 drivers/clk/renesas/Kconfig                   |   5 +
 drivers/clk/renesas/Makefile                  |   1 +
 drivers/clk/renesas/r8a779h0-cpg-mssr.c       | 240 ++++++++++++++++++
 drivers/clk/renesas/rcar-gen4-cpg.c           |  10 +-
 drivers/clk/renesas/renesas-cpg-mssr.c        |   6 +
 drivers/clk/renesas/renesas-cpg-mssr.h        |   1 +
 drivers/pmdomain/renesas/Kconfig              |   4 +
 drivers/pmdomain/renesas/Makefile             |   1 +
 drivers/pmdomain/renesas/r8a779h0-sysc.c      |  55 ++++
 drivers/pmdomain/renesas/rcar-gen4-sysc.c     |   3 +
 drivers/pmdomain/renesas/rcar-gen4-sysc.h     |   1 +
 drivers/soc/renesas/Kconfig                   |  17 +-
 drivers/soc/renesas/rcar-rst.c                |   1 +
 drivers/soc/renesas/renesas-soc.c             |   8 +
 include/dt-bindings/clock/r8a779h0-cpg-mssr.h |  96 +++++++
 include/dt-bindings/power/r8a779h0-sysc.h     |  49 ++++
 24 files changed, 678 insertions(+), 5 deletions(-)
 create mode 100644 arch/arm64/boot/dts/renesas/r8a779h0-gray-hawk-single.dts
 create mode 100644 arch/arm64/boot/dts/renesas/r8a779h0.dtsi
 create mode 100644 drivers/clk/renesas/r8a779h0-cpg-mssr.c
 create mode 100644 drivers/pmdomain/renesas/r8a779h0-sysc.c
 create mode 100644 include/dt-bindings/clock/r8a779h0-cpg-mssr.h
 create mode 100644 include/dt-bindings/power/r8a779h0-sysc.h

Comments

Niklas Söderlund Jan. 10, 2024, 12:13 p.m. UTC | #1
Hi Geert,

Thanks for your work.

On 2024-01-08 16:33:46 +0100, Geert Uytterhoeven wrote:
> R-Car V4H and V4M have a second Frequency Control Register C.
> Add support for this by treating bit field offsets beyond 31 as
> referring to the second register.
> 
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>

> ---
> Tested by enabling CLOCK_ALLOW_WRITE_DEBUGFS and checking the impact of
> CPU core clk rate on CPU core speed on R-Car V4M.
> ---
>  drivers/clk/renesas/rcar-gen4-cpg.c | 10 ++++++++--
>  1 file changed, 8 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/clk/renesas/rcar-gen4-cpg.c b/drivers/clk/renesas/rcar-gen4-cpg.c
> index c68d8b987054131b..a2bbdad021ed8e95 100644
> --- a/drivers/clk/renesas/rcar-gen4-cpg.c
> +++ b/drivers/clk/renesas/rcar-gen4-cpg.c
> @@ -179,7 +179,8 @@ static struct clk * __init cpg_pll_clk_register(const char *name,
>   */
>  #define CPG_FRQCRB			0x00000804
>  #define CPG_FRQCRB_KICK			BIT(31)
> -#define CPG_FRQCRC			0x00000808
> +#define CPG_FRQCRC0			0x00000808
> +#define CPG_FRQCRC1			0x000008e0
>  
>  struct cpg_z_clk {
>  	struct clk_hw hw;
> @@ -304,7 +305,12 @@ static struct clk * __init cpg_z_clk_register(const char *name,
>  	init.parent_names = &parent_name;
>  	init.num_parents = 1;
>  
> -	zclk->reg = reg + CPG_FRQCRC;
> +	if (offset < 32) {
> +		zclk->reg = reg + CPG_FRQCRC0;
> +	} else {
> +		zclk->reg = reg + CPG_FRQCRC1;
> +		offset -= 32;
> +	}
>  	zclk->kick_reg = reg + CPG_FRQCRB;
>  	zclk->hw.init = &init;
>  	zclk->mask = GENMASK(offset + 4, offset);
> -- 
> 2.34.1
> 
>
Ulf Hansson Jan. 15, 2024, 4:38 p.m. UTC | #2
- trimmed cc-list

On Mon, 8 Jan 2024 at 16:34, Geert Uytterhoeven <geert+renesas@glider.be> wrote:
>
> From: Duy Nguyen <duy.nguyen.rh@renesas.com>
>
> Add support for R-Car V4M (R8A779H0) SoC power areas to the R-Car SYSC
> driver.
>
> Signed-off-by: Duy Nguyen <duy.nguyen.rh@renesas.com>
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

To make sure we agree on the merge strategy; should I pick up $subject
patch, patch3 and patch4 through my pmdomain tree? DT patches, like
patch3 and patch4, I should share as usual via my immutable "dt"
branch, so you can pull it into your renesas tree?

Kind regards
Uffe

> ---
> Changes compared to the BSP:
>   - Move from drivers/soc/renesas/ to drivers/pmdomain/renesas/,
>   - Include rcar-gen4-sysc glue from "soc: renesas: rcar-gen4-sysc:
>     Introduce R-Car Gen4 SYSC driver",
>   - Remove unneeded includes,
>   - Align second column,
>   - Fix names of "a33dga" and "a23dgb" domains,
>   - Add missing "a3cr[012]" domains.
> ---
>  drivers/pmdomain/renesas/Kconfig          |  4 ++
>  drivers/pmdomain/renesas/Makefile         |  1 +
>  drivers/pmdomain/renesas/r8a779h0-sysc.c  | 55 +++++++++++++++++++++++
>  drivers/pmdomain/renesas/rcar-gen4-sysc.c |  3 ++
>  drivers/pmdomain/renesas/rcar-gen4-sysc.h |  1 +
>  5 files changed, 64 insertions(+)
>  create mode 100644 drivers/pmdomain/renesas/r8a779h0-sysc.c
>
> diff --git a/drivers/pmdomain/renesas/Kconfig b/drivers/pmdomain/renesas/Kconfig
> index 80bf2cf8b60e6f63..54acb4b1ec7c4892 100644
> --- a/drivers/pmdomain/renesas/Kconfig
> +++ b/drivers/pmdomain/renesas/Kconfig
> @@ -71,6 +71,10 @@ config SYSC_R8A779G0
>         bool "System Controller support for R-Car V4H" if COMPILE_TEST
>         select SYSC_RCAR_GEN4
>
> +config SYSC_R8A779H0
> +       bool "System Controller support for R-Car V4M" if COMPILE_TEST
> +       select SYSC_RCAR_GEN4
> +
>  config SYSC_RMOBILE
>         bool "System Controller support for R-Mobile" if COMPILE_TEST
>
> diff --git a/drivers/pmdomain/renesas/Makefile b/drivers/pmdomain/renesas/Makefile
> index e306e396fc8c10e3..89180f19c23be732 100644
> --- a/drivers/pmdomain/renesas/Makefile
> +++ b/drivers/pmdomain/renesas/Makefile
> @@ -24,6 +24,7 @@ obj-$(CONFIG_SYSC_R8A77995)   += r8a77995-sysc.o
>  obj-$(CONFIG_SYSC_R8A779A0)    += r8a779a0-sysc.o
>  obj-$(CONFIG_SYSC_R8A779F0)    += r8a779f0-sysc.o
>  obj-$(CONFIG_SYSC_R8A779G0)    += r8a779g0-sysc.o
> +obj-$(CONFIG_SYSC_R8A779H0)     += r8a779h0-sysc.o
>  # Family
>  obj-$(CONFIG_SYSC_RCAR)                += rcar-sysc.o
>  obj-$(CONFIG_SYSC_RCAR_GEN4)   += rcar-gen4-sysc.o
> diff --git a/drivers/pmdomain/renesas/r8a779h0-sysc.c b/drivers/pmdomain/renesas/r8a779h0-sysc.c
> new file mode 100644
> index 0000000000000000..bf3fd50dc8dccaf0
> --- /dev/null
> +++ b/drivers/pmdomain/renesas/r8a779h0-sysc.c
> @@ -0,0 +1,55 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Renesas R-Car V4M System Controller
> + *
> + * Copyright (C) 2016-2017 Glider bvba
> + * Copyright (C) 2023 Renesas Electronics Corp
> + */
> +
> +#include <linux/kernel.h>
> +
> +#include <dt-bindings/power/r8a779h0-sysc.h>
> +
> +#include "rcar-gen4-sysc.h"
> +
> +static struct rcar_gen4_sysc_area r8a779h0_areas[] __initdata = {
> +       { "always-on",  R8A779H0_PD_ALWAYS_ON, -1, PD_ALWAYS_ON },
> +       { "c4",         R8A779H0_PD_C4, R8A779H0_PD_ALWAYS_ON },
> +       { "a2e0d0",     R8A779H0_PD_A2E0D0, R8A779H0_PD_C4, PD_SCU },
> +       { "a1e0d0c0",   R8A779H0_PD_A1E0D0C0, R8A779H0_PD_A2E0D0, PD_CPU_NOCR },
> +       { "a1e0d0c1",   R8A779H0_PD_A1E0D0C1, R8A779H0_PD_A2E0D0, PD_CPU_NOCR },
> +       { "a1e0d0c2",   R8A779H0_PD_A1E0D0C2, R8A779H0_PD_A2E0D0, PD_CPU_NOCR },
> +       { "a1e0d0c3",   R8A779H0_PD_A1E0D0C3, R8A779H0_PD_A2E0D0, PD_CPU_NOCR },
> +       { "a3cr0",      R8A779H0_PD_A3CR0, R8A779H0_PD_ALWAYS_ON, PD_CPU_NOCR },
> +       { "a3cr1",      R8A779H0_PD_A3CR1, R8A779H0_PD_ALWAYS_ON, PD_CPU_NOCR },
> +       { "a3cr2",      R8A779H0_PD_A3CR2, R8A779H0_PD_ALWAYS_ON, PD_CPU_NOCR },
> +       { "a33dga",     R8A779H0_PD_A33DGA, R8A779H0_PD_C4 },
> +       { "a23dgb",     R8A779H0_PD_A23DGB, R8A779H0_PD_A33DGA },
> +       { "a3vip0",     R8A779H0_PD_A3VIP0, R8A779H0_PD_C4 },
> +       { "a3vip2",     R8A779H0_PD_A3VIP2, R8A779H0_PD_C4 },
> +       { "a3dul",      R8A779H0_PD_A3DUL, R8A779H0_PD_C4 },
> +       { "a3isp0",     R8A779H0_PD_A3ISP0, R8A779H0_PD_C4 },
> +       { "a2cn0",      R8A779H0_PD_A2CN0, R8A779H0_PD_C4 },
> +       { "a1cn0",      R8A779H0_PD_A1CN0, R8A779H0_PD_A2CN0 },
> +       { "a1dsp0",     R8A779H0_PD_A1DSP0, R8A779H0_PD_A2CN0 },
> +       { "a1dsp1",     R8A779H0_PD_A1DSP1, R8A779H0_PD_A2CN0 },
> +       { "a2imp01",    R8A779H0_PD_A2IMP01, R8A779H0_PD_C4 },
> +       { "a2psc",      R8A779H0_PD_A2PSC, R8A779H0_PD_C4 },
> +       { "a2dma",      R8A779H0_PD_A2DMA, R8A779H0_PD_C4 },
> +       { "a2cv0",      R8A779H0_PD_A2CV0, R8A779H0_PD_C4 },
> +       { "a2cv1",      R8A779H0_PD_A2CV1, R8A779H0_PD_C4 },
> +       { "a2cv2",      R8A779H0_PD_A2CV2, R8A779H0_PD_C4 },
> +       { "a2cv3",      R8A779H0_PD_A2CV3, R8A779H0_PD_C4 },
> +       { "a3imr0",     R8A779H0_PD_A3IMR0, R8A779H0_PD_C4 },
> +       { "a3imr1",     R8A779H0_PD_A3IMR1, R8A779H0_PD_C4 },
> +       { "a3imr2",     R8A779H0_PD_A3IMR2, R8A779H0_PD_C4 },
> +       { "a3imr3",     R8A779H0_PD_A3IMR3, R8A779H0_PD_C4 },
> +       { "a3vc",       R8A779H0_PD_A3VC, R8A779H0_PD_C4 },
> +       { "a3pci",      R8A779H0_PD_A3PCI, R8A779H0_PD_C4 },
> +       { "a2pciphy",   R8A779H0_PD_A2PCIPHY, R8A779H0_PD_A3PCI },
> +};
> +
> +const struct rcar_gen4_sysc_info r8a779h0_sysc_info __initconst = {
> +       .areas = r8a779h0_areas,
> +       .num_areas = ARRAY_SIZE(r8a779h0_areas),
> +};
> diff --git a/drivers/pmdomain/renesas/rcar-gen4-sysc.c b/drivers/pmdomain/renesas/rcar-gen4-sysc.c
> index 9e5e6e077abc081c..728248659a97e8cc 100644
> --- a/drivers/pmdomain/renesas/rcar-gen4-sysc.c
> +++ b/drivers/pmdomain/renesas/rcar-gen4-sysc.c
> @@ -284,6 +284,9 @@ static const struct of_device_id rcar_gen4_sysc_matches[] __initconst = {
>  #endif
>  #ifdef CONFIG_SYSC_R8A779G0
>         { .compatible = "renesas,r8a779g0-sysc", .data = &r8a779g0_sysc_info },
> +#endif
> +#ifdef CONFIG_SYSC_R8A779H0
> +       { .compatible = "renesas,r8a779h0-sysc", .data = &r8a779h0_sysc_info },
>  #endif
>         { /* sentinel */ }
>  };
> diff --git a/drivers/pmdomain/renesas/rcar-gen4-sysc.h b/drivers/pmdomain/renesas/rcar-gen4-sysc.h
> index 388cfa8f8f9fd656..fdf843aa51134f87 100644
> --- a/drivers/pmdomain/renesas/rcar-gen4-sysc.h
> +++ b/drivers/pmdomain/renesas/rcar-gen4-sysc.h
> @@ -40,5 +40,6 @@ struct rcar_gen4_sysc_info {
>  extern const struct rcar_gen4_sysc_info r8a779a0_sysc_info;
>  extern const struct rcar_gen4_sysc_info r8a779f0_sysc_info;
>  extern const struct rcar_gen4_sysc_info r8a779g0_sysc_info;
> +extern const struct rcar_gen4_sysc_info r8a779h0_sysc_info;
>
>  #endif /* __SOC_RENESAS_RCAR_GEN4_SYSC_H__ */
> --
> 2.34.1
>
Geert Uytterhoeven Jan. 15, 2024, 4:59 p.m. UTC | #3
Hi Ulf,

On Mon, Jan 15, 2024 at 5:39 PM Ulf Hansson <ulf.hansson@linaro.org> wrote:
> - trimmed cc-list

CC krzk ;-)

> On Mon, 8 Jan 2024 at 16:34, Geert Uytterhoeven <geert+renesas@glider.be> wrote:
> > From: Duy Nguyen <duy.nguyen.rh@renesas.com>
> >
> > Add support for R-Car V4M (R8A779H0) SoC power areas to the R-Car SYSC
> > driver.
> >
> > Signed-off-by: Duy Nguyen <duy.nguyen.rh@renesas.com>
> > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
>
> To make sure we agree on the merge strategy; should I pick up $subject
> patch, patch3 and patch4 through my pmdomain tree? DT patches, like
> patch3 and patch4, I should share as usual via my immutable "dt"
> branch, so you can pull it into your renesas tree?

Thanks, that would be great!

However, please note that Krzysztof wants me to add a vendor-prefix
to DT binding definition files[1], so there will be a v2.

[1] include/dt-bindings/power/r8a779h0-sysc.h

Gr{oetje,eeting}s,

                        Geert
Wolfram Sang Jan. 24, 2024, 10:41 a.m. UTC | #4
On Mon, Jan 08, 2024 at 04:33:46PM +0100, Geert Uytterhoeven wrote:
> R-Car V4H and V4M have a second Frequency Control Register C.
> Add support for this by treating bit field offsets beyond 31 as
> referring to the second register.
> 
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
> Tested by enabling CLOCK_ALLOW_WRITE_DEBUGFS and checking the impact of
> CPU core clk rate on CPU core speed on R-Car V4M.

Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Wolfram Sang Jan. 24, 2024, 10:48 a.m. UTC | #5
On Mon, Jan 08, 2024 at 04:33:49PM +0100, Geert Uytterhoeven wrote:
> Currently, all Kconfig symbols for R-Car Gen4 SoCs select the
> ARCH_RCAR_GEN3 SoC family symbol, which might confuse the casual reader.
> 
> Fix this by introducing a new SoC family symbol for R-Car Gen4 SoCs.
> For now this just selects ARCH_RCAR_GEN3, to avoid duplication, and to
> relax dependencies.
> 
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---

Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>

> Once "[PATCH] i2c: rcar: Prepare for the advent of ARCH_RCAR_GEN4"[1]
> has been applied, ARCH_RCAR_GEN4 can stop selecting ARCH_RCAR_GEN3.

Oh, that's me :)

> I'm open for suggestions how to improve this.
> Perhaps factor out common parts into ARCH_RCAR?

I kinda like the situation after this patch. I'd think using ARCH_RCAR
might hurt readability. Also, if Gen5 needs to modify ARCH_RCAR, then we
need to fix up old archs. Potential regressions ahead.
Wolfram Sang Jan. 24, 2024, 10:49 a.m. UTC | #6
On Mon, Jan 08, 2024 at 04:33:50PM +0100, Geert Uytterhoeven wrote:
> From: Duy Nguyen <duy.nguyen.rh@renesas.com>
> 
> Add support for identifying the R-Car V4M (R8A779H0) SoC.
> 
> Signed-off-by: Duy Nguyen <duy.nguyen.rh@renesas.com>
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Wolfram Sang Jan. 24, 2024, 10:51 a.m. UTC | #7
On Mon, Jan 08, 2024 at 04:33:51PM +0100, Geert Uytterhoeven wrote:
> From: Duy Nguyen <duy.nguyen.rh@renesas.com>
> 
> Add support for the R-Car V4M (R8A779H0) SoC to the R-Car RST driver.
> 
> Signed-off-by: Duy Nguyen <duy.nguyen.rh@renesas.com>
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>

> ---
> Early firmware versions may not enable WDT resets, so you may need to do
> s/rcar_rst_gen4/rcar_rst_v3u/ for testing.

See, how useful this V3U patch has become ;)
Wolfram Sang Jan. 24, 2024, 10:52 a.m. UTC | #8
On Mon, Jan 08, 2024 at 04:33:53PM +0100, Geert Uytterhoeven wrote:
> Add initial support for the Renesas Gray Hawk Single board, which is
> based on the R-Car V4M (R8A779H0) SoC:
>   - Memory,
>   - Crystal oscillators,
>   - Serial console.
> 
> Based on the White Hawk Single DTS, and on a patch for the Gray Hawk
> board stack in the BSP by Hai Pham.
> 
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
> An alternative naming candidate would be "r8a779h0-gray-hawk-s.dts".

As said in another patch, I like the current naming.

> As the Gray Hawk and White Hawk board stacks share all boards except for
> the CPU board, we might be able to reuse white-hawk-common.dtsi[1] once
> all needed SoC support has been added to r8a779h0.dtsi.

Sounds great.

> [1] "[PATCH/RFC 0/7] arm64: dts: renesas: Add support for more R-Car V4H
>      and White Hawk variants"
>     https://lore.kernel.org/all/cover.1702309604.git.geert+renesas@glider.be

I will check it next.
Wolfram Sang Jan. 24, 2024, 10:53 a.m. UTC | #9
On Mon, Jan 08, 2024 at 04:33:54PM +0100, Geert Uytterhoeven wrote:
> From: Linh Phung <linh.phung.jy@renesas.com>
> 
> Enable support for the Renesas R-Car V4M (R8A779H0) SoC in the ARM64
> defconfig.
> 
> Signed-off-by: Linh Phung <linh.phung.jy@renesas.com>
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>