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[v2,0/8] arm64: dts: qcom: sa8295p: Enable GPU

Message ID 20231220-sa8295p-gpu-v2-0-4763246b72c0@quicinc.com
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Series arm64: dts: qcom: sa8295p: Enable GPU | expand

Message

Bjorn Andersson Dec. 22, 2023, 4:39 a.m. UTC
Due to the different PMIC configuration found in the SA8295P platform,
compared to SC8280XP, the VDD_GFX pads are supplied by an dedicated
MAX20411 LDO.

Support for expressing the regulator supply is added to the binding, the
support for enabling the parent supply for GX is added, the missing
gfx.lvl power-domain is dropped, and the DeviceTree is wired up to
enable the GPU in this configuration.

Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
---
Changes in v2:
- Made gpucc binding accept either power-domain or vdd-gfx-supply
- Updated comment in gdsc_gx_do_nothing_enable()
- Added a comment for the /delete-property/ power-domains
- Fixed node and property sort order in dts
- Switched zap firmware to use mbn file
- Link to v1: https://lore.kernel.org/r/20231220-sa8295p-gpu-v1-0-d8cdf2257f97@quicinc.com

---
Bjorn Andersson (8):
      dt-bindings: clock: qcom: Allow VDD_GFX supply to GX
      clk: qcom: gdsc: Enable supply reglator in GPU GX handler
      clk: qcom: gpucc-sc8280xp: Add external supply for GX gdsc
      soc: qcom: rpmhpd: Drop SA8540P gfx.lvl
      arm64: dts: qcom: sa8540p: Drop gfx.lvl as power-domain for gpucc
      arm64: dts: qcom: sa8295p-adp: add max20411
      arm64: dts: qcom: sa8295p-adp: Enable GPU
      arm64: defconfig: Enable MAX20411 regulator driver

 .../devicetree/bindings/clock/qcom,gpucc.yaml      | 16 +++++
 arch/arm64/boot/dts/qcom/sa8295p-adp.dts           | 69 ++++++++++++++++++++++
 arch/arm64/boot/dts/qcom/sa8540p.dtsi              |  3 +
 arch/arm64/configs/defconfig                       |  1 +
 drivers/clk/qcom/gdsc.c                            | 12 +++-
 drivers/clk/qcom/gpucc-sc8280xp.c                  |  1 +
 drivers/pmdomain/qcom/rpmhpd.c                     |  1 -
 7 files changed, 100 insertions(+), 3 deletions(-)
---
base-commit: 20d857259d7d10cd0d5e8b60608455986167cfad
change-id: 20231220-sa8295p-gpu-51c5f343e3ec

Best regards,

Comments

Dmitry Baryshkov Dec. 22, 2023, 6:31 a.m. UTC | #1
On Fri, 22 Dec 2023 at 06:40, Bjorn Andersson <quic_bjorande@quicinc.com> wrote:
>
> With the necessary support in place for supplying VDD_GFX from the
> MAX20411 regulator, enable the GPU clock controller, GMU, Adreno SMMU
> and the GPU on the SA8295P ADP.
>
> Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
> ---
>  arch/arm64/boot/dts/qcom/sa8295p-adp.dts | 29 +++++++++++++++++++++++++++++
>  1 file changed, 29 insertions(+)

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Konrad Dybcio Dec. 27, 2023, 1:07 a.m. UTC | #2
On 22.12.2023 05:39, Bjorn Andersson wrote:
> The GX GDSC is modelled to aid the GMU in powering down the GPU in the
> event that the GPU crashes, so that it can be restarted again. But in
> the event that the power-domain is supplied through a dedicated
> regulator (in contrast to being a subdomin of another power-domain),
> something needs to turn that regulator on, both to make sure things are
> powered and to match the operation in gdsc_disable().
> 
> Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>

Konrad
Konrad Dybcio Dec. 27, 2023, 1:07 a.m. UTC | #3
On 22.12.2023 05:39, Bjorn Andersson wrote:
> On SA8295P and SA8540P the GFX rail is powered by a dedicated external
> regulator, instead of the rpmh-controlled "gfx.lvl".
> 
> Define the "vdd-gfx" as the supply regulator for the GDSC, to cause the
> gdsc logic to look for, and control, this external power supply.
> 
> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
> ---
Worth noting the regulator framework will create a virtual supply
for the normal 8280

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>

Konrad
Konrad Dybcio Dec. 27, 2023, 1:08 a.m. UTC | #4
On 22.12.2023 05:39, Bjorn Andersson wrote:
> On SA8295P and SA8540P gfx.lvl is not provdied by rpmh, but rather is
> handled by an external regulator (max20411). Drop gfx.lvl from the list
> of power-domains exposed on this platform.
> 
> Fixes: f68f1cb3437d ("soc: qcom: rpmhpd: add sc8280xp & sa8540p rpmh power-domains")
> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>

Konrad
Konrad Dybcio Dec. 27, 2023, 1:08 a.m. UTC | #5
On 22.12.2023 05:39, Bjorn Andersson wrote:
> From: Bjorn Andersson <andersson@kernel.org>
> 
> The SA8295P ADP has a MAX20411 LDO regulator on I2C 12, supplying the
> VDD_GFX pads. Enable the bus and add the maxim,max20411 device on the
> bus.
> 
> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
> ---

>  &tlmm {
>  	pcie2a_default: pcie2a-default-state {
>  		clkreq-n-pins {
> @@ -728,4 +760,12 @@ wake-n-pins {
>  			bias-pull-up;
>  		};
>  	};
> +
> +	qup1_i2c4_state: qup1-i2c4-state {
> +		pins = "gpio0", "gpio1";
> +		function = "qup12";
> +
> +		drive-strength = <2>;
unnecessary newline

Konrad
Konrad Dybcio Dec. 27, 2023, 1:09 a.m. UTC | #6
On 22.12.2023 05:39, Bjorn Andersson wrote:
> With the necessary support in place for supplying VDD_GFX from the
> MAX20411 regulator, enable the GPU clock controller, GMU, Adreno SMMU
> and the GPU on the SA8295P ADP.
> 
> Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
> ---
[...]

> +&gpucc {
> +	vdd-gfx-supply = <&vdd_gfx>;
> +	status = "okay";
> +};
Already enabled

> +
> +&gmu {
> +	status = "okay";
> +};
> +
> +&gpu {
> +	status = "okay";
> +
> +	zap-shader {
> +		memory-region = <&gpu_mem>;
> +		firmware-name = "qcom/sa8295p/a690_zap.mbn";
> +	};
> +};
> +
> +&gpu_smmu {
> +	status = "okay";
> +};
Already enabled


Konrad
Konrad Dybcio Dec. 27, 2023, 1:10 a.m. UTC | #7
On 22.12.2023 05:39, Bjorn Andersson wrote:
> The SA8295P and SA8540P uses an external regulator (max20411), and
> gfx.lvl is not provided by rpmh. Drop the power-domains property of the
> gpucc node to reflect this.
> 
> Fixes: eec51ab2fd6f ("arm64: dts: qcom: sc8280xp: Add GPU related nodes")
> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>

Konrad
Bjorn Andersson Dec. 27, 2023, 8:21 p.m. UTC | #8
On Wed, Dec 27, 2023 at 02:09:47AM +0100, Konrad Dybcio wrote:
> On 22.12.2023 05:39, Bjorn Andersson wrote:
> > With the necessary support in place for supplying VDD_GFX from the
> > MAX20411 regulator, enable the GPU clock controller, GMU, Adreno SMMU
> > and the GPU on the SA8295P ADP.
> > 
> > Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
> > ---
> [...]
> 
> > +&gpucc {
> > +	vdd-gfx-supply = <&vdd_gfx>;
> > +	status = "okay";
> > +};
> Already enabled
> 

No, we're disabling these in sa8540p.dtsi, so they need to be re-enabled
here.

I don't remember if it's because the attempt to bring up gfx.lvl or if
it's the attempt to operate the GPU components without adequate VDD_GFX,
that is causing the issue...but either way, we don't survive boot.


It's possible that we could move the max20411 up to sa8540p.dtsi to
avoid the intermediate disable, but I'm not confident that it's "part of
the platform"...

Regards,
Bjorn

> > +
> > +&gmu {
> > +	status = "okay";
> > +};
> > +
> > +&gpu {
> > +	status = "okay";
> > +
> > +	zap-shader {
> > +		memory-region = <&gpu_mem>;
> > +		firmware-name = "qcom/sa8295p/a690_zap.mbn";
> > +	};
> > +};
> > +
> > +&gpu_smmu {
> > +	status = "okay";
> > +};
> Already enabled
> 
> 
> Konrad
Konrad Dybcio Dec. 30, 2023, 12:22 p.m. UTC | #9
On 27.12.2023 21:21, Bjorn Andersson wrote:
> On Wed, Dec 27, 2023 at 02:09:47AM +0100, Konrad Dybcio wrote:
>> On 22.12.2023 05:39, Bjorn Andersson wrote:
>>> With the necessary support in place for supplying VDD_GFX from the
>>> MAX20411 regulator, enable the GPU clock controller, GMU, Adreno SMMU
>>> and the GPU on the SA8295P ADP.
>>>
>>> Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
>>> ---
>> [...]
>>
>>> +&gpucc {
>>> +	vdd-gfx-supply = <&vdd_gfx>;
>>> +	status = "okay";
>>> +};
>> Already enabled
>>
> 
> No, we're disabling these in sa8540p.dtsi, so they need to be re-enabled
> here.
> 
> I don't remember if it's because the attempt to bring up gfx.lvl or if
> it's the attempt to operate the GPU components without adequate VDD_GFX,
> that is causing the issue...but either way, we don't survive boot.
Oh right!

On 8155 touching mmcx, lcx or lmx would kaboom the platform..

> 
> 
> It's possible that we could move the max20411 up to sa8540p.dtsi to
> avoid the intermediate disable, but I'm not confident that it's "part of
> the platform"...
Yeah, it's probably a question that is impossible to answer, as my
wild assumption is that all designs are ADP-derived anyway..

Konrad
Ulf Hansson Jan. 3, 2024, 12:54 p.m. UTC | #10
On Fri, 22 Dec 2023 at 05:39, Bjorn Andersson <quic_bjorande@quicinc.com> wrote:
>
> On SA8295P and SA8540P gfx.lvl is not provdied by rpmh, but rather is
> handled by an external regulator (max20411). Drop gfx.lvl from the list
> of power-domains exposed on this platform.
>
> Fixes: f68f1cb3437d ("soc: qcom: rpmhpd: add sc8280xp & sa8540p rpmh power-domains")
> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>

I guess it's easier if you funnel this through the soc tree - or you
prefer if I take it through my pmdomain tree?

No matter what, feel free to add:
Acked-by: Ulf Hansson <ulf.hansson@linaro.org>

Kind regards
Uffe

> ---
>  drivers/pmdomain/qcom/rpmhpd.c | 1 -
>  1 file changed, 1 deletion(-)
>
> diff --git a/drivers/pmdomain/qcom/rpmhpd.c b/drivers/pmdomain/qcom/rpmhpd.c
> index 3078896b1300..27a73ff72614 100644
> --- a/drivers/pmdomain/qcom/rpmhpd.c
> +++ b/drivers/pmdomain/qcom/rpmhpd.c
> @@ -217,7 +217,6 @@ static struct rpmhpd *sa8540p_rpmhpds[] = {
>         [SC8280XP_CX] = &cx,
>         [SC8280XP_CX_AO] = &cx_ao,
>         [SC8280XP_EBI] = &ebi,
> -       [SC8280XP_GFX] = &gfx,
>         [SC8280XP_LCX] = &lcx,
>         [SC8280XP_LMX] = &lmx,
>         [SC8280XP_MMCX] = &mmcx,
>
> --
> 2.25.1
>
Bjorn Andersson Jan. 8, 2024, 6:23 p.m. UTC | #11
On Wed, Dec 27, 2023 at 02:07:52AM +0100, Konrad Dybcio wrote:
> On 22.12.2023 05:39, Bjorn Andersson wrote:
> > On SA8295P and SA8540P the GFX rail is powered by a dedicated external
> > regulator, instead of the rpmh-controlled "gfx.lvl".
> > 
> > Define the "vdd-gfx" as the supply regulator for the GDSC, to cause the
> > gdsc logic to look for, and control, this external power supply.
> > 
> > Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> > Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
> > ---
> Worth noting the regulator framework will create a virtual supply
> for the normal 8280
> 

You're right. No functional harm, but that's not very nice.

I don't think we have any benefit from having a dummy supply, if the DT
author failed to provide a proper one, so it seems reasonable to switch
gdsc to devm_regulator_get_optional().

Regards,
Bjorn

> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
> 
> Konrad