Message ID | 20231218120712.16438-1-manivannan.sadhasivam@linaro.org |
---|---|
Headers | show |
Series | Fix Qcom UFS PHY clocks | expand |
On 18.12.2023 13:07, Manivannan Sadhasivam wrote: > QMP PHY used in MSM8996 requires 2 clocks: > > * ref - 19.2MHz reference clock from RPM > * qref - QREF clock from GCC > > Fixes: 27520210e881 ("arm64: dts: qcom: msm8996: Use generic QMP driver for UFS") > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> > --- Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Konrad
On 18.12.2023 13:07, Manivannan Sadhasivam wrote: > QMP PHY used in MSM8998 requires 3 clocks: > > * ref - 19.2MHz reference clock from RPM > * ref_aux - Auxiliary reference clock from GCC > * qref - QREF clock from GCC > > Fixes: cd3dbe2a4e6c ("arm64: dts: qcom: msm8998: Add UFS nodes") > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> > --- Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Konrad
On 18.12.2023 13:07, Manivannan Sadhasivam wrote: > QMP PHY used in SDM845 requires 3 clocks: > > * ref - 19.2MHz reference clock from RPMh > * ref_aux - Auxiliary reference clock from GCC > * qref - QREF clock from GCC > > While at it, let's move 'clocks' property before 'clock-names' to match > the style used commonly. > > Fixes: cc16687fbd74 ("arm64: dts: qcom: sdm845: add UFS controller") > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> > --- Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Konrad
On 18.12.2023 13:07, Manivannan Sadhasivam wrote: > QMP PHY used in SM6115 requires 3 clocks: > > * ref - 19.2MHz reference clock from RPM > * ref_aux - Auxiliary reference clock from GCC > * qref - QREF clock from GCC > > Fixes: 97e563bf5ba1 ("arm64: dts: qcom: sm6115: Add basic soc dtsi") > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> > --- Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Konrad
On 18.12.2023 13:07, Manivannan Sadhasivam wrote: > QMP PHY used in SM6125 requires 3 clocks: > > * ref - 19.2MHz reference clock from RPM > * ref_aux - Auxiliary reference clock from GCC > * qref - QREF clock from GCC > > Fixes: f8399e8a2f80 ("arm64: dts: qcom: sm6125: Add UFS nodes") > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> > --- Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Konrad
On 18.12.2023 13:07, Manivannan Sadhasivam wrote: > QMP PHY used in SM6350 requires 3 clocks: > > * ref - 19.2MHz reference clock from RPMh > * ref_aux - Auxiliary reference clock from GCC > * qref - QREF clock from GCC > > While at it, let's move 'clocks' property before 'clock-names' to match > the style used commonly. > > Fixes: 5a814af5fc22 ("arm64: dts: qcom: sm6350: Add UFS nodes") > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> > --- Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Konrad
On 18.12.2023 13:07, Manivannan Sadhasivam wrote: > QMP PHY used in SM8150 requires 3 clocks: > > * ref - 19.2MHz reference clock from RPMh > * ref_aux - Auxiliary reference clock from GCC > * qref - QREF clock from GCC > > While at it, let's move 'clocks' property before 'clock-names' to match > the style used commonly. > > Fixes: 3834a2e92229 ("arm64: dts: qcom: sm8150: Add ufs nodes") > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> > --- Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Konrad
On 18.12.2023 13:07, Manivannan Sadhasivam wrote: > QMP PHY used in SM8250 requires 3 clocks: > > * ref - 19.2MHz reference clock from RPMh > * ref_aux - Auxiliary reference clock from GCC > * qref - QREF clock from GCC > > While at it, let's move 'clocks' property before 'clock-names' to match > the style used commonly. > > Fixes: b7e2fba06622 ("arm64: dts: qcom: sm8250: Add UFS controller and PHY") > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> > --- Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Konrad
On 18.12.2023 13:07, Manivannan Sadhasivam wrote: > QMP PHY used in SC8180X requires 3 clocks: > > * ref - 19.2MHz reference clock from RPMh > * ref_aux - Auxiliary reference clock from GCC > * qref - QREF clock from GCC > > Fixes: 8575f197b077 ("arm64: dts: qcom: Introduce the SC8180x platform") > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> > --- Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Konrad
On 18.12.2023 13:07, Manivannan Sadhasivam wrote: > QMP PHY used in SC8280XP requires 3 clocks: > > * ref - 19.2MHz reference clock from RPMh > * ref_aux - Auxiliary reference clock from GCC > * qref - QREF clock from GCC > > Fixes: 152d1faf1e2f ("arm64: dts: qcom: add SC8280XP platform") > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> > --- > arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 18 ++++++++++++------ > 1 file changed, 12 insertions(+), 6 deletions(-) > > diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi > index cad59af7ccef..37344abbe8bf 100644 > --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi > +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi > @@ -2256,9 +2256,12 @@ ufs_mem_phy: phy@1d87000 { > compatible = "qcom,sc8280xp-qmp-ufs-phy"; > reg = <0 0x01d87000 0 0x1000>; > > - clocks = <&gcc GCC_UFS_CARD_CLKREF_CLK>, > - <&gcc GCC_UFS_PHY_PHY_AUX_CLK>; > - clock-names = "ref", "ref_aux"; > + clocks = <&rpmhcc RPMH_CXO_CLK>, > + <&gcc GCC_UFS_PHY_PHY_AUX_CLK>, > + <&gcc GCC_UFS_CARD_CLKREF_CLK>; GCC_UFS_REF_CLKREF_CLK ? Konrad
On 18.12.2023 13:07, Manivannan Sadhasivam wrote: > QMP PHY used in SM8350 requires 3 clocks: > > * ref - 19.2MHz reference clock from RPMh > * ref_aux - Auxiliary reference clock from GCC > * qref - QREF clock from GCC > > While at it, let's move 'clocks' property before 'clock-names' to match > the style used commonly. > > Fixes: 59c7cf814783 ("arm64: dts: qcom: sm8350: Add UFS nodes") > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> > --- Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Konrad
On 18.12.2023 13:07, Manivannan Sadhasivam wrote: > QMP PHY used in SM8550 requires 3 clocks: > > * ref - 19.2MHz reference clock from RPMh > * ref_aux - Auxiliary reference clock from GCC > * qref - QREF clock from TCSR > > Fixes: 35cf1aaab169 ("arm64: dts: qcom: sm8550: Add UFS host controller and phy nodes") > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> > --- Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Konrad
On 18.12.2023 13:07, Manivannan Sadhasivam wrote: > Add missing QREF clocks for UFS MEM and UFS CARD controllers. > > Fixes: 4433594bbe5d ("clk: qcom: gcc: Add global clock controller driver for SC8180x") > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> > --- Looks the same like in 8150, and I assume you checked it with some docs, so: Acked-by: Konrad Dybcio <konrad.dybcio@linaro.org> Konrad
On 12/18/2023 8:07 PM, Manivannan Sadhasivam wrote: > QMP PHY used in SM8550 requires 3 clocks: > > * ref - 19.2MHz reference clock from RPMh > * ref_aux - Auxiliary reference clock from GCC > * qref - QREF clock from TCSR > > Fixes: 35cf1aaab169 ("arm64: dts: qcom: sm8550: Add UFS host controller and phy nodes") > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> > --- > arch/arm64/boot/dts/qcom/sm8550.dtsi | 9 ++++++--- > 1 file changed, 6 insertions(+), 3 deletions(-) > > diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi > index baa8540868a4..386ffd0d72c4 100644 > --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi > +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi > @@ -1891,9 +1891,12 @@ crypto: crypto@1dfa000 { > ufs_mem_phy: phy@1d80000 { > compatible = "qcom,sm8550-qmp-ufs-phy"; > reg = <0x0 0x01d80000 0x0 0x2000>; > - clocks = <&tcsr TCSR_UFS_CLKREF_EN>, > - <&gcc GCC_UFS_PHY_PHY_AUX_CLK>; > - clock-names = "ref", "ref_aux"; > + clocks = <&rpmhcc RPMH_CXO_CLK>, > + <&gcc GCC_UFS_PHY_PHY_AUX_CLK>, > + <&tcsr TCSR_UFS_CLKREF_EN>; > + clock-names = "ref", > + "ref_aux", > + "qref"; > > power-domains = <&gcc UFS_MEM_PHY_GDSC>; > Reviewed-by: Can Guo <quic_cang@quicinc.com>
On Wed, Dec 20, 2023 at 01:35:27AM +0100, Konrad Dybcio wrote: > On 18.12.2023 13:07, Manivannan Sadhasivam wrote: > > QMP PHY used in SC8280XP requires 3 clocks: > > > > * ref - 19.2MHz reference clock from RPMh > > * ref_aux - Auxiliary reference clock from GCC > > * qref - QREF clock from GCC > > > > Fixes: 152d1faf1e2f ("arm64: dts: qcom: add SC8280XP platform") > > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> > > --- > > arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 18 ++++++++++++------ > > 1 file changed, 12 insertions(+), 6 deletions(-) > > > > diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi > > index cad59af7ccef..37344abbe8bf 100644 > > --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi > > +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi > > @@ -2256,9 +2256,12 @@ ufs_mem_phy: phy@1d87000 { > > compatible = "qcom,sc8280xp-qmp-ufs-phy"; > > reg = <0 0x01d87000 0 0x1000>; > > > > - clocks = <&gcc GCC_UFS_CARD_CLKREF_CLK>, > > - <&gcc GCC_UFS_PHY_PHY_AUX_CLK>; > > - clock-names = "ref", "ref_aux"; > > + clocks = <&rpmhcc RPMH_CXO_CLK>, > > + <&gcc GCC_UFS_PHY_PHY_AUX_CLK>, > > + <&gcc GCC_UFS_CARD_CLKREF_CLK>; > GCC_UFS_REF_CLKREF_CLK I'm not sure about this CLK. So I kept it as it is until I verify it. - Mani > > ? > > Konrad
On 20.12.2023 09:30, Manivannan Sadhasivam wrote: > On Wed, Dec 20, 2023 at 01:35:27AM +0100, Konrad Dybcio wrote: >> On 18.12.2023 13:07, Manivannan Sadhasivam wrote: >>> QMP PHY used in SC8280XP requires 3 clocks: >>> >>> * ref - 19.2MHz reference clock from RPMh >>> * ref_aux - Auxiliary reference clock from GCC >>> * qref - QREF clock from GCC >>> >>> Fixes: 152d1faf1e2f ("arm64: dts: qcom: add SC8280XP platform") >>> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> >>> --- >>> arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 18 ++++++++++++------ >>> 1 file changed, 12 insertions(+), 6 deletions(-) >>> >>> diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi >>> index cad59af7ccef..37344abbe8bf 100644 >>> --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi >>> +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi >>> @@ -2256,9 +2256,12 @@ ufs_mem_phy: phy@1d87000 { >>> compatible = "qcom,sc8280xp-qmp-ufs-phy"; >>> reg = <0 0x01d87000 0 0x1000>; >>> >>> - clocks = <&gcc GCC_UFS_CARD_CLKREF_CLK>, >>> - <&gcc GCC_UFS_PHY_PHY_AUX_CLK>; >>> - clock-names = "ref", "ref_aux"; >>> + clocks = <&rpmhcc RPMH_CXO_CLK>, >>> + <&gcc GCC_UFS_PHY_PHY_AUX_CLK>, >>> + <&gcc GCC_UFS_CARD_CLKREF_CLK>; >> GCC_UFS_REF_CLKREF_CLK > > I'm not sure about this CLK. So I kept it as it is until I verify it. I am quite sure everything *UFS_CARD_* refers to the other UFS host.. Konrad
On Wed, Jan 03, 2024 at 02:50:04PM +0100, Konrad Dybcio wrote: > On 20.12.2023 09:30, Manivannan Sadhasivam wrote: > > On Wed, Dec 20, 2023 at 01:35:27AM +0100, Konrad Dybcio wrote: > >> On 18.12.2023 13:07, Manivannan Sadhasivam wrote: > >>> QMP PHY used in SC8280XP requires 3 clocks: > >>> > >>> * ref - 19.2MHz reference clock from RPMh > >>> * ref_aux - Auxiliary reference clock from GCC > >>> * qref - QREF clock from GCC > >>> > >>> Fixes: 152d1faf1e2f ("arm64: dts: qcom: add SC8280XP platform") > >>> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> > >>> --- > >>> arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 18 ++++++++++++------ > >>> 1 file changed, 12 insertions(+), 6 deletions(-) > >>> > >>> diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi > >>> index cad59af7ccef..37344abbe8bf 100644 > >>> --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi > >>> +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi > >>> @@ -2256,9 +2256,12 @@ ufs_mem_phy: phy@1d87000 { > >>> compatible = "qcom,sc8280xp-qmp-ufs-phy"; > >>> reg = <0 0x01d87000 0 0x1000>; > >>> > >>> - clocks = <&gcc GCC_UFS_CARD_CLKREF_CLK>, > >>> - <&gcc GCC_UFS_PHY_PHY_AUX_CLK>; > >>> - clock-names = "ref", "ref_aux"; > >>> + clocks = <&rpmhcc RPMH_CXO_CLK>, > >>> + <&gcc GCC_UFS_PHY_PHY_AUX_CLK>, > >>> + <&gcc GCC_UFS_CARD_CLKREF_CLK>; > >> GCC_UFS_REF_CLKREF_CLK > > > > I'm not sure about this CLK. So I kept it as it is until I verify it. > I am quite sure everything *UFS_CARD_* refers to the other UFS host.. > We cannot infer that from the naming. There is a chance that the same clock could be routed to MEM_PHY internally. Moreover, there is no separate "ref" clock for MEM_PHY though. - Mani
On Mon, 18 Dec 2023 17:36:56 +0530, Manivannan Sadhasivam wrote: > This series fixes the clocks supplied to QMP PHY IPs in the Qcom SoCs. All > of the Qcom SoCs except MSM8996 require 3 clocks for QMP UFS: > > * ref - 19.2MHz reference clock from RPM/RPMh > * ref_aux - Auxiliary reference clock from GCC > * qref - QREF clock from GCC or TCSR (TCSR since SM8550) > > [...] Applied, thanks! [01/16] dt-bindings: phy: qmp-ufs: Fix PHY clocks commit: b0bcec86f47b44c98a23c31d54dd3963e27761a2 [02/16] phy: qcom-qmp-ufs: Switch to devm_clk_bulk_get_all() API commit: 2668cae8b64bf25c4c7a39eb2cb0012c92153c11 Best regards,