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[0/3] imx8qm/imx8qxp: Support for inverted PWM

Message ID 20231106095205.231210-1-alexander.stein@ew.tq-group.com
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Series imx8qm/imx8qxp: Support for inverted PWM | expand

Message

Alexander Stein Nov. 6, 2023, 9:52 a.m. UTC
Hi,

this small series adds support for inverted PWM output i.MX8QM/QXP.
Driver is already there, but #pwm-cells needs to be adjusted in DT.
While at it, also DT bindings constraints are added to ensure the proper value.

Thanks
Alexander

Alexander Stein (3):
  dt-bindings: pwm: imx-pwm: Add constraints for #pwm-cells
  arm64: dts: freescale: imx8-ss-lsio: Fix #pwm-cells
  arm64: dts: freescale: imx8-ss-dma: Fix #pwm-cells

 .../devicetree/bindings/pwm/imx-pwm.yaml      | 20 ++++++++++++++++---
 .../arm64/boot/dts/freescale/imx8-ss-dma.dtsi |  2 +-
 .../boot/dts/freescale/imx8-ss-lsio.dtsi      |  8 ++++----
 3 files changed, 22 insertions(+), 8 deletions(-)

Comments

Uwe Kleine-König Nov. 6, 2023, 10:48 a.m. UTC | #1
Hello,

[again Cc -= Philippe Schenker]

On Mon, Nov 06, 2023 at 10:52:04AM +0100, Alexander Stein wrote:
> i.MX8QM/QXP supports inverted PWM output, thus #pwm-cells needs to be set
> to 3.
> 
> Fixes: a05c329644d81 ("arm64: dts: freescale: imx8-ss-lsio: add support for lsio_pwm0-3")
> Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
> ---
>  arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi
> index 49ad3413db948..7e510b21bbac5 100644
> --- a/arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi
> @@ -29,7 +29,7 @@ lsio_pwm0: pwm@5d000000 {
>  			 <&pwm0_lpcg 1>;
>  		assigned-clocks = <&clk IMX_SC_R_PWM_0 IMX_SC_PM_CLK_PER>;
>  		assigned-clock-rates = <24000000>;
> -		#pwm-cells = <2>;
> +		#pwm-cells = <3>;
>  		interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
>  		status = "disabled";
>  	};
> @@ -42,7 +42,7 @@ lsio_pwm1: pwm@5d010000 {
>  			 <&pwm1_lpcg 1>;
>  		assigned-clocks = <&clk IMX_SC_R_PWM_1 IMX_SC_PM_CLK_PER>;
>  		assigned-clock-rates = <24000000>;
> -		#pwm-cells = <2>;
> +		#pwm-cells = <3>;
>  		interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
>  		status = "disabled";
>  	};
> @@ -55,7 +55,7 @@ lsio_pwm2: pwm@5d020000 {
>  			 <&pwm2_lpcg 1>;
>  		assigned-clocks = <&clk IMX_SC_R_PWM_2 IMX_SC_PM_CLK_PER>;
>  		assigned-clock-rates = <24000000>;
> -		#pwm-cells = <2>;
> +		#pwm-cells = <3>;
>  		interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
>  		status = "disabled";
>  	};
> @@ -68,7 +68,7 @@ lsio_pwm3: pwm@5d030000 {
>  			 <&pwm3_lpcg 1>;
>  		assigned-clocks = <&clk IMX_SC_R_PWM_3 IMX_SC_PM_CLK_PER>;
>  		assigned-clock-rates = <24000000>;
> -		#pwm-cells = <2>;
> +		#pwm-cells = <3>;
>  		interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
>  		status = "disabled";
>  	};

Even without patch #1 this is a good change. There are no usages of the
lsio_pwm* handles as of today's next. So no consumers need adaption.

Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>

Best regards
Uwe
Uwe Kleine-König Nov. 6, 2023, 10:49 a.m. UTC | #2
Hello,

[Cc -= Philippe Schenker]

On Mon, Nov 06, 2023 at 10:52:05AM +0100, Alexander Stein wrote:
> i.MX8QXP supports inverted PWM output, thus #pwm-cells needs to be set
> to 3.
> 
> Fixes: f1d6a6b991ef9 ("arm64: dts: imx8qxp: add adma_pwm in adma")
> Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
> ---
>  arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
> index ce66d30a4839b..b0bb77150adcc 100644
> --- a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
> @@ -149,7 +149,7 @@ adma_pwm: pwm@5a190000 {
>  		clock-names = "ipg", "per";
>  		assigned-clocks = <&clk IMX_SC_R_LCD_0_PWM_0 IMX_SC_PM_CLK_PER>;
>  		assigned-clock-rates = <24000000>;
> -		#pwm-cells = <2>;
> +		#pwm-cells = <3>;
>  		power-domains = <&pd IMX_SC_R_LCD_0_PWM_0>;
>  	};

Even without patch #1 this is a good change. There are no usages of the
adma_pwm handle as of today's next. So no consumers need adaption.

Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>

Best regards
Uwe