diff mbox series

RISC-V: Fix multiple EXCESS test FAILs in RVV testsuite

Message ID 20231025080806.1435834-1-juzhe.zhong@rivai.ai
State New
Headers show
Series RISC-V: Fix multiple EXCESS test FAILs in RVV testsuite | expand

Commit Message

钟居哲 Oct. 25, 2023, 8:08 a.m. UTC
gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/autovec/slp-mask-run-1.c: Fix test.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-run.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-runu.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-run.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vmv-imm-run.c: Ditto.

---
 gcc/testsuite/gcc.target/riscv/rvv/autovec/slp-mask-run-1.c     | 2 +-
 .../gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-run.c    | 2 +-
 .../gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-runu.c   | 2 +-
 .../gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-run.c        | 2 +-
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vmv-imm-run.c        | 2 +-
 5 files changed, 5 insertions(+), 5 deletions(-)

Comments

Robin Dapp Oct. 25, 2023, 8:35 a.m. UTC | #1
Hi Juzhe,

I guess that's OK but what's the problem here?  Are the default options
wrong so we need to overwrite them instead of adding some?

Regards
 Robin
钟居哲 Oct. 25, 2023, 8:38 a.m. UTC | #2
In rvv.exp: we specify -march=rv64gcv_zfh

However, when I built the toolchain with -march=rv64gcv_zfh_zvfh. Then link fail.

All other tests like compress_run-1.c are works fine with :
/* { dg-options "-O3 --param riscv-autovec-preference=fixed-vlmax -Wno-psabi" } */


So I adapt these tests like others.


juzhe.zhong@rivai.ai
 
From: Robin Dapp
Date: 2023-10-25 16:35
To: Juzhe-Zhong; gcc-patches
CC: rdapp.gcc; kito.cheng; kito.cheng; jeffreyalaw
Subject: Re: [PATCH] RISC-V: Fix multiple EXCESS test FAILs in RVV testsuite
Hi Juzhe,
 
I guess that's OK but what's the problem here?  Are the default options
wrong so we need to overwrite them instead of adding some?
 
Regards
Robin
钟居哲 Oct. 25, 2023, 8:39 a.m. UTC | #3
FAIL: gcc.target/riscv/rvv/autovec/slp-mask-run-1.c -O3 -ftree-vectorize (test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vls-vlmax/pr110985.c -std=c99 -O3 -ftree-vectorize --param riscv-autovec-preference=fixed-vlmax  check-function-bodies foo1
FAIL: gcc.target/riscv/rvv/autovec/vls-vlmax/pr110985.c -std=c99 -O3 -ftree-vectorize --param riscv-autovec-preference=fixed-vlmax  check-function-bodies foo2
FAIL: gcc.target/riscv/rvv/autovec/vls-vlmax/pr110985.c -std=c99 -O3 -ftree-vectorize --param riscv-autovec-preference=fixed-vlmax  check-function-bodies foo3
FAIL: gcc.target/riscv/rvv/autovec/vls-vlmax/pr110985.c -std=c99 -O3 -ftree-vectorize --param riscv-autovec-preference=fixed-vlmax  check-function-bodies foo4
FAIL: gcc.target/riscv/rvv/autovec/vls-vlmax/pr110985.c -std=c99 -O3 -ftree-vectorize --param riscv-autovec-preference=fixed-vlmax  check-function-bodies foo5
FAIL: gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-run.c -std=c99 -O3 -ftree-vectorize --param riscv-autovec-preference=fixed-vlmax (test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-runu.c -std=c99 -O3 -ftree-vectorize --param riscv-autovec-preference=fixed-vlmax (test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-run.c -std=c99 -O3 -ftree-vectorize --param riscv-autovec-preference=fixed-vlmax (test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vmv-imm-run.c -O3 -ftree-vectorize (test for excess errors)

Fix all of these FAILs


juzhe.zhong@rivai.ai
 
From: Robin Dapp
Date: 2023-10-25 16:35
To: Juzhe-Zhong; gcc-patches
CC: rdapp.gcc; kito.cheng; kito.cheng; jeffreyalaw
Subject: Re: [PATCH] RISC-V: Fix multiple EXCESS test FAILs in RVV testsuite
Hi Juzhe,
 
I guess that's OK but what's the problem here?  Are the default options
wrong so we need to overwrite them instead of adding some?
 
Regards
Robin
Robin Dapp Oct. 25, 2023, 8:44 a.m. UTC | #4
> However, when I built the toolchain with -march=rv64gcv_zfh_zvfh.
> Then link fail.

Hmm, is it about zvfh or why does linking fail?

Regards
 Robin
钟居哲 Oct. 25, 2023, 8:46 a.m. UTC | #5
Hmmm. I am not familiar with Binutils...

I just adapted tests like others in the testsuite make them consistent.
And turns out it can fix the issues...



juzhe.zhong@rivai.ai
 
From: Robin Dapp
Date: 2023-10-25 16:44
To: juzhe.zhong@rivai.ai; gcc-patches
CC: rdapp.gcc; kito.cheng; Kito.cheng; jeffreyalaw
Subject: Re: [PATCH] RISC-V: Fix multiple EXCESS test FAILs in RVV testsuite
 
> However, when I built the toolchain with -march=rv64gcv_zfh_zvfh.
> Then link fail.
 
Hmm, is it about zvfh or why does linking fail?
 
Regards
Robin
Robin Dapp Oct. 25, 2023, 9:15 a.m. UTC | #6
> Hmmm. I am not familiar with Binutils...
> 
> I just adapted tests like others in the testsuite make them consistent.
> And turns out it can fix the issues..

I see where you're coming from, but can you assemble/link any
executable with -march=..._zvfh?  Probably not?  Doesn't half of
GCC's testsuite fail then?

So rather than overwrite the default options we should either
add an effective-target check in target-supports.exp or in those
particular tests.  I believe the others like compress should do
the same thing.  I can do that at some point if you don't want it
but right now I'm on other things.

Regards
 Robin
钟居哲 Oct. 25, 2023, 9:19 a.m. UTC | #7
>> Doesn't half of
>> GCC's testsuite fail then?
No. Only a few tests failed (The tests are mentioned in this patch).
All other tests passed no matter how I configure toolchain building.


>>  I can do that at some point if you don't want it
>> but right now I'm on other things.
No worry, I won't commit this patch. I will use this patch in my local.
You can fix it when you have time.
I don't know how to fix it since I am really noob about testing.

Thanks.


juzhe.zhong@rivai.ai
 
From: Robin Dapp
Date: 2023-10-25 17:15
To: juzhe.zhong@rivai.ai; gcc-patches
CC: rdapp.gcc; kito.cheng; Kito.cheng; jeffreyalaw
Subject: Re: [PATCH] RISC-V: Fix multiple EXCESS test FAILs in RVV testsuite
> Hmmm. I am not familiar with Binutils...
> 
> I just adapted tests like others in the testsuite make them consistent.
> And turns out it can fix the issues..
 
I see where you're coming from, but can you assemble/link any
executable with -march=..._zvfh?  Probably not?  Doesn't half of
GCC's testsuite fail then?
 
So rather than overwrite the default options we should either
add an effective-target check in target-supports.exp or in those
particular tests.  I believe the others like compress should do
the same thing.  I can do that at some point if you don't want it
but right now I'm on other things.
 
Regards
Robin
diff mbox series

Patch

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/slp-mask-run-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/slp-mask-run-1.c
index b3469c41c87..192040c04f6 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/slp-mask-run-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/slp-mask-run-1.c
@@ -1,5 +1,5 @@ 
 /* { dg-do run { target { riscv_v } } } */
-/* { dg-additional-options "-std=gnu99 -O3 -march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=scalable" } */
+/* { dg-options "-std=gnu99 -O3 --param=riscv-autovec-preference=scalable" } */
 
 #include <malloc.h>
 #include <stdio.h>
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-run.c
index 5df7e08c42f..a2f85477f9e 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-run.c
@@ -1,5 +1,5 @@ 
 /* { dg-do run { target { riscv_v } } } */
-/* { dg-additional-options "-std=c99 -Wno-pedantic -Wno-psabi" } */
+/* { dg-options "-std=c99 -Wno-pedantic -Wno-psabi -O3" } */
 
 #include <assert.h>
 
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-runu.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-runu.c
index 7c77ae87f08..958f764f989 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-runu.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-runu.c
@@ -1,5 +1,5 @@ 
 /* { dg-do run { target { riscv_v } } } */
-/* { dg-additional-options "-std=c99 -Wno-pedantic -Wno-psabi" } */
+/* { dg-options "-std=c99 -Wno-pedantic -Wno-psabi -O3" } */
 
 #include <assert.h>
 #include <limits.h>
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-run.c
index 5dc095cce51..59341f4ca9b 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-run.c
@@ -1,5 +1,5 @@ 
 /* { dg-do run { target { riscv_v } } } */
-/* { dg-additional-options "-std=c99 -Wno-pedantic -Wno-psabi" } */
+/* { dg-options "-std=c99 -Wno-pedantic -Wno-psabi -O3" } */
 
 #include <assert.h>
 
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmv-imm-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmv-imm-run.c
index 7a50b701c36..7535aeac497 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmv-imm-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmv-imm-run.c
@@ -1,5 +1,5 @@ 
 /* { dg-do run { target { riscv_v } } } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=scalable -fno-builtin" } */
+/* { dg-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=scalable -fno-builtin -O3" } */
 
 #include "vmv-imm-template.h"