| Message ID | 1694290578-17733-14-git-send-email-quic_mojha@quicinc.com |
|---|---|
| State | New |
| Headers | show |
| Series | Add Qualcomm Minidump kernel driver related support | expand |
On 9/10/2023 1:46 AM, Mukesh Ojha wrote: > It was realized by Srinivas K. that there is a need of > read-modify-write scm exported function so that it can > be used by multiple clients. > > Let's introduce qcom_scm_io_update_field() which masks > out the bits and write the passed value to that > bit-offset. Subsequent patch will use this function. > > Suggested-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> > Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com> > --- Validated this change on IPQ9574 and IPQ53332 and system is entering into the download mode. Tested-by: Kathiravan Thirumoorthy <quic_kathirav@quicinc.com> # IP9574 and IPQ5332 > drivers/firmware/qcom_scm.c | 20 ++++++++++++++++++++ > include/linux/firmware/qcom/qcom_scm.h | 2 ++ > 2 files changed, 22 insertions(+) > > diff --git a/drivers/firmware/qcom_scm.c b/drivers/firmware/qcom_scm.c > index fde33acd46b7..5ea8fc4fd4e8 100644 > --- a/drivers/firmware/qcom_scm.c > +++ b/drivers/firmware/qcom_scm.c > @@ -78,6 +78,7 @@ static const char * const qcom_scm_convention_names[] = { > }; > > static struct qcom_scm *__scm; > +static DEFINE_SPINLOCK(lock); > > static int qcom_scm_clk_enable(void) > { > @@ -407,6 +408,25 @@ int qcom_scm_set_remote_state(u32 state, u32 id) > } > EXPORT_SYMBOL(qcom_scm_set_remote_state); > > +int qcom_scm_io_update_field(phys_addr_t addr, unsigned int mask, unsigned int val) > +{ > + unsigned int old, new; > + int ret; > + > + spin_lock(&lock); > + ret = qcom_scm_io_readl(addr, &old); > + if (ret) > + goto unlock; > + > + new = (old & ~mask) | (val & mask); > + > + ret = qcom_scm_io_writel(addr, new); > +unlock: > + spin_unlock(&lock); > + return ret; > +} > +EXPORT_SYMBOL_GPL(qcom_scm_io_update_field); > + > static int __qcom_scm_set_dload_mode(struct device *dev, bool enable) > { > struct qcom_scm_desc desc = { > diff --git a/include/linux/firmware/qcom/qcom_scm.h b/include/linux/firmware/qcom/qcom_scm.h > index 250ea4efb7cb..ca41e4eb33ad 100644 > --- a/include/linux/firmware/qcom/qcom_scm.h > +++ b/include/linux/firmware/qcom/qcom_scm.h > @@ -84,6 +84,8 @@ extern bool qcom_scm_pas_supported(u32 peripheral); > > extern int qcom_scm_io_readl(phys_addr_t addr, unsigned int *val); > extern int qcom_scm_io_writel(phys_addr_t addr, unsigned int val); > +extern int qcom_scm_io_update_field(phys_addr_t addr, unsigned int mask, > + unsigned int val); > > extern bool qcom_scm_restore_sec_cfg_available(void); > extern int qcom_scm_restore_sec_cfg(u32 device_id, u32 spare);
On 9/11/2023 1:38 PM, Kathiravan Thirumoorthy wrote: > > On 9/10/2023 1:46 AM, Mukesh Ojha wrote: >> It was realized by Srinivas K. that there is a need of >> read-modify-write scm exported function so that it can >> be used by multiple clients. >> >> Let's introduce qcom_scm_io_update_field() which masks >> out the bits and write the passed value to that >> bit-offset. Subsequent patch will use this function. >> >> Suggested-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> >> Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com> >> --- > > > Validated this change on IPQ9574 and IPQ53332 and system is entering > into the download mode. > > Tested-by: Kathiravan Thirumoorthy <quic_kathirav@quicinc.com> # > IP9574 and IPQ5332 Couple of typos. Apologize... Validated this change on IPQ9574 and IPQ5332 and system is entering into the download mode. Tested-by: Kathiravan Thirumoorthy <quic_kathirav@quicinc.com> # IPQ9574 and IPQ5332 > > >> drivers/firmware/qcom_scm.c | 20 ++++++++++++++++++++ >> include/linux/firmware/qcom/qcom_scm.h | 2 ++ >> 2 files changed, 22 insertions(+) >> >> diff --git a/drivers/firmware/qcom_scm.c b/drivers/firmware/qcom_scm.c >> index fde33acd46b7..5ea8fc4fd4e8 100644 >> --- a/drivers/firmware/qcom_scm.c >> +++ b/drivers/firmware/qcom_scm.c >> @@ -78,6 +78,7 @@ static const char * const >> qcom_scm_convention_names[] = { >> }; >> static struct qcom_scm *__scm; >> +static DEFINE_SPINLOCK(lock); >> static int qcom_scm_clk_enable(void) >> { >> @@ -407,6 +408,25 @@ int qcom_scm_set_remote_state(u32 state, u32 id) >> } >> EXPORT_SYMBOL(qcom_scm_set_remote_state); >> +int qcom_scm_io_update_field(phys_addr_t addr, unsigned int mask, >> unsigned int val) >> +{ >> + unsigned int old, new; >> + int ret; >> + >> + spin_lock(&lock); >> + ret = qcom_scm_io_readl(addr, &old); >> + if (ret) >> + goto unlock; >> + >> + new = (old & ~mask) | (val & mask); >> + >> + ret = qcom_scm_io_writel(addr, new); >> +unlock: >> + spin_unlock(&lock); >> + return ret; >> +} >> +EXPORT_SYMBOL_GPL(qcom_scm_io_update_field); >> + >> static int __qcom_scm_set_dload_mode(struct device *dev, bool enable) >> { >> struct qcom_scm_desc desc = { >> diff --git a/include/linux/firmware/qcom/qcom_scm.h >> b/include/linux/firmware/qcom/qcom_scm.h >> index 250ea4efb7cb..ca41e4eb33ad 100644 >> --- a/include/linux/firmware/qcom/qcom_scm.h >> +++ b/include/linux/firmware/qcom/qcom_scm.h >> @@ -84,6 +84,8 @@ extern bool qcom_scm_pas_supported(u32 peripheral); >> extern int qcom_scm_io_readl(phys_addr_t addr, unsigned int *val); >> extern int qcom_scm_io_writel(phys_addr_t addr, unsigned int val); >> +extern int qcom_scm_io_update_field(phys_addr_t addr, unsigned int >> mask, >> + unsigned int val); >> extern bool qcom_scm_restore_sec_cfg_available(void); >> extern int qcom_scm_restore_sec_cfg(u32 device_id, u32 spare);
diff --git a/drivers/firmware/qcom_scm.c b/drivers/firmware/qcom_scm.c index fde33acd46b7..5ea8fc4fd4e8 100644 --- a/drivers/firmware/qcom_scm.c +++ b/drivers/firmware/qcom_scm.c @@ -78,6 +78,7 @@ static const char * const qcom_scm_convention_names[] = { }; static struct qcom_scm *__scm; +static DEFINE_SPINLOCK(lock); static int qcom_scm_clk_enable(void) { @@ -407,6 +408,25 @@ int qcom_scm_set_remote_state(u32 state, u32 id) } EXPORT_SYMBOL(qcom_scm_set_remote_state); +int qcom_scm_io_update_field(phys_addr_t addr, unsigned int mask, unsigned int val) +{ + unsigned int old, new; + int ret; + + spin_lock(&lock); + ret = qcom_scm_io_readl(addr, &old); + if (ret) + goto unlock; + + new = (old & ~mask) | (val & mask); + + ret = qcom_scm_io_writel(addr, new); +unlock: + spin_unlock(&lock); + return ret; +} +EXPORT_SYMBOL_GPL(qcom_scm_io_update_field); + static int __qcom_scm_set_dload_mode(struct device *dev, bool enable) { struct qcom_scm_desc desc = { diff --git a/include/linux/firmware/qcom/qcom_scm.h b/include/linux/firmware/qcom/qcom_scm.h index 250ea4efb7cb..ca41e4eb33ad 100644 --- a/include/linux/firmware/qcom/qcom_scm.h +++ b/include/linux/firmware/qcom/qcom_scm.h @@ -84,6 +84,8 @@ extern bool qcom_scm_pas_supported(u32 peripheral); extern int qcom_scm_io_readl(phys_addr_t addr, unsigned int *val); extern int qcom_scm_io_writel(phys_addr_t addr, unsigned int val); +extern int qcom_scm_io_update_field(phys_addr_t addr, unsigned int mask, + unsigned int val); extern bool qcom_scm_restore_sec_cfg_available(void); extern int qcom_scm_restore_sec_cfg(u32 device_id, u32 spare);
It was realized by Srinivas K. that there is a need of read-modify-write scm exported function so that it can be used by multiple clients. Let's introduce qcom_scm_io_update_field() which masks out the bits and write the passed value to that bit-offset. Subsequent patch will use this function. Suggested-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com> --- drivers/firmware/qcom_scm.c | 20 ++++++++++++++++++++ include/linux/firmware/qcom/qcom_scm.h | 2 ++ 2 files changed, 22 insertions(+)