| Message ID | 20230626180920.318774-2-bgriffis@nvidia.com |
|---|---|
| State | Accepted |
| Headers | show |
| Series | [1/2] arm64: tegra: fix p3767 card detect polarity | expand |
On Mon, Jun 26, 2023 at 06:09:20PM +0000, Brad Griffis wrote: > The QSPI device used in Jetson Orin NX and Nano modules (p3767) is > the same as Jetson AGX Orin (p3701) and should have a max speed of > 102 MHz. > > Fixes: 13b0aca303e9 ("arm64: tegra: Support Jetson Orin NX") > Signed-off-by: Brad Griffis <bgriffis@nvidia.com> > --- > arch/arm64/boot/dts/nvidia/tegra234-p3767.dtsi | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) This was originally copied from the downstream DTB and I see 136 MHz for both P3701 and P3767 there. So now I wonder which one is correct. Should perhaps the P3701 be updated to 136 MHz instead if that's what is being used downstream? Thierry > diff --git a/arch/arm64/boot/dts/nvidia/tegra234-p3767.dtsi b/arch/arm64/boot/dts/nvidia/tegra234-p3767.dtsi > index 831a553ec387..980f15ac674d 100644 > --- a/arch/arm64/boot/dts/nvidia/tegra234-p3767.dtsi > +++ b/arch/arm64/boot/dts/nvidia/tegra234-p3767.dtsi > @@ -28,7 +28,7 @@ spi@3270000 { > flash@0 { > compatible = "jedec,spi-nor"; > reg = <0>; > - spi-max-frequency = <136000000>; > + spi-max-frequency = <102000000>; > spi-tx-bus-width = <4>; > spi-rx-bus-width = <4>; > }; > -- > 2.25.1 >
On Fri, Jul 21, 2023 at 6:26 AM +0000, Thierry Reding wrote: > On Mon, Jun 26, 2023 at 06:09:20PM +0000, Brad Griffis wrote: > > The QSPI device used in Jetson Orin NX and Nano modules (p3767) is the > > same as Jetson AGX Orin (p3701) and should have a max speed of > > 102 MHz. > > > > Fixes: 13b0aca303e9 ("arm64: tegra: Support Jetson Orin NX") > > Signed-off-by: Brad Griffis <bgriffis@nvidia.com> > > --- > > arch/arm64/boot/dts/nvidia/tegra234-p3767.dtsi | 2 +- > > 1 file changed, 1 insertion(+), 1 deletion(-) > > This was originally copied from the downstream DTB and I see 136 MHz for > both P3701 and P3767 there. So now I wonder which one is correct. Should > perhaps the P3701 be updated to 136 MHz instead if that's what is being used > downstream? Downstream we have changed both p3701 and p3767 to use 102 MHz. That is the max speed for Quad I/O DTR reads.
On Tue, Aug 15, 2023 at 01:38:35PM +0000, Brad Griffis wrote: > On Fri, Jul 21, 2023 at 6:26 AM +0000, Thierry Reding wrote: > > On Mon, Jun 26, 2023 at 06:09:20PM +0000, Brad Griffis wrote: > > > The QSPI device used in Jetson Orin NX and Nano modules (p3767) is the > > > same as Jetson AGX Orin (p3701) and should have a max speed of > > > 102 MHz. > > > > > > Fixes: 13b0aca303e9 ("arm64: tegra: Support Jetson Orin NX") > > > Signed-off-by: Brad Griffis <bgriffis@nvidia.com> > > > --- > > > arch/arm64/boot/dts/nvidia/tegra234-p3767.dtsi | 2 +- > > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > This was originally copied from the downstream DTB and I see 136 MHz for > > both P3701 and P3767 there. So now I wonder which one is correct. Should > > perhaps the P3701 be updated to 136 MHz instead if that's what is being used > > downstream? > > Downstream we have changed both p3701 and p3767 to use 102 MHz. That is > the max speed for Quad I/O DTR reads. Alright, I must've looked at an older version of the downstream DTB. Applied, thanks. Thierry
diff --git a/arch/arm64/boot/dts/nvidia/tegra234-p3767.dtsi b/arch/arm64/boot/dts/nvidia/tegra234-p3767.dtsi index 831a553ec387..980f15ac674d 100644 --- a/arch/arm64/boot/dts/nvidia/tegra234-p3767.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra234-p3767.dtsi @@ -28,7 +28,7 @@ spi@3270000 { flash@0 { compatible = "jedec,spi-nor"; reg = <0>; - spi-max-frequency = <136000000>; + spi-max-frequency = <102000000>; spi-tx-bus-width = <4>; spi-rx-bus-width = <4>; };
The QSPI device used in Jetson Orin NX and Nano modules (p3767) is the same as Jetson AGX Orin (p3701) and should have a max speed of 102 MHz. Fixes: 13b0aca303e9 ("arm64: tegra: Support Jetson Orin NX") Signed-off-by: Brad Griffis <bgriffis@nvidia.com> --- arch/arm64/boot/dts/nvidia/tegra234-p3767.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)