diff mbox series

[04/29] spi: mtk_spim: clear IRQ enable bits

Message ID 2f86258ad8393f01d27273b2f955b66ca4d49bbd.1689756363.git.weijie.gao@mediatek.com
State Accepted
Commit b43512d0468a7e409fc2a8d5130d5a2efdee1b3f
Delegated to: Tom Rini
Headers show
Series Add support for MediaTek MT7988 SoC | expand

Commit Message

Weijie Gao (高惟杰) July 19, 2023, 9:16 a.m. UTC 
In u-boot we don't use IRQ. Instead, we poll busy bit in SPI_STATUS.

However these IRQ enable bits may be set in previous boot stage (BootROM).

If we leave these bits not cleared, although u-boot has disabled IRQ and
nothing will happen, the linux kernel may encounter panic during
initializing the spim driver due to IRQ event happens before IRQ handler
is properly setup.

This patch clear IRQ bits to prevent this from happening.

Signed-off-by: SkyLake.Huang <skylake.huang@mediatek.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
---
 drivers/spi/mtk_spim.c | 3 +++
 1 file changed, 3 insertions(+)

Comments

Jagan Teki July 19, 2023, 9:22 a.m. UTC | #1 
On Wed, Jul 19, 2023 at 2:46 PM Weijie Gao <weijie.gao@mediatek.com> wrote:
>
> In u-boot we don't use IRQ. Instead, we poll busy bit in SPI_STATUS.
>
> However these IRQ enable bits may be set in previous boot stage (BootROM).
>
> If we leave these bits not cleared, although u-boot has disabled IRQ and
> nothing will happen, the linux kernel may encounter panic during
> initializing the spim driver due to IRQ event happens before IRQ handler
> is properly setup.
>
> This patch clear IRQ bits to prevent this from happening.
>
> Signed-off-by: SkyLake.Huang <skylake.huang@mediatek.com>
> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
> ---

Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
diff mbox series

Patch

diff --git a/drivers/spi/mtk_spim.c b/drivers/spi/mtk_spim.c
index 3a742d160c..418e586b91 100644
--- a/drivers/spi/mtk_spim.c
+++ b/drivers/spi/mtk_spim.c
@@ -242,6 +242,9 @@  static int mtk_spim_hw_init(struct spi_slave *slave)
 			reg_val &= ~SPI_CMD_SAMPLE_SEL;
 	}
 
+	/* Disable interrupt enable for pause mode & normal mode */
+	reg_val &= ~(SPI_CMD_PAUSE_IE | SPI_CMD_FINISH_IE);
+
 	/* disable dma mode */
 	reg_val &= ~(SPI_CMD_TX_DMA | SPI_CMD_RX_DMA);