mbox series

[v2,0/4] riscv: Initial support for Lichee PI 4A board

Message ID 20230708112435.23583-1-dlan@gentoo.org
Headers show
Series riscv: Initial support for Lichee PI 4A board | expand

Message

Yixun Lan July 8, 2023, 11:24 a.m. UTC 
Sipeed's Lichee PI 4A board is based on T-HEAD's TH1520 SoC which consists of
quad core XuanTie C910 CPU, plus one C906 CPU and one E902 CPU.

In this series, we add a basic device tree, including UART CPU, PLIC, make it
capable of running into a serial console.

Please note that, we rely on pre shipped vendor u-boot which run in M-Mode to
chain load this mainline u-boot either via eMMC storage or from tftp, thus the
pinctrl and clock setting are not implemented in this series, which certainly
can be improved later accordingly.

Also the device tree is borrowed from kernel which is already accepted by kernel
upstream [1]. 

[1] https://lore.kernel.org/all/20230617161529.2092-1-jszhang@kernel.org

Changes since PATCH v1:
  - sync device tree with mainline kernel's version
  - update docs and also fix the build error
  - fix missing <cpu_func.h> header file

PATCH v1: 
  https://lore.kernel.org/all/20230526124107.894-1-dlan@gentoo.org   

Yixun Lan (4):
  riscv: t-head: licheepi4a: initial support added
  riscv: dts: t-head: Add basic device tree for Sipeed Lichee PI 4A
    board
  configs: th1520_lpi4a_defconfig: Add initial config
  doc: t-head: lpi4a: document Lichee PI 4A board

 arch/riscv/Kconfig                          |   5 +
 arch/riscv/dts/Makefile                     |   1 +
 arch/riscv/dts/th1520-lichee-module-4a.dtsi |  34 ++
 arch/riscv/dts/th1520-lichee-pi-4a.dts      |  32 ++
 arch/riscv/dts/th1520.dtsi                  | 406 ++++++++++++++++++++
 board/thead/th1520_lpi4a/Kconfig            |  42 ++
 board/thead/th1520_lpi4a/MAINTAINERS        |   7 +
 board/thead/th1520_lpi4a/Makefile           |   5 +
 board/thead/th1520_lpi4a/board.c            |  15 +
 configs/th1520_lpi4a_defconfig              |  82 ++++
 doc/board/index.rst                         |   1 +
 doc/board/thead/index.rst                   |   9 +
 doc/board/thead/lpi4a.rst                   | 129 +++++++
 include/configs/th1520_lpi4a.h              |  22 ++
 14 files changed, 790 insertions(+)
 create mode 100644 arch/riscv/dts/th1520-lichee-module-4a.dtsi
 create mode 100644 arch/riscv/dts/th1520-lichee-pi-4a.dts
 create mode 100644 arch/riscv/dts/th1520.dtsi
 create mode 100644 board/thead/th1520_lpi4a/Kconfig
 create mode 100644 board/thead/th1520_lpi4a/MAINTAINERS
 create mode 100644 board/thead/th1520_lpi4a/Makefile
 create mode 100644 board/thead/th1520_lpi4a/board.c
 create mode 100644 configs/th1520_lpi4a_defconfig
 create mode 100644 doc/board/thead/index.rst
 create mode 100644 doc/board/thead/lpi4a.rst
 create mode 100644 include/configs/th1520_lpi4a.h

Comments

Guo Ren July 13, 2023, 12:24 a.m. UTC | #1 
For this series:

Reviewed-by: Guo Ren <guoren@kernel.org>

On Sat, Jul 8, 2023 at 7:25 AM Yixun Lan <dlan@gentoo.org> wrote:
>
> Sipeed's Lichee PI 4A board is based on T-HEAD's TH1520 SoC which consists of
> quad core XuanTie C910 CPU, plus one C906 CPU and one E902 CPU.
>
> In this series, we add a basic device tree, including UART CPU, PLIC, make it
> capable of running into a serial console.
>
> Please note that, we rely on pre shipped vendor u-boot which run in M-Mode to
> chain load this mainline u-boot either via eMMC storage or from tftp, thus the
> pinctrl and clock setting are not implemented in this series, which certainly
> can be improved later accordingly.
>
> Also the device tree is borrowed from kernel which is already accepted by kernel
> upstream [1].
>
> [1] https://lore.kernel.org/all/20230617161529.2092-1-jszhang@kernel.org
>
> Changes since PATCH v1:
>   - sync device tree with mainline kernel's version
>   - update docs and also fix the build error
>   - fix missing <cpu_func.h> header file
>
> PATCH v1:
>   https://lore.kernel.org/all/20230526124107.894-1-dlan@gentoo.org
>
> Yixun Lan (4):
>   riscv: t-head: licheepi4a: initial support added
>   riscv: dts: t-head: Add basic device tree for Sipeed Lichee PI 4A
>     board
>   configs: th1520_lpi4a_defconfig: Add initial config
>   doc: t-head: lpi4a: document Lichee PI 4A board
>
>  arch/riscv/Kconfig                          |   5 +
>  arch/riscv/dts/Makefile                     |   1 +
>  arch/riscv/dts/th1520-lichee-module-4a.dtsi |  34 ++
>  arch/riscv/dts/th1520-lichee-pi-4a.dts      |  32 ++
>  arch/riscv/dts/th1520.dtsi                  | 406 ++++++++++++++++++++
>  board/thead/th1520_lpi4a/Kconfig            |  42 ++
>  board/thead/th1520_lpi4a/MAINTAINERS        |   7 +
>  board/thead/th1520_lpi4a/Makefile           |   5 +
>  board/thead/th1520_lpi4a/board.c            |  15 +
>  configs/th1520_lpi4a_defconfig              |  82 ++++
>  doc/board/index.rst                         |   1 +
>  doc/board/thead/index.rst                   |   9 +
>  doc/board/thead/lpi4a.rst                   | 129 +++++++
>  include/configs/th1520_lpi4a.h              |  22 ++
>  14 files changed, 790 insertions(+)
>  create mode 100644 arch/riscv/dts/th1520-lichee-module-4a.dtsi
>  create mode 100644 arch/riscv/dts/th1520-lichee-pi-4a.dts
>  create mode 100644 arch/riscv/dts/th1520.dtsi
>  create mode 100644 board/thead/th1520_lpi4a/Kconfig
>  create mode 100644 board/thead/th1520_lpi4a/MAINTAINERS
>  create mode 100644 board/thead/th1520_lpi4a/Makefile
>  create mode 100644 board/thead/th1520_lpi4a/board.c
>  create mode 100644 configs/th1520_lpi4a_defconfig
>  create mode 100644 doc/board/thead/index.rst
>  create mode 100644 doc/board/thead/lpi4a.rst
>  create mode 100644 include/configs/th1520_lpi4a.h
>
> --
> 2.39.3
>