Message ID | 20230627055312.2881827-1-hongtao.liu@intel.com |
---|---|
State | New |
Headers | show |
Series | [1/2] Don't issue vzeroupper for vzeroupper call_insn. | expand |
On Tue, Jun 27, 2023 at 7:55 AM liuhongt <hongtao.liu@intel.com> wrote: > > Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}. > Ok for trunk? > > gcc/ChangeLog: > > PR target/82735 > * config/i386/i386.cc (ix86_avx_u127_mode_needed): Don't emit > vzeroupper for vzeroupper call_insn. > > gcc/testsuite/ChangeLog: > > * gcc.target/i386/avx-vzeroupper-30.c: New test. > --- > gcc/config/i386/i386.cc | 5 +++-- > gcc/testsuite/gcc.target/i386/avx-vzeroupper-30.c | 15 +++++++++++++++ > 2 files changed, 18 insertions(+), 2 deletions(-) > create mode 100644 gcc/testsuite/gcc.target/i386/avx-vzeroupper-30.c > > diff --git a/gcc/config/i386/i386.cc b/gcc/config/i386/i386.cc > index 0761965344b..caca74d6dec 100644 > --- a/gcc/config/i386/i386.cc > +++ b/gcc/config/i386/i386.cc > @@ -14489,8 +14489,9 @@ ix86_avx_u128_mode_needed (rtx_insn *insn) > modes wider than 256 bits. It's only safe to issue a > vzeroupper if all SSE registers are clobbered. */ > const function_abi &abi = insn_callee_abi (insn); > - if (!hard_reg_set_subset_p (reg_class_contents[SSE_REGS], > - abi.mode_clobbers (V4DImode))) > + if (vzeroupper_pattern (PATTERN (insn), VOIDmode) > + || !hard_reg_set_subset_p (reg_class_contents[SSE_REGS], > + abi.mode_clobbers (V4DImode))) > return AVX_U128_ANY; You also want to check for vzeroall_pattern here. OK with the above change. Thanks, Uros. > > return AVX_U128_CLEAN; > diff --git a/gcc/testsuite/gcc.target/i386/avx-vzeroupper-30.c b/gcc/testsuite/gcc.target/i386/avx-vzeroupper-30.c > new file mode 100644 > index 00000000000..c1c9baa8fc4 > --- /dev/null > +++ b/gcc/testsuite/gcc.target/i386/avx-vzeroupper-30.c > @@ -0,0 +1,15 @@ > +/* { dg-do compile } */ > +/* { dg-options "-O2 -mavx -mvzeroupper -dp" } */ > + > +#include <immintrin.h> > + > +extern __m256 x, y; > + > +void > +foo () > +{ > + x = y; > + _mm256_zeroupper (); > +} > + > +/* { dg-final { scan-assembler-times "avx_vzeroupper" 1 } } */ > -- > 2.39.1.388.g2fc9e9ca3c >
On Tue, Jun 27, 2023 at 2:05 PM Uros Bizjak <ubizjak@gmail.com> wrote: > > On Tue, Jun 27, 2023 at 7:55 AM liuhongt <hongtao.liu@intel.com> wrote: > > > > Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}. > > Ok for trunk? > > > > gcc/ChangeLog: > > > > PR target/82735 > > * config/i386/i386.cc (ix86_avx_u127_mode_needed): Don't emit > > vzeroupper for vzeroupper call_insn. > > > > gcc/testsuite/ChangeLog: > > > > * gcc.target/i386/avx-vzeroupper-30.c: New test. > > --- > > gcc/config/i386/i386.cc | 5 +++-- > > gcc/testsuite/gcc.target/i386/avx-vzeroupper-30.c | 15 +++++++++++++++ > > 2 files changed, 18 insertions(+), 2 deletions(-) > > create mode 100644 gcc/testsuite/gcc.target/i386/avx-vzeroupper-30.c > > > > diff --git a/gcc/config/i386/i386.cc b/gcc/config/i386/i386.cc > > index 0761965344b..caca74d6dec 100644 > > --- a/gcc/config/i386/i386.cc > > +++ b/gcc/config/i386/i386.cc > > @@ -14489,8 +14489,9 @@ ix86_avx_u128_mode_needed (rtx_insn *insn) > > modes wider than 256 bits. It's only safe to issue a > > vzeroupper if all SSE registers are clobbered. */ > > const function_abi &abi = insn_callee_abi (insn); > > - if (!hard_reg_set_subset_p (reg_class_contents[SSE_REGS], > > - abi.mode_clobbers (V4DImode))) > > + if (vzeroupper_pattern (PATTERN (insn), VOIDmode) > > + || !hard_reg_set_subset_p (reg_class_contents[SSE_REGS], > > + abi.mode_clobbers (V4DImode))) > > return AVX_U128_ANY; > > You also want to check for vzeroall_pattern here. This is inside if (CALL_P (insn)) vzeroupper is defined as special call_insn, but vzeroall is not. > > OK with the above change. > > Thanks, > Uros. > > > > > return AVX_U128_CLEAN; > > diff --git a/gcc/testsuite/gcc.target/i386/avx-vzeroupper-30.c b/gcc/testsuite/gcc.target/i386/avx-vzeroupper-30.c > > new file mode 100644 > > index 00000000000..c1c9baa8fc4 > > --- /dev/null > > +++ b/gcc/testsuite/gcc.target/i386/avx-vzeroupper-30.c > > @@ -0,0 +1,15 @@ > > +/* { dg-do compile } */ > > +/* { dg-options "-O2 -mavx -mvzeroupper -dp" } */ > > + > > +#include <immintrin.h> > > + > > +extern __m256 x, y; > > + > > +void > > +foo () > > +{ > > + x = y; > > + _mm256_zeroupper (); > > +} > > + > > +/* { dg-final { scan-assembler-times "avx_vzeroupper" 1 } } */ > > -- > > 2.39.1.388.g2fc9e9ca3c > >
On Tue, Jun 27, 2023 at 8:08 AM Hongtao Liu <crazylht@gmail.com> wrote: > > On Tue, Jun 27, 2023 at 2:05 PM Uros Bizjak <ubizjak@gmail.com> wrote: > > > > On Tue, Jun 27, 2023 at 7:55 AM liuhongt <hongtao.liu@intel.com> wrote: > > > > > > Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}. > > > Ok for trunk? > > > > > > gcc/ChangeLog: > > > > > > PR target/82735 > > > * config/i386/i386.cc (ix86_avx_u127_mode_needed): Don't emit > > > vzeroupper for vzeroupper call_insn. > > > > > > gcc/testsuite/ChangeLog: > > > > > > * gcc.target/i386/avx-vzeroupper-30.c: New test. > > > --- > > > gcc/config/i386/i386.cc | 5 +++-- > > > gcc/testsuite/gcc.target/i386/avx-vzeroupper-30.c | 15 +++++++++++++++ > > > 2 files changed, 18 insertions(+), 2 deletions(-) > > > create mode 100644 gcc/testsuite/gcc.target/i386/avx-vzeroupper-30.c > > > > > > diff --git a/gcc/config/i386/i386.cc b/gcc/config/i386/i386.cc > > > index 0761965344b..caca74d6dec 100644 > > > --- a/gcc/config/i386/i386.cc > > > +++ b/gcc/config/i386/i386.cc > > > @@ -14489,8 +14489,9 @@ ix86_avx_u128_mode_needed (rtx_insn *insn) > > > modes wider than 256 bits. It's only safe to issue a > > > vzeroupper if all SSE registers are clobbered. */ > > > const function_abi &abi = insn_callee_abi (insn); > > > - if (!hard_reg_set_subset_p (reg_class_contents[SSE_REGS], > > > - abi.mode_clobbers (V4DImode))) > > > + if (vzeroupper_pattern (PATTERN (insn), VOIDmode) > > > + || !hard_reg_set_subset_p (reg_class_contents[SSE_REGS], > > > + abi.mode_clobbers (V4DImode))) > > > return AVX_U128_ANY; > > > > You also want to check for vzeroall_pattern here. > This is inside > if (CALL_P (insn)) > > vzeroupper is defined as special call_insn, but vzeroall is not. Indeed. Patch is OK as it is then. Thanks, Uros. > > > > OK with the above change. > > > > Thanks, > > Uros. > > > > > > > > return AVX_U128_CLEAN; > > > diff --git a/gcc/testsuite/gcc.target/i386/avx-vzeroupper-30.c b/gcc/testsuite/gcc.target/i386/avx-vzeroupper-30.c > > > new file mode 100644 > > > index 00000000000..c1c9baa8fc4 > > > --- /dev/null > > > +++ b/gcc/testsuite/gcc.target/i386/avx-vzeroupper-30.c > > > @@ -0,0 +1,15 @@ > > > +/* { dg-do compile } */ > > > +/* { dg-options "-O2 -mavx -mvzeroupper -dp" } */ > > > + > > > +#include <immintrin.h> > > > + > > > +extern __m256 x, y; > > > + > > > +void > > > +foo () > > > +{ > > > + x = y; > > > + _mm256_zeroupper (); > > > +} > > > + > > > +/* { dg-final { scan-assembler-times "avx_vzeroupper" 1 } } */ > > > -- > > > 2.39.1.388.g2fc9e9ca3c > > > > > > > -- > BR, > Hongtao
diff --git a/gcc/config/i386/i386.cc b/gcc/config/i386/i386.cc index 0761965344b..caca74d6dec 100644 --- a/gcc/config/i386/i386.cc +++ b/gcc/config/i386/i386.cc @@ -14489,8 +14489,9 @@ ix86_avx_u128_mode_needed (rtx_insn *insn) modes wider than 256 bits. It's only safe to issue a vzeroupper if all SSE registers are clobbered. */ const function_abi &abi = insn_callee_abi (insn); - if (!hard_reg_set_subset_p (reg_class_contents[SSE_REGS], - abi.mode_clobbers (V4DImode))) + if (vzeroupper_pattern (PATTERN (insn), VOIDmode) + || !hard_reg_set_subset_p (reg_class_contents[SSE_REGS], + abi.mode_clobbers (V4DImode))) return AVX_U128_ANY; return AVX_U128_CLEAN; diff --git a/gcc/testsuite/gcc.target/i386/avx-vzeroupper-30.c b/gcc/testsuite/gcc.target/i386/avx-vzeroupper-30.c new file mode 100644 index 00000000000..c1c9baa8fc4 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vzeroupper-30.c @@ -0,0 +1,15 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx -mvzeroupper -dp" } */ + +#include <immintrin.h> + +extern __m256 x, y; + +void +foo () +{ + x = y; + _mm256_zeroupper (); +} + +/* { dg-final { scan-assembler-times "avx_vzeroupper" 1 } } */