Message ID | 1325727738.1385.3.camel@hp |
---|---|
State | Superseded |
Delegated to: | David Miller |
Headers | show |
Hi Kirill, I'll leave others to comment on the actual contents of the patch, but you've made a couple of rookie mistakes in submitting this patch. Firstly, make sure you put [PATCH] at the start of the subject of the patch as it makes it easier for people to spot patches as opposed to general discussion. On Thu, Jan 5, 2012 at 12:42, Kirill Tkhai <tkhai@yandex.ru> wrote: > SPARC32: forced setting of mode of SUN4M per-cpu timers > > SUN4M per-cpu timers have two modes of work. These are timer mode and > counter mode. SPARC32 doesn't write anything to the register, which is > connected with mode choice. So, the mode is chosen by bootloader. This > patch forces to use timer mode from the kernel and to be independent of > bootloader. > > I had this problem with OpenBIOS. Timers don't tick and kernel fails on > QEMU, when it's compiled with SMP support. The path fixes problem. Spelling mistake: "patch" not "path" You're missing your Signed-off-by: line. You must have a line at the bottom of your patch summary like the following: Signed-off-by: J Random Developer <jrdeveloper@example.com> Thanks,
Thanks, Julian! Kirill 05.01.2012, 05:53, "Julian Calaby" <julian.calaby@gmail.com>: > Hi Kirill, > > I'll leave others to comment on the actual contents of the patch, but > you've made a couple of rookie mistakes in submitting this patch. > > Firstly, make sure you put [PATCH] at the start of the subject of the > patch as it makes it easier for people to spot patches as opposed to > general discussion. > > On Thu, Jan 5, 2012 at 12:42, Kirill Tkhai <tkhai@yandex.ru> wrote: > >> SPARC32: forced setting of mode of SUN4M per-cpu timers >> >> SUN4M per-cpu timers have two modes of work. These are timer mode and >> counter mode. SPARC32 doesn't write anything to the register, which is >> connected with mode choice. So, the mode is chosen by bootloader. This >> patch forces to use timer mode from the kernel and to be independent of >> bootloader. >> >> I had this problem with OpenBIOS. Timers don't tick and kernel fails on >> QEMU, when it's compiled with SMP support. The path fixes problem. > > Spelling mistake: "patch" not "path" > > You're missing your Signed-off-by: line. You must have a line at the > bottom of your patch summary like the following: > > Signed-off-by: J Random Developer <jrdeveloper@example.com> > > Thanks, > > -- > Julian Calaby > > Email: julian.calaby@gmail.com > Profile: http://www.google.com/profiles/julian.calaby/ > .Plan: http://sites.google.com/site/juliancalaby/ -- To unsubscribe from this list: send the line "unsubscribe sparclinux" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
From: Kirill Tkhai <tkhai@yandex.ru> Date: Thu, 05 Jan 2012 05:42:18 +0400 > I had this problem with OpenBIOS. Timers don't tick and kernel fails on > QEMU, when it's compiled with SMP support. The path fixes problem. This means that OpenBIOS does not provide the hardware to the client program in the same state that OpenFirmware does, which in my opinion is a bug. We can still apply a patch like this, but I'd like to see it tested on real hardware and OpenFirmware machines. -- To unsubscribe from this list: send the line "unsubscribe sparclinux" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
05.01.2012, 23:27, "David Miller" <davem@davemloft.net>: > From: Kirill Tkhai <tkhai@yandex.ru> > Date: Thu, 05 Jan 2012 05:42:18 +0400 > >> I had this problem with OpenBIOS. Timers don't tick and kernel fails on >> QEMU, when it's compiled with SMP support. The path fixes problem. > > This means that OpenBIOS does not provide the hardware to the client > program in the same state that OpenFirmware does, which in my opinion > is a bug. > > We can still apply a patch like this, but I'd like to see it tested > on real hardware and OpenFirmware machines. I've just tested it on: cpu : Texas Instruments, Inc. - MicroSparc fpu : SuperSparc on-chip FPU promlib : Version 3 Revision 2 prom : 2.12 type : sun4m ncpus probed : 4 ncpus active : 4 Cpu0Bogo : 498.07 Cpu1Bogo : 498.07 Cpu2Bogo : 498.07 Cpu3Bogo : 498.07 MMU type : TI Viking/MXCC contexts : 65536 nocache total : 5242880 nocache used : 1296384 State: CPU0 : online CPU1 : online CPU2 : online CPU3 : online It seems that everything is ok. Kirill -- To unsubscribe from this list: send the line "unsubscribe sparclinux" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/arch/sparc/kernel/sun4m_irq.c b/arch/sparc/kernel/sun4m_irq.c index 422c16d..aa0b9df 100644 --- a/arch/sparc/kernel/sun4m_irq.c +++ b/arch/sparc/kernel/sun4m_irq.c @@ -414,6 +414,10 @@ static void __init sun4m_init_timers(irq_handler_t counter_fn) for (i = 0; i < num_cpu_timers; i++) sbus_writel(0, &timers_percpu[i]->l14_limit); +#ifdef CONFIG_SMP + /* Timer-mode for every per-cpu timer (bit '0' is timer mode) */ + sbus_writel(0x00000000, &timers_global->timer_config); +#endif if (num_cpu_timers == 4) sbus_writel(SUN4M_INT_E14, &sun4m_irq_global->mask_set);