Message ID | 20230502053534.1240553-1-bhupesh.sharma@linaro.org |
---|---|
Headers | show |
Series | Enable USB SS qmp phy for Qualcomm SM6115 SoC | expand |
On Tue, 2 May 2023 at 08:35, Bhupesh Sharma <bhupesh.sharma@linaro.org> wrote: > > Add support for the new qcm2290 / sm6115 binding. > > The USB QMP phy on these devices supports 2 lanes. Note that the > binding now does not describe every register subregion and instead > the driver holds the corresponding offsets. > > While at it also include support for PCS_MISC region which was left > out earlier. > > Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > --- > drivers/phy/qualcomm/phy-qcom-qmp-usb.c | 22 ++++++++++++++++++++++ > 1 file changed, 22 insertions(+) >
On 2.05.2023 07:35, Bhupesh Sharma wrote: > Add USB superspeed qmp phy node to dtsi. > > Make sure that the various board dts files (which include sm4250.dtsi file) > continue to work as intended. > > Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> > --- Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Konrad > .../boot/dts/qcom/sm4250-oneplus-billie2.dts | 3 ++ > arch/arm64/boot/dts/qcom/sm6115.dtsi | 29 +++++++++++++++++-- > .../boot/dts/qcom/sm6115p-lenovo-j606f.dts | 3 ++ > 3 files changed, 33 insertions(+), 2 deletions(-) > > diff --git a/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts b/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts > index a1f0622db5a0..75951fd439df 100644 > --- a/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts > +++ b/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts > @@ -242,6 +242,9 @@ &usb { > &usb_dwc3 { > maximum-speed = "high-speed"; > dr_mode = "peripheral"; > + > + phys = <&usb_hsphy>; > + phy-names = "usb2-phy"; > }; > > &usb_hsphy { > diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi > index 631ca327e064..f67863561f3f 100644 > --- a/arch/arm64/boot/dts/qcom/sm6115.dtsi > +++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi > @@ -661,6 +661,31 @@ usb_hsphy: phy@1613000 { > status = "disabled"; > }; > > + usb_qmpphy: phy@1615000 { > + compatible = "qcom,sm6115-qmp-usb3-phy"; > + reg = <0x0 0x01615000 0x0 0x1000>; > + > + clocks = <&gcc GCC_AHB2PHY_USB_CLK>, > + <&gcc GCC_USB3_PRIM_CLKREF_CLK>, > + <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>, > + <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>; > + clock-names = "cfg_ahb", > + "ref", > + "com_aux", > + "pipe"; > + > + resets = <&gcc GCC_USB3_PHY_PRIM_SP0_BCR>, > + <&gcc GCC_USB3PHY_PHY_PRIM_SP0_BCR>; > + reset-names = "phy", "phy_phy"; > + > + #clock-cells = <0>; > + clock-output-names = "usb3_phy_pipe_clk_src"; > + > + #phy-cells = <0>; > + > + status = "disabled"; > + }; > + > qfprom@1b40000 { > compatible = "qcom,sm6115-qfprom", "qcom,qfprom"; > reg = <0x0 0x01b40000 0x0 0x7000>; > @@ -1111,8 +1136,8 @@ usb_dwc3: usb@4e00000 { > compatible = "snps,dwc3"; > reg = <0x0 0x04e00000 0x0 0xcd00>; > interrupts = <GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH>; > - phys = <&usb_hsphy>; > - phy-names = "usb2-phy"; > + phys = <&usb_hsphy>, <&usb_qmpphy>; > + phy-names = "usb2-phy", "usb3-phy"; > iommus = <&apps_smmu 0x120 0x0>; > snps,dis_u2_susphy_quirk; > snps,dis_enblslpm_quirk; > diff --git a/arch/arm64/boot/dts/qcom/sm6115p-lenovo-j606f.dts b/arch/arm64/boot/dts/qcom/sm6115p-lenovo-j606f.dts > index ea3340d31110..81fdcaf48926 100644 > --- a/arch/arm64/boot/dts/qcom/sm6115p-lenovo-j606f.dts > +++ b/arch/arm64/boot/dts/qcom/sm6115p-lenovo-j606f.dts > @@ -306,6 +306,9 @@ &usb { > &usb_dwc3 { > maximum-speed = "high-speed"; > dr_mode = "peripheral"; > + > + phys = <&usb_hsphy>; > + phy-names = "usb2-phy"; > }; > > &usb_hsphy {
On 2.05.2023 07:35, Bhupesh Sharma wrote: > Enable the USB controller and HS/SS PHYs on qrb4210-rb2 board. > > Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> > --- Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Konrad > arch/arm64/boot/dts/qcom/qrb4210-rb2.dts | 24 ++++++++++++++++++++++++ > 1 file changed, 24 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts b/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts > index dc80f0bca767..eae3024ce003 100644 > --- a/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts > +++ b/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts > @@ -222,6 +222,30 @@ &uart4 { > status = "okay"; > }; > > +&usb { > + status = "okay"; > +}; > + > +&usb_dwc3 { > + maximum-speed = "super-speed"; > + dr_mode = "peripheral"; > +}; > + > +&usb_hsphy { > + vdd-supply = <&vreg_l4a_0p9>; > + vdda-pll-supply = <&vreg_l12a_1p8>; > + vdda-phy-dpdm-supply = <&vreg_l15a_3p128>; > + > + status = "okay"; > +}; > + > +&usb_qmpphy { > + vdda-phy-supply = <&vreg_l4a_0p9>; > + vdda-pll-supply = <&vreg_l12a_1p8>; > + > + status = "okay"; > +}; > + > &xo_board { > clock-frequency = <19200000>; > };
On 5/2/23 06:35, Bhupesh Sharma wrote: > Add USB superspeed qmp phy node to dtsi. > > Make sure that the various board dts files (which include sm4250.dtsi file) > continue to work as intended. > > Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org> > --- > .../boot/dts/qcom/sm4250-oneplus-billie2.dts | 3 ++ > arch/arm64/boot/dts/qcom/sm6115.dtsi | 29 +++++++++++++++++-- > .../boot/dts/qcom/sm6115p-lenovo-j606f.dts | 3 ++ > 3 files changed, 33 insertions(+), 2 deletions(-) > > diff --git a/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts b/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts > index a1f0622db5a0..75951fd439df 100644 > --- a/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts > +++ b/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts > @@ -242,6 +242,9 @@ &usb { > &usb_dwc3 { > maximum-speed = "high-speed"; > dr_mode = "peripheral"; > + > + phys = <&usb_hsphy>; > + phy-names = "usb2-phy"; > }; > > &usb_hsphy { > diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi > index 631ca327e064..f67863561f3f 100644 > --- a/arch/arm64/boot/dts/qcom/sm6115.dtsi > +++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi > @@ -661,6 +661,31 @@ usb_hsphy: phy@1613000 { > status = "disabled"; > }; > > + usb_qmpphy: phy@1615000 { > + compatible = "qcom,sm6115-qmp-usb3-phy"; > + reg = <0x0 0x01615000 0x0 0x1000>; > + > + clocks = <&gcc GCC_AHB2PHY_USB_CLK>, > + <&gcc GCC_USB3_PRIM_CLKREF_CLK>, > + <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>, > + <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>; > + clock-names = "cfg_ahb", > + "ref", > + "com_aux", > + "pipe"; > + > + resets = <&gcc GCC_USB3_PHY_PRIM_SP0_BCR>, > + <&gcc GCC_USB3PHY_PHY_PRIM_SP0_BCR>; > + reset-names = "phy", "phy_phy"; > + > + #clock-cells = <0>; > + clock-output-names = "usb3_phy_pipe_clk_src"; > + > + #phy-cells = <0>; > + > + status = "disabled"; > + }; > + > qfprom@1b40000 { > compatible = "qcom,sm6115-qfprom", "qcom,qfprom"; > reg = <0x0 0x01b40000 0x0 0x7000>; > @@ -1111,8 +1136,8 @@ usb_dwc3: usb@4e00000 { > compatible = "snps,dwc3"; > reg = <0x0 0x04e00000 0x0 0xcd00>; > interrupts = <GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH>; > - phys = <&usb_hsphy>; > - phy-names = "usb2-phy"; > + phys = <&usb_hsphy>, <&usb_qmpphy>; > + phy-names = "usb2-phy", "usb3-phy"; > iommus = <&apps_smmu 0x120 0x0>; > snps,dis_u2_susphy_quirk; > snps,dis_enblslpm_quirk; > diff --git a/arch/arm64/boot/dts/qcom/sm6115p-lenovo-j606f.dts b/arch/arm64/boot/dts/qcom/sm6115p-lenovo-j606f.dts > index ea3340d31110..81fdcaf48926 100644 > --- a/arch/arm64/boot/dts/qcom/sm6115p-lenovo-j606f.dts > +++ b/arch/arm64/boot/dts/qcom/sm6115p-lenovo-j606f.dts > @@ -306,6 +306,9 @@ &usb { > &usb_dwc3 { > maximum-speed = "high-speed"; > dr_mode = "peripheral"; > + > + phys = <&usb_hsphy>; > + phy-names = "usb2-phy"; > }; > > &usb_hsphy {
On 5/2/23 06:35, Bhupesh Sharma wrote: > Enable the USB controller and HS/SS PHYs on qrb4210-rb2 board. > > Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org> > --- > arch/arm64/boot/dts/qcom/qrb4210-rb2.dts | 24 ++++++++++++++++++++++++ > 1 file changed, 24 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts b/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts > index dc80f0bca767..eae3024ce003 100644 > --- a/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts > +++ b/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts > @@ -222,6 +222,30 @@ &uart4 { > status = "okay"; > }; > > +&usb { > + status = "okay"; > +}; > + > +&usb_dwc3 { > + maximum-speed = "super-speed"; > + dr_mode = "peripheral"; > +}; > + > +&usb_hsphy { > + vdd-supply = <&vreg_l4a_0p9>; > + vdda-pll-supply = <&vreg_l12a_1p8>; > + vdda-phy-dpdm-supply = <&vreg_l15a_3p128>; > + > + status = "okay"; > +}; > + > +&usb_qmpphy { > + vdda-phy-supply = <&vreg_l4a_0p9>; > + vdda-pll-supply = <&vreg_l12a_1p8>; > + > + status = "okay"; > +}; > + > &xo_board { > clock-frequency = <19200000>; > };
On 02-05-23, 11:05, Bhupesh Sharma wrote: > > This patchset adds the support for USB SS qmp phy for Qualcomm SM6115 > SoC. For the previous versions of this patch there were conversations > on irc as to whether this was a 'qcom,usb-ssphy-qmp-usb3-or-dp' or a > 'qcom,usb-ssphy-qmp-dp-combo' as per downstream code and hardware > documentation. > > But after a careful look at downstream dtsi (see [1]) it appears that > this indeed is a 'qcom,usb-ssphy-qmp-usb3-or-dp' phy and not a > 'dp-combo' phy. Fails to apply for me, pls rebase
On Tue, 16 May 2023 at 19:53, Vinod Koul <vkoul@kernel.org> wrote: > > On 02-05-23, 11:05, Bhupesh Sharma wrote: > > > > > This patchset adds the support for USB SS qmp phy for Qualcomm SM6115 > > SoC. For the previous versions of this patch there were conversations > > on irc as to whether this was a 'qcom,usb-ssphy-qmp-usb3-or-dp' or a > > 'qcom,usb-ssphy-qmp-dp-combo' as per downstream code and hardware > > documentation. > > > > But after a careful look at downstream dtsi (see [1]) it appears that > > this indeed is a 'qcom,usb-ssphy-qmp-usb3-or-dp' phy and not a > > 'dp-combo' phy. > > Fails to apply for me, pls rebase Sent v11 which is rebased on phy/next (see [1]). [1]. https://lore.kernel.org/linux-arm-msm/20230516150511.2346357-1-bhupesh.sharma@linaro.org/ Thanks, Bhupesh