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[v8,0/2] Enable USB SS qmp phy for Qualcomm SM6115 SoC

Message ID 20230410171010.2561393-1-bhupesh.sharma@linaro.org
Headers show
Series Enable USB SS qmp phy for Qualcomm SM6115 SoC | expand

Message

Bhupesh Sharma April 10, 2023, 5:10 p.m. UTC
Changes since v7:
-----------------
- v7 can be seen here: https://lore.kernel.org/linux-arm-msm/20230409200934.2329297-1-bhupesh.sharma@linaro.org/
- Addressed review comments from Dmitry and added "pipe clk".

Changes since v6:
-----------------
- v6 can be seen here: https://lore.kernel.org/linux-arm-msm/20230407061122.2036838-1-bhupesh.sharma@linaro.org/
- Addressed review comments from Bjorn and Dmitry and dropped old bindings in this
  version.

Changes since v5:
-----------------
- v5 can be seen here: https://lore.kernel.org/linux-arm-msm/20230405191633.1864671-1-bhupesh.sharma@linaro.org/
- Addressed review comments from Dmitry and made [PATCH 1/2] compatible with his 
  'split away legacy USB+DP code' series:
  <https://patchwork.kernel.org/project/linux-phy/cover/20230324215550.1966809-1-dmitry.baryshkov@linaro.org>

Changes since v4:
-----------------
- v4 can be seen here: https://lore.kernel.org/linux-arm-msm/20230401154725.1059563-1-bhupesh.sharma@linaro.org/ 
- Collected Krzysztof's Ack for [PATCH 1/2].
- Added more descriptive commit logs as per Dmitry's comments on v4.

Changes since v3:
-----------------
- v3 can be seen here: https://lore.kernel.org/linux-arm-msm/20221215094532.589291-4-bhupesh.sharma@linaro.org/
- Fixed v4 as per the downstream driver code: https://android.googlesource.com/kernel/msm-extra/devicetree/+/refs/heads/android-msm-bramble-4.19-android11-qpr1/qcom/bengal-usb.dtsi#296

This patchset adds the support for USB SS qmp phy for Qualcomm SM6115
SoC. For the previous versions of this patch there were conversations
on irc as to whether this was a 'qcom,usb-ssphy-qmp-usb3-or-dp' or a
'qcom,usb-ssphy-qmp-dp-combo' as per downstream code and hardware
documentation.

But after a careful look at downstream dtsi (see [1]) it appears that
this indeed is a 'qcom,usb-ssphy-qmp-usb3-or-dp' phy and not a
'dp-combo' phy.

[1]. https://android.googlesource.com/kernel/msm-extra/devicetree/+/refs/heads/android-msm-bramble-4.19-android11-qpr1/qcom/bengal-usb.dtsi#296

Bhupesh Sharma (2):
  dt-bindings: phy: qcom,qmp-usb: Drop legacy bindings and move to newer
    one (SM6115 & QCM2290)
  arm64: dts: qcom: sm6115: Add USB SS qmp phy node

 .../phy/qcom,msm8996-qmp-usb3-phy.yaml        | 27 ------------
 .../phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml   | 44 ++++++++++++++++---
 .../boot/dts/qcom/sm4250-oneplus-billie2.dts  |  3 ++
 arch/arm64/boot/dts/qcom/sm6115.dtsi          | 29 +++++++++++-
 .../boot/dts/qcom/sm6115p-lenovo-j606f.dts    |  3 ++
 5 files changed, 72 insertions(+), 34 deletions(-)

Comments

Dmitry Baryshkov April 11, 2023, 7:47 a.m. UTC | #1
On 10/04/2023 20:10, Bhupesh Sharma wrote:
> Add USB superspeed qmp phy node to dtsi.
> 
> Make sure that the various board dts files (which include sm4250.dtsi file)
> continue to work as intended.
> 
> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
> ---
>   .../boot/dts/qcom/sm4250-oneplus-billie2.dts  |  3 ++
>   arch/arm64/boot/dts/qcom/sm6115.dtsi          | 29 +++++++++++++++++--
>   .../boot/dts/qcom/sm6115p-lenovo-j606f.dts    |  3 ++
>   3 files changed, 33 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts b/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts
> index a1f0622db5a0..75951fd439df 100644
> --- a/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts
> +++ b/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts
> @@ -242,6 +242,9 @@ &usb {
>   &usb_dwc3 {
>   	maximum-speed = "high-speed";
>   	dr_mode = "peripheral";
> +
> +	phys = <&usb_hsphy>;
> +	phy-names = "usb2-phy";
>   };
>   
>   &usb_hsphy {
> diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi
> index 2505c815c65a..b2ea8f13e827 100644
> --- a/arch/arm64/boot/dts/qcom/sm6115.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi
> @@ -651,6 +651,31 @@ usb_hsphy: phy@1613000 {
>   			status = "disabled";
>   		};
>   
> +		usb_qmpphy: phy@1615000 {
> +			compatible = "qcom,sm6115-qmp-usb3-phy";
> +			reg = <0x0 0x01615000 0x0 0x200>;
> +
> +			clocks = <&gcc GCC_AHB2PHY_USB_CLK>,
> +				 <&gcc GCC_USB3_PRIM_CLKREF_CLK>,
> +				 <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>,
> +				 <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>;
> +			clock-names = "cfg_ahb",
> +				      "ref",
> +				      "com_aux",
> +				      "pipe";
> +
> +			resets = <&gcc GCC_USB3_PHY_PRIM_SP0_BCR>,
> +				 <&gcc GCC_USB3PHY_PHY_PRIM_SP0_BCR>;
> +			reset-names = "phy", "phy_phy";
> +
> +			#clock-cells = <0>;
> +			clock-output-names = "usb3_phy_pipe_clk_src";
> +
> +			#phy-cells = <0>;
> +
> +			status = "disabled";


Please excuse me if I'm wrong, but this will not work with the current 
PHY driver. It was not updated to handle new bindings. Please provide 
relevant driver patches too.

> +		};
> +
>   		qfprom@1b40000 {
>   			compatible = "qcom,sm6115-qfprom", "qcom,qfprom";
>   			reg = <0x0 0x01b40000 0x0 0x7000>;
> @@ -1101,8 +1126,8 @@ usb_dwc3: usb@4e00000 {
>   				compatible = "snps,dwc3";
>   				reg = <0x0 0x04e00000 0x0 0xcd00>;
>   				interrupts = <GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH>;
> -				phys = <&usb_hsphy>;
> -				phy-names = "usb2-phy";
> +				phys = <&usb_hsphy>, <&usb_ssphy>;
> +				phy-names = "usb2-phy", "usb3-phy";
>   				iommus = <&apps_smmu 0x120 0x0>;
>   				snps,dis_u2_susphy_quirk;
>   				snps,dis_enblslpm_quirk;
> diff --git a/arch/arm64/boot/dts/qcom/sm6115p-lenovo-j606f.dts b/arch/arm64/boot/dts/qcom/sm6115p-lenovo-j606f.dts
> index 10c9d338446c..d60cc024749b 100644
> --- a/arch/arm64/boot/dts/qcom/sm6115p-lenovo-j606f.dts
> +++ b/arch/arm64/boot/dts/qcom/sm6115p-lenovo-j606f.dts
> @@ -280,6 +280,9 @@ &usb {
>   &usb_dwc3 {
>   	maximum-speed = "high-speed";
>   	dr_mode = "peripheral";
> +
> +	phys = <&usb_hsphy>;
> +	phy-names = "usb2-phy";
>   };
>   
>   &usb_hsphy {
Bhupesh Sharma April 11, 2023, 12:18 p.m. UTC | #2
On Tue, 11 Apr 2023 at 13:17, Dmitry Baryshkov
<dmitry.baryshkov@linaro.org> wrote:
>
> On 10/04/2023 20:10, Bhupesh Sharma wrote:
> > Add USB superspeed qmp phy node to dtsi.
> >
> > Make sure that the various board dts files (which include sm4250.dtsi file)
> > continue to work as intended.
> >
> > Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
> > ---
> >   .../boot/dts/qcom/sm4250-oneplus-billie2.dts  |  3 ++
> >   arch/arm64/boot/dts/qcom/sm6115.dtsi          | 29 +++++++++++++++++--
> >   .../boot/dts/qcom/sm6115p-lenovo-j606f.dts    |  3 ++
> >   3 files changed, 33 insertions(+), 2 deletions(-)
> >
> > diff --git a/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts b/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts
> > index a1f0622db5a0..75951fd439df 100644
> > --- a/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts
> > +++ b/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts
> > @@ -242,6 +242,9 @@ &usb {
> >   &usb_dwc3 {
> >       maximum-speed = "high-speed";
> >       dr_mode = "peripheral";
> > +
> > +     phys = <&usb_hsphy>;
> > +     phy-names = "usb2-phy";
> >   };
> >
> >   &usb_hsphy {
> > diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi
> > index 2505c815c65a..b2ea8f13e827 100644
> > --- a/arch/arm64/boot/dts/qcom/sm6115.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi
> > @@ -651,6 +651,31 @@ usb_hsphy: phy@1613000 {
> >                       status = "disabled";
> >               };
> >
> > +             usb_qmpphy: phy@1615000 {
> > +                     compatible = "qcom,sm6115-qmp-usb3-phy";
> > +                     reg = <0x0 0x01615000 0x0 0x200>;
> > +
> > +                     clocks = <&gcc GCC_AHB2PHY_USB_CLK>,
> > +                              <&gcc GCC_USB3_PRIM_CLKREF_CLK>,
> > +                              <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>,
> > +                              <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>;
> > +                     clock-names = "cfg_ahb",
> > +                                   "ref",
> > +                                   "com_aux",
> > +                                   "pipe";
> > +
> > +                     resets = <&gcc GCC_USB3_PHY_PRIM_SP0_BCR>,
> > +                              <&gcc GCC_USB3PHY_PHY_PRIM_SP0_BCR>;
> > +                     reset-names = "phy", "phy_phy";
> > +
> > +                     #clock-cells = <0>;
> > +                     clock-output-names = "usb3_phy_pipe_clk_src";
> > +
> > +                     #phy-cells = <0>;
> > +
> > +                     status = "disabled";
>
>
> Please excuse me if I'm wrong, but this will not work with the current
> PHY driver. It was not updated to handle new bindings. Please provide
> relevant driver patches too.

Oh.. from your previous emails, I got the feeling that you were
already reworking the existing PHY driver as part of enabling it for
newer bindings.

No issues, I will send the PHY patches as well in the next version.

Thanks,
Bhupesh
Dmitry Baryshkov April 11, 2023, 12:53 p.m. UTC | #3
On Tue, 11 Apr 2023 at 15:18, Bhupesh Sharma <bhupesh.sharma@linaro.org> wrote:
>
> On Tue, 11 Apr 2023 at 13:17, Dmitry Baryshkov
> <dmitry.baryshkov@linaro.org> wrote:
> >
> > On 10/04/2023 20:10, Bhupesh Sharma wrote:
> > > Add USB superspeed qmp phy node to dtsi.
> > >
> > > Make sure that the various board dts files (which include sm4250.dtsi file)
> > > continue to work as intended.
> > >
> > > Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
> > > ---
> > >   .../boot/dts/qcom/sm4250-oneplus-billie2.dts  |  3 ++
> > >   arch/arm64/boot/dts/qcom/sm6115.dtsi          | 29 +++++++++++++++++--
> > >   .../boot/dts/qcom/sm6115p-lenovo-j606f.dts    |  3 ++
> > >   3 files changed, 33 insertions(+), 2 deletions(-)
> > >
> > > diff --git a/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts b/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts
> > > index a1f0622db5a0..75951fd439df 100644
> > > --- a/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts
> > > +++ b/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts
> > > @@ -242,6 +242,9 @@ &usb {
> > >   &usb_dwc3 {
> > >       maximum-speed = "high-speed";
> > >       dr_mode = "peripheral";
> > > +
> > > +     phys = <&usb_hsphy>;
> > > +     phy-names = "usb2-phy";
> > >   };
> > >
> > >   &usb_hsphy {
> > > diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi
> > > index 2505c815c65a..b2ea8f13e827 100644
> > > --- a/arch/arm64/boot/dts/qcom/sm6115.dtsi
> > > +++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi
> > > @@ -651,6 +651,31 @@ usb_hsphy: phy@1613000 {
> > >                       status = "disabled";
> > >               };
> > >
> > > +             usb_qmpphy: phy@1615000 {
> > > +                     compatible = "qcom,sm6115-qmp-usb3-phy";
> > > +                     reg = <0x0 0x01615000 0x0 0x200>;
> > > +
> > > +                     clocks = <&gcc GCC_AHB2PHY_USB_CLK>,
> > > +                              <&gcc GCC_USB3_PRIM_CLKREF_CLK>,
> > > +                              <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>,
> > > +                              <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>;
> > > +                     clock-names = "cfg_ahb",
> > > +                                   "ref",
> > > +                                   "com_aux",
> > > +                                   "pipe";
> > > +
> > > +                     resets = <&gcc GCC_USB3_PHY_PRIM_SP0_BCR>,
> > > +                              <&gcc GCC_USB3PHY_PHY_PRIM_SP0_BCR>;
> > > +                     reset-names = "phy", "phy_phy";
> > > +
> > > +                     #clock-cells = <0>;
> > > +                     clock-output-names = "usb3_phy_pipe_clk_src";
> > > +
> > > +                     #phy-cells = <0>;
> > > +
> > > +                     status = "disabled";
> >
> >
> > Please excuse me if I'm wrong, but this will not work with the current
> > PHY driver. It was not updated to handle new bindings. Please provide
> > relevant driver patches too.
>
> Oh.. from your previous emails, I got the feeling that you were
> already reworking the existing PHY driver as part of enabling it for
> newer bindings.
>
> No issues, I will send the PHY patches as well in the next version.

Then this dependency should have been declared in the cover letter.