| Message ID | 20230322234050.47332-1-diogo.ivo@tecnico.ulisboa.pt |
|---|---|
| State | Handled Elsewhere |
| Headers | show |
| Series | memory: tegra: read values from correct device | expand |
On 23/03/2023 00:40, Diogo Ivo wrote: > When reading MR18 for Dev1 the code was incorrectly reading the > value corresponding to Dev0, so fix this by adjusting the index > according to the Tegra X1 TRM. > > Signed-off-by: Diogo Ivo <diogo.ivo@tecnico.ulisboa.pt> > --- > drivers/memory/tegra/tegra210-emc-cc-r21021.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) Any reviews on this? Anyway I expect resend to have full cc-list. Standard msg: Please use scripts/get_maintainers.pl to get a list of necessary people and lists to CC. It might happen, that command when run on an older kernel, gives you outdated entries. Therefore please be sure you base your patches on recent Linux kernel. Best regards, Krzysztof
On Wed, Mar 22, 2023 at 11:40:50PM +0000, Diogo Ivo wrote: > When reading MR18 for Dev1 the code was incorrectly reading the > value corresponding to Dev0, so fix this by adjusting the index > according to the Tegra X1 TRM. > > Signed-off-by: Diogo Ivo <diogo.ivo@tecnico.ulisboa.pt> > --- > drivers/memory/tegra/tegra210-emc-cc-r21021.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) Acked-by: Thierry Reding <treding@nvidia.com>
On Wed, 22 Mar 2023 23:40:50 +0000, Diogo Ivo wrote: > When reading MR18 for Dev1 the code was incorrectly reading the > value corresponding to Dev0, so fix this by adjusting the index > according to the Tegra X1 TRM. > > Applied, thanks! It's late, so it might miss current cycle. [1/1] memory: tegra: read values from correct device https://git.kernel.org/krzk/linux-mem-ctrl/c/be4c5c6e84429e87cfdf1c8be350a49a714a93e2 Best regards,
diff --git a/drivers/memory/tegra/tegra210-emc-cc-r21021.c b/drivers/memory/tegra/tegra210-emc-cc-r21021.c index cc76adb8d7e8..4cb608c71ead 100644 --- a/drivers/memory/tegra/tegra210-emc-cc-r21021.c +++ b/drivers/memory/tegra/tegra210-emc-cc-r21021.c @@ -277,7 +277,7 @@ static u32 update_clock_tree_delay(struct tegra210_emc *emc, int type) /* * Dev1 LSB. */ - value = tegra210_emc_mrr_read(emc, 2, 18); + value = tegra210_emc_mrr_read(emc, 1, 18); for (i = 0; i < emc->num_channels; i++) { temp[i][0] |= (value & 0x00ff) >> 0;
When reading MR18 for Dev1 the code was incorrectly reading the value corresponding to Dev0, so fix this by adjusting the index according to the Tegra X1 TRM. Signed-off-by: Diogo Ivo <diogo.ivo@tecnico.ulisboa.pt> --- drivers/memory/tegra/tegra210-emc-cc-r21021.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)