| Message ID | 20230306150157.122897-1-jonathanh@nvidia.com |
|---|---|
| State | Accepted |
| Headers | show |
| Series | arm64: tegra: Add DSU PMUs for Tegra234 | expand |
From: Thierry Reding <treding@nvidia.com> On Mon, 6 Mar 2023 15:01:57 +0000, Jon Hunter wrote: > Populate the DynamIQ Shared Unit (DSU) Performance Monitor Unit (PMU) > devices for Tegra234 which has one DSU PMU per CPU cluster. > > Applied, thanks! [1/1] arm64: tegra: Add DSU PMUs for Tegra234 commit: 1e7861b8ea94096fcecbaaa34bfdf9925de67747 Best regards,
diff --git a/arch/arm64/boot/dts/nvidia/tegra234.dtsi b/arch/arm64/boot/dts/nvidia/tegra234.dtsi index f1748cff8a33..649afbbc2d7f 100644 --- a/arch/arm64/boot/dts/nvidia/tegra234.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra234.dtsi @@ -3402,6 +3402,24 @@ l3c2: l3-cache2 { }; }; + dsu-pmu0 { + compatible = "arm,dsu-pmu"; + interrupts = <GIC_SPI 547 IRQ_TYPE_LEVEL_HIGH>; + cpus = <&cpu0_0>, <&cpu0_1>, <&cpu0_2>, <&cpu0_3>; + }; + + dsu-pmu1 { + compatible = "arm,dsu-pmu"; + interrupts = <GIC_SPI 548 IRQ_TYPE_LEVEL_HIGH>; + cpus = <&cpu1_0>, <&cpu1_1>, <&cpu1_2>, <&cpu1_3>; + }; + + dsu-pmu2 { + compatible = "arm,dsu-pmu"; + interrupts = <GIC_SPI 549 IRQ_TYPE_LEVEL_HIGH>; + cpus = <&cpu2_0>, <&cpu2_1>, <&cpu2_2>, <&cpu2_3>; + }; + pmu { compatible = "arm,cortex-a78-pmu"; interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>;
Populate the DynamIQ Shared Unit (DSU) Performance Monitor Unit (PMU) devices for Tegra234 which has one DSU PMU per CPU cluster. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> --- arch/arm64/boot/dts/nvidia/tegra234.dtsi | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+)