Message ID | 20230303031728.24251-1-allen-kh.cheng@mediatek.com |
---|---|
Headers | show |
Series | Add and update some driver nodes for MT8186 SoC | expand |
Il 03/03/23 04:17, Allen-KH Cheng ha scritto: > Add MTU3 nodes for MT8186 SoC. > > Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com> > Tested-by: Chen-Yu Tsai <wenst@chromium.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Il 03/03/23 04:17, Allen-KH Cheng ha scritto: > Add SPMI node for MT8186 SoC. > > Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Il 03/03/23 04:17, Allen-KH Cheng ha scritto: > Add ADSP node for MT8186 SoC. > > Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com> > --- > arch/arm64/boot/dts/mediatek/mt8186.dtsi | 16 ++++++++++++++++ > 1 file changed, 16 insertions(+) > > diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi b/arch/arm64/boot/dts/mediatek/mt8186.dtsi > index 0e42bdbd2cb6..337bcf3c1571 100644 > --- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi > +++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi > @@ -633,6 +633,22 @@ > interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH 0>; > }; > > + adsp: adsp@10680000 { > + compatible = "mediatek,mt8186-dsp"; > + reg = <0 0x10680000 0 0x2000>, <0 0x10800000 0 0x100000>, > + <0 0x1068b000 0 0x100>, <0 0x1068f000 0 0x1000>; > + reg-names = "cfg", "sram", "sec", "bus"; > + clocks = <&topckgen CLK_TOP_AUDIODSP>, <&topckgen CLK_TOP_ADSP_BUS>; Was missing <&topckgen CLK_TOP_AUDIO_H> intentional here? AFAIK, that's required for the ADSP. Regards, Angelo
Il 03/03/23 04:17, Allen-KH Cheng ha scritto: > Add the Global Command Engine (GCE) node for MT8186 SoC > > Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Il 03/03/23 04:17, Allen-KH Cheng ha scritto: > Add display nodes and the GCE (Global Command Engine) properties > to the display nodes in order to enable the usage of the CMDQ > (Command Queue), which is required for operating the display. > > Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com> > --- > arch/arm64/boot/dts/mediatek/mt8186.dtsi | 125 +++++++++++++++++++++++ > 1 file changed, 125 insertions(+) > > diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi b/arch/arm64/boot/dts/mediatek/mt8186.dtsi > index b9d5af26771e..909f1a6ae108 100644 > --- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi > +++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi > @@ -20,6 +20,13 @@ > #address-cells = <2>; > #size-cells = <2>; > > + aliases { > + ovl = &ovl; Are you sure that this alias shouldn't be `ovl0 = &ovl` instead? > + ovl_2l= &ovl_2l; And this `ovl_2l0 = &ovl_2l` ? Everything else looks good. Regards, Angelo
Hi Angelo, On Fri, 2023-03-03 at 12:35 +0100, AngeloGioacchino Del Regno wrote: > Il 03/03/23 04:17, Allen-KH Cheng ha scritto: > > Add display nodes and the GCE (Global Command Engine) properties > > to the display nodes in order to enable the usage of the CMDQ > > (Command Queue), which is required for operating the display. > > > > Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com> > > --- > > arch/arm64/boot/dts/mediatek/mt8186.dtsi | 125 > > +++++++++++++++++++++++ > > 1 file changed, 125 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi > > b/arch/arm64/boot/dts/mediatek/mt8186.dtsi > > index b9d5af26771e..909f1a6ae108 100644 > > --- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi > > +++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi > > @@ -20,6 +20,13 @@ > > #address-cells = <2>; > > #size-cells = <2>; > > > > + aliases { > > + ovl = &ovl; > > Are you sure that this alias shouldn't be `ovl0 = &ovl` instead? > > > + ovl_2l= &ovl_2l; > > And this `ovl_2l0 = &ovl_2l` ? > > Everything else looks good. > > Regards, > Angelo > Hmm, I think there is a small error here. I either put index in aliases or don't write aliases since the number of ovl and ovl_2l is one. I will add 0 and upstae in next version. Thanks, Allen Note: in mtk_ddp_comp_get_id: int id = of_alias_get_id(node, mtk_ddp_comp_stem[comp_type]); (id < 0 || id == mtk_ddp_matches[i].alias_id)) return i;
Hi Angelo, On Fri, 2023-03-03 at 12:31 +0100, AngeloGioacchino Del Regno wrote: > Il 03/03/23 04:17, Allen-KH Cheng ha scritto: > > Add ADSP node for MT8186 SoC. > > > > Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com> > > --- > > arch/arm64/boot/dts/mediatek/mt8186.dtsi | 16 ++++++++++++++++ > > 1 file changed, 16 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi > > b/arch/arm64/boot/dts/mediatek/mt8186.dtsi > > index 0e42bdbd2cb6..337bcf3c1571 100644 > > --- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi > > +++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi > > @@ -633,6 +633,22 @@ > > interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH > > 0>; > > }; > > > > + adsp: adsp@10680000 { > > + compatible = "mediatek,mt8186-dsp"; > > + reg = <0 0x10680000 0 0x2000>, <0 0x10800000 0 > > 0x100000>, > > + <0 0x1068b000 0 0x100>, <0 0x1068f000 0 > > 0x1000>; > > + reg-names = "cfg", "sram", "sec", "bus"; > > + clocks = <&topckgen CLK_TOP_AUDIODSP>, > > <&topckgen CLK_TOP_ADSP_BUS>; > > Was missing <&topckgen CLK_TOP_AUDIO_H> intentional here? > > AFAIK, that's required for the ADSP. > > Regards, > Angelo This may be dependent on the design of the chipset. CLK_TOP_AUDIO_H will be used by the afe (audio-controller) node. This is not used for DSP in the MT8186 architecture. Thanks, Allen