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[v2,0/6] Add ADSP power domains controller support for MT8192

Message ID 20221221034407.19605-1-allen-kh.cheng@mediatek.com
Headers show
Series Add ADSP power domains controller support for MT8192 | expand

Message

Allen-KH Cheng (程冠勳) Dec. 21, 2022, 3:44 a.m. UTC
This series is based on matthias github, v6.1-next.
The previous discussion: 
https://patchwork.kernel.org/project/linux-mediatek/patch/20221201073328.1559-1-allen-kh.cheng@mediatek.com/

Change from v1:
 - move allOf before additionalProperties
 - add buck isolation setting patches into series

Allen-KH Cheng (6):
  soc: mediatek: pm-domains: Add buck isolation offset and mask to power
    domain data
  soc: mediatek: pm-domains: Add buck isolation setting in power domain
  dt-bindings: power: Add MT8192 ADSP power domain
  soc: mediatek: pm-domains: Add ADSP power domain data for MT8192
  dt-bindings: arm: mediatek: Add missing power-domains property
  arm64: dts: mediatek: Add the missing ADSP power domains controller
    for MT8192

 .../arm/mediatek/mediatek,mt8192-clock.yaml     | 17 +++++++++++++++++
 arch/arm64/boot/dts/mediatek/mt8192.dtsi        |  9 +++++++++
 drivers/soc/mediatek/mt8192-pm-domains.h        | 16 ++++++++++++++++
 drivers/soc/mediatek/mtk-pm-domains.c           |  8 ++++++++
 drivers/soc/mediatek/mtk-pm-domains.h           |  5 +++++
 include/dt-bindings/power/mt8192-power.h        |  1 +
 6 files changed, 56 insertions(+)

Comments

AngeloGioacchino Del Regno Dec. 21, 2022, 10:18 a.m. UTC | #1
Il 21/12/22 04:44, Allen-KH Cheng ha scritto:
> Add buck isolation offset and mask to power domain data.
> 
> Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
AngeloGioacchino Del Regno Dec. 21, 2022, 10:20 a.m. UTC | #2
Il 21/12/22 04:44, Allen-KH Cheng ha scritto:
> In MT8192, we need to disable EXT_BUCK_ISO before turning on the ADSP
> power pm-domains (mtcmos).
> 
> Add the MTK_SCPD_EXT_BUCK_ISO flag to control the buck isolation
> setting in the mediatek power domain driver.
> 
> Fixes: 59b644b01cf4 ("soc: mediatek: Add MediaTek SCPSYS power domains")
> Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
> ---
>   drivers/soc/mediatek/mtk-pm-domains.c | 8 ++++++++
>   drivers/soc/mediatek/mtk-pm-domains.h | 1 +
>   2 files changed, 9 insertions(+)
> 
> diff --git a/drivers/soc/mediatek/mtk-pm-domains.c b/drivers/soc/mediatek/mtk-pm-domains.c
> index 09e3c38b8466..63f1e183f645 100644
> --- a/drivers/soc/mediatek/mtk-pm-domains.c
> +++ b/drivers/soc/mediatek/mtk-pm-domains.c
> @@ -218,6 +218,10 @@ static int scpsys_power_on(struct generic_pm_domain *genpd)
>   	if (ret)
>   		goto err_reg;
>   
> +	if (MTK_SCPD_CAPS(pd, MTK_SCPD_EXT_BUCK_ISO))

if (pd->data->ext_buck_iso_offs && MTK_SCPD_CAPS(pd, MTK_SCPD_EXT_BUCK_ISO))
	regmap_[...etc]

...so that we validate that ext_buck_iso_offs is actually present (as I
suppose that this is supposed to *never* be 0x0).

Regards,
Angelo
AngeloGioacchino Del Regno Dec. 21, 2022, 10:21 a.m. UTC | #3
Il 21/12/22 04:44, Allen-KH Cheng ha scritto:
> Add ADSP pm-domains (mtcmos) data for MT8192 SoC.
> 
> Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
AngeloGioacchino Del Regno Dec. 21, 2022, 10:23 a.m. UTC | #4
Il 21/12/22 04:44, Allen-KH Cheng ha scritto:
> Add the missing ADSP power domains controller for mt8192-scp_adsp clock
> controllers.
> 
> Fixes: 5d2b897bc6f5 ("arm64: dts: mediatek: Add mt8192 clock controllers")
> Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Matthias Brugger Feb. 3, 2023, 1:07 p.m. UTC | #5
On 21/12/2022 04:44, Allen-KH Cheng wrote:
> Add ADSP pm-domains (mtcmos) data for MT8192 SoC.
> 
> Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
> ---
>   drivers/soc/mediatek/mt8192-pm-domains.h | 16 ++++++++++++++++
>   1 file changed, 16 insertions(+)
> 
> diff --git a/drivers/soc/mediatek/mt8192-pm-domains.h b/drivers/soc/mediatek/mt8192-pm-domains.h
> index b97b2051920f..19e58f0ca1df 100644
> --- a/drivers/soc/mediatek/mt8192-pm-domains.h
> +++ b/drivers/soc/mediatek/mt8192-pm-domains.h
> @@ -287,6 +287,22 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8192[] = {
>   		.sram_pdn_bits = GENMASK(8, 8),
>   		.sram_pdn_ack_bits = GENMASK(12, 12),
>   	},
> +	[MT8192_POWER_DOMAIN_ADSP] = {
> +		.name = "adsp",
> +		.sta_mask = BIT(22),
> +		.ctl_offs = 0x0358,
> +		.sram_pdn_bits = GENMASK(8, 8),
> +		.sram_pdn_ack_bits = GENMASK(12, 12),
> +		.ext_buck_iso_offs = 0x039C,

Can we get a define for this magic number please?

Regards,
Matthias

> +		.ext_buck_iso_mask = BIT(2),
> +		.bp_infracfg = {
> +			BUS_PROT_WR(MT8192_TOP_AXI_PROT_EN_2_ADSP,
> +				    MT8192_TOP_AXI_PROT_EN_2_SET,
> +				    MT8192_TOP_AXI_PROT_EN_2_CLR,
> +				    MT8192_TOP_AXI_PROT_EN_2_STA1),
> +		},
> +		.caps = MTK_SCPD_SRAM_ISO | MTK_SCPD_EXT_BUCK_ISO,
> +	},
>   	[MT8192_POWER_DOMAIN_CAM] = {
>   		.name = "cam",
>   		.sta_mask = BIT(23),