diff mbox series

[v3,1/2] dt-bindings: arm: fsl: Add MSC SM2S-IMX8PLUS SoM and SM2-MB-EP1 Carrier

Message ID 20220721101050.2362811-1-martyn.welch@collabora.com
State Not Applicable, archived
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Series [v3,1/2] dt-bindings: arm: fsl: Add MSC SM2S-IMX8PLUS SoM and SM2-MB-EP1 Carrier | expand

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Commit Message

Martyn Welch July 21, 2022, 10:10 a.m. UTC
Add DT compatible strings for a combination of the 14N0600E variant of
the Avnet (MSC branded) SM2S-IMX8PLUS SoM on it's own and in combination
with the SM2-MB-EP1 carrier board.

Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
---

Changes in v2:
  - New addition

Changes in v3:
  - Switch to avnet vendor
  - Shortened descriptive comment

 Documentation/devicetree/bindings/arm/fsl.yaml | 7 +++++++
 1 file changed, 7 insertions(+)

Comments

Krzysztof Kozlowski July 21, 2022, 4:33 p.m. UTC | #1
On 21/07/2022 12:10, Martyn Welch wrote:
> Add DT compatible strings for a combination of the 14N0600E variant of
> the Avnet (MSC branded) SM2S-IMX8PLUS SoM on it's own and in combination
> with the SM2-MB-EP1 carrier board.
> 
> Signed-off-by: Martyn Welch <martyn.welch@collabora.com>


Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>


Best regards,
Krzysztof
Krzysztof Kozlowski July 21, 2022, 4:34 p.m. UTC | #2
On 21/07/2022 12:10, Martyn Welch wrote:
> Add device trees for one of a number of MSC's (parent company, Avnet)
> variants of the SM2S-IMX8PLUS system on module along with the compatible
> SM2S-SK-AL-EP1 carrier board. As the name suggests, this family of SoMs use
> the NXP i.MX8MP SoC and provide the SMARC module interface.
> 
> Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
> ---


Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>


Best regards,
Krzysztof
Martyn Welch Aug. 11, 2022, 8:49 a.m. UTC | #3
On Thu, 2022-07-21 at 18:34 +0200, Krzysztof Kozlowski wrote:
> On 21/07/2022 12:10, Martyn Welch wrote:
> > Add device trees for one of a number of MSC's (parent company,
> > Avnet)
> > variants of the SM2S-IMX8PLUS system on module along with the
> > compatible
> > SM2S-SK-AL-EP1 carrier board. As the name suggests, this family of
> > SoMs use
> > the NXP i.MX8MP SoC and provide the SMARC module interface.
> > 
> > Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
> > ---
> 

Is there anything else I need to do to get this ready for inclusion?

Martyn

> 
> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> 
> 
> Best regards,
> Krzysztof
Krzysztof Kozlowski Aug. 11, 2022, 9 a.m. UTC | #4
On 11/08/2022 11:49, Martyn Welch wrote:
> On Thu, 2022-07-21 at 18:34 +0200, Krzysztof Kozlowski wrote:
>> On 21/07/2022 12:10, Martyn Welch wrote:
>>> Add device trees for one of a number of MSC's (parent company,
>>> Avnet)
>>> variants of the SM2S-IMX8PLUS system on module along with the
>>> compatible
>>> SM2S-SK-AL-EP1 carrier board. As the name suggests, this family of
>>> SoMs use
>>> the NXP i.MX8MP SoC and provide the SMARC module interface.
>>>
>>> Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
>>> ---
>>
> 
> Is there anything else I need to do to get this ready for inclusion?
> 

One thing could be - do not ping during the merge window. :) And if
pinging be a bit more specific whom you ping.

Best regards,
Krzysztof
Fabio Estevam Aug. 11, 2022, 2:04 p.m. UTC | #5
On Thu, Jul 21, 2022 at 7:11 AM Martyn Welch <martyn.welch@collabora.com> wrote:

> +&eqos {
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&pinctrl_eqos>;
> +       phy-mode = "rgmii-id";
> +       phy-handle = <&ethphy0>;
> +       phy-reset-gpios = <&tca6424 16 GPIO_ACTIVE_LOW>;
> +       phy-reset-duration = <1>;
> +       phy-reset-post-delay = <1>;
> +       status = "okay";
> +
> +       mdio {
> +               compatible = "snps,dwmac-mdio";
> +               #address-cells = <1>;
> +               #size-cells = <0>;
> +
> +               ethphy0: ethernet-phy@1 {
> +                       compatible = "ethernet-phy-ieee802.3-c22";
> +                       reg = <1>;
> +                       eee-broken-1000t;
> +                       phy-reset-gpios = <&tca6424 16 GPIO_ACTIVE_LOW>;

You have already added  phy-reset-gpios above.

The phy-reset- properties are deprecated. It's better to use
reset-gpios,reset-assert-us, etc inside the mdio node.

> +&fec {
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&pinctrl_fec>;
> +       phy-mode = "rgmii-id";
> +       phy-handle = <&ethphy1>;
> +       phy-reset-gpios = <&tca6424 17 GPIO_ACTIVE_LOW>;
> +       phy-reset-duration = <1>;
> +       phy-reset-post-delay = <1>;
> +       fsl,magic-packet;
> +       status = "okay";
> +
> +       mdio {
> +               #address-cells = <1>;
> +               #size-cells = <0>;
> +
> +               ethphy1: ethernet-phy@1 {
> +                       compatible = "ethernet-phy-ieee802.3-c22";
> +                       reg = <1>;
> +                       eee-broken-1000t;
> +                       phy-reset-gpios = <&tca6424 17 GPIO_ACTIVE_LOW>;

Same here.

> +&sdma1 {
> +       status = "okay";

No need to enable it as sdma1 is not disabled in imx8mp.dtsi.
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml
index ef524378d449..497a137d75f7 100644
--- a/Documentation/devicetree/bindings/arm/fsl.yaml
+++ b/Documentation/devicetree/bindings/arm/fsl.yaml
@@ -921,6 +921,13 @@  properties:
               - toradex,verdin-imx8mp-wifi  # Verdin iMX8M Plus Wi-Fi / BT Modules
           - const: fsl,imx8mp
 
+      - description: Avnet (MSC Branded) Boards with SM2S i.MX8M Plus Modules
+        items:
+          - const: avnet,sm2s-imx8mp-14N0600E-ep1 # SM2S-IMX8PLUS-14N0600E on SM2-MB-EP1 Carrier Board
+          - const: avnet,sm2s-imx8mp-14N0600E     # 14N0600E variant of SM2S-IMX8PLUS SoM
+          - const: avnet,sm2s-imx8mp              # SM2S-IMX8PLUS SoM
+          - const: fsl,imx8mp
+
       - description: Engicam i.Core MX8M Plus SoM based boards
         items:
           - enum: