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[v3,0/5] arm64: dts: qcom: Introduce SC8280XP

Message ID 20220629041438.1352536-1-bjorn.andersson@linaro.org
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Series arm64: dts: qcom: Introduce SC8280XP | expand

Message

Bjorn Andersson June 29, 2022, 4:14 a.m. UTC 
This series introduces the Qualcomm 8cx Gen 3 platform, with basic support for
the CRD reference device and the SA8295P automotive development platform.

The Lenovo Thinkpad X13s dts was part of this series, but Johan reposed a
polished version at [1], which I intend to merge on top of this series.

[1] https://lore.kernel.org/all/20220622132617.24604-1-johan+linaro@kernel.org/

Bjorn Andersson (5):
  dt-bindings: arm: qcom: Document additional sc8280xp devices
  dt-bindings: mailbox: qcom-ipcc: Add NSP1 client
  arm64: dts: qcom: add SC8280XP platform
  arm64: dts: qcom: sc8280xp: Add reference device
  arm64: dts: qcom: add SA8540P and ADP

 .../devicetree/bindings/arm/qcom.yaml         |    2 +
 arch/arm64/boot/dts/qcom/Makefile             |    2 +
 arch/arm64/boot/dts/qcom/sa8295p-adp.dts      |  406 ++++
 arch/arm64/boot/dts/qcom/sa8540p.dtsi         |  133 +
 arch/arm64/boot/dts/qcom/sc8280xp-crd.dts     |  427 ++++
 arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi  |  109 +
 arch/arm64/boot/dts/qcom/sc8280xp.dtsi        | 2142 +++++++++++++++++
 include/dt-bindings/mailbox/qcom-ipcc.h       |    1 +
 8 files changed, 3222 insertions(+)
 create mode 100644 arch/arm64/boot/dts/qcom/sa8295p-adp.dts
 create mode 100644 arch/arm64/boot/dts/qcom/sa8540p.dtsi
 create mode 100644 arch/arm64/boot/dts/qcom/sc8280xp-crd.dts
 create mode 100644 arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi
 create mode 100644 arch/arm64/boot/dts/qcom/sc8280xp.dtsi

Comments

Johan Hovold June 29, 2022, 7:45 a.m. UTC | #1 
On Tue, Jun 28, 2022 at 09:14:38PM -0700, Bjorn Andersson wrote:
> Introduce the Qualcomm SA8540P automotive platform and the SA8295P ADP
> development board.
> 
> The SA8540P and SC8280XP are fairly similar, so the SA8540P is built
> ontop of the SC8280XP dtsi to reduce duplication. As more advanced
> features are integrated this might be re-evaluated.
> 
> This initial contribution supports SMP, CPUFreq, cluster idle, UFS, RPMh
> regulators, debug UART, PMICs, remoteprocs (NSPs crashes shortly after
> booting) and USB.
> 
> The SA8295P ADP contains four PM8450 PMICs, which according to their
> revid are compatible with PM8150. They are defined within the ADP for
> now, to avoid creating additional .dtsi files for PM8150 with just
> addresses changed - and to allow using the labels from the schematics.
> 
> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
> Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
> ---
> 
> Changes since v2:
> - Sorted "status" property last throughout the patch
> - Dropped empty reserved-memory node
> - Dropped multiport vbus-enable pinctrl states for now

> +/* PINCTRL */
> +&pm8450c_gpios {
> +	usb2_en_state: usb2-en-state {
> +		pins = "gpio9";
> +		function = "normal";
> +		output-high;
> +		power-source = <0>;
> +	};
> +};
> +
> +&pm8450e_gpios {
> +	usb3_en_state: usb3-en-state {
> +		pins = "gpio5";
> +		function = "normal";
> +		output-high;
> +		power-source = <0>;
> +	};
> +};

You forgot to remove these two when you removed the other multiport
vbus-enable states.

Looks good otherwise.

Johan
Stephan Gerhold June 29, 2022, 6:42 p.m. UTC | #2 
On Tue, Jun 28, 2022 at 09:14:36PM -0700, Bjorn Andersson wrote:
> Introduce initial support for the Qualcomm SC8280XP platform, aka 8cx
> Gen 3. This initial contribution supports SMP, CPUfreq, CPU cluster
> idling, GCC, TLMM, SMMU, RPMh regulators, power-domains and clocks,
> interconnects, some QUPs, UFS, remoteprocs, USB, watchdog, LLCC and
> tsens.
> 
> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
> Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> ---
> 
> Changes since v2:
> - Fixed include sort order
> - Dropped a stray newline in &CPU0
> - Renamed reserved-memory regions
> - Dropped clock-frequency of the timers node
> - Reduced #address-cells and #size-cells to 1 in timer node
> 
>  arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 2142 ++++++++++++++++++++++++
>  1 file changed, 2142 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> 
> diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> new file mode 100644
> index 000000000000..c9d608ac87fa
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> @@ -0,0 +1,2142 @@
[...]
> +	timer {
> +		compatible = "arm,armv8-timer";
> +		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
> +			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
> +			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
> +			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
> +		clock-frequency = <19200000>;

Please drop the "clock-frequency" here as well (if possible).

Thanks,
Stephan
Bjorn Andersson June 30, 2022, 3:01 a.m. UTC | #3 
On Wed 29 Jun 13:42 CDT 2022, Stephan Gerhold wrote:

> On Tue, Jun 28, 2022 at 09:14:36PM -0700, Bjorn Andersson wrote:
> > Introduce initial support for the Qualcomm SC8280XP platform, aka 8cx
> > Gen 3. This initial contribution supports SMP, CPUfreq, CPU cluster
> > idling, GCC, TLMM, SMMU, RPMh regulators, power-domains and clocks,
> > interconnects, some QUPs, UFS, remoteprocs, USB, watchdog, LLCC and
> > tsens.
> > 
> > Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
> > Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
> > Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
> > Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> > ---
> > 
> > Changes since v2:
> > - Fixed include sort order
> > - Dropped a stray newline in &CPU0
> > - Renamed reserved-memory regions
> > - Dropped clock-frequency of the timers node
> > - Reduced #address-cells and #size-cells to 1 in timer node
> > 
> >  arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 2142 ++++++++++++++++++++++++
> >  1 file changed, 2142 insertions(+)
> >  create mode 100644 arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> > 
> > diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> > new file mode 100644
> > index 000000000000..c9d608ac87fa
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> > @@ -0,0 +1,2142 @@
> [...]
> > +	timer {
> > +		compatible = "arm,armv8-timer";
> > +		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
> > +			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
> > +			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
> > +			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
> > +		clock-frequency = <19200000>;
> 
> Please drop the "clock-frequency" here as well (if possible).
> 

Sorry, missed that commend from your previous feedback. Will drop this
as I'm applying the patches.

Thanks,
Bjorn
Bjorn Andersson July 3, 2022, 3:55 a.m. UTC | #4 
On Tue, 28 Jun 2022 21:14:33 -0700, Bjorn Andersson wrote:
> This series introduces the Qualcomm 8cx Gen 3 platform, with basic support for
> the CRD reference device and the SA8295P automotive development platform.
> 
> The Lenovo Thinkpad X13s dts was part of this series, but Johan reposed a
> polished version at [1], which I intend to merge on top of this series.
> 
> [1] https://lore.kernel.org/all/20220622132617.24604-1-johan+linaro@kernel.org/
> 
> [...]

Applied, thanks!

[1/5] dt-bindings: arm: qcom: Document additional sc8280xp devices
      commit: 05b90d240409240cbc40c2eb4a0f2b206a513e13
[2/5] dt-bindings: mailbox: qcom-ipcc: Add NSP1 client
      commit: 36a7b63f069630e854beb305e99c151cddd3b8e5
[3/5] arm64: dts: qcom: add SC8280XP platform
      commit: 152d1faf1e2f32cfb1956c7e5e42e8cb2c95ff18
[4/5] arm64: dts: qcom: sc8280xp: Add reference device
      commit: ccd3517faf18330c051068f07dd8ef79853238c7
[5/5] arm64: dts: qcom: add SA8540P and ADP
      commit: 519183af39b2cac56614c14f5e710f8caa0bc32a

Best regards,