Message ID | b245c165f05845c1f3ab41a92c82b7ec1538cee4.1655288171.git.michal.simek@amd.com |
---|---|
State | Accepted |
Commit | b8745e7eb4888ec6dd7495aad7948a92d141669a |
Delegated to: | Michal Simek |
Headers | show |
Series | arm64: zynqmp: Fix usb node drive strength and slew rate | expand |
st 15. 6. 2022 v 12:16 odesÃlatel Michal Simek <monstr@monstr.eu> napsal: > > From: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> > > As per design, all input/rx pins should have fast slew rate and 12mA > drive strength. Rest all pins should be slow slew rate and 4mA drive > strength. Fix usb nodes as per this and remove setting of slow slew rate > for all the usb gorup pins. > > Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> > Signed-off-by: Michal Simek <michal.simek@amd.com> > --- > > arch/arm/dts/zynqmp-sck-kr-g-revA.dts | 10 ++++++++-- > arch/arm/dts/zynqmp-sck-kr-g-revB.dts | 10 ++++++++-- > arch/arm/dts/zynqmp-sck-kv-g-revA.dts | 5 ++++- > arch/arm/dts/zynqmp-sck-kv-g-revB.dts | 5 ++++- > arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts | 5 ++++- > arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts | 5 ++++- > arch/arm/dts/zynqmp-zcu100-revC.dts | 10 ++++++++-- > arch/arm/dts/zynqmp-zcu102-revA.dts | 5 ++++- > arch/arm/dts/zynqmp-zcu104-revA.dts | 6 ++++-- > arch/arm/dts/zynqmp-zcu104-revC.dts | 6 ++++-- > arch/arm/dts/zynqmp-zcu106-revA.dts | 5 ++++- > arch/arm/dts/zynqmp-zcu111-revA.dts | 5 ++++- > 12 files changed, 60 insertions(+), 17 deletions(-) > > diff --git a/arch/arm/dts/zynqmp-sck-kr-g-revA.dts b/arch/arm/dts/zynqmp-sck-kr-g-revA.dts > index 7be02ab29fa1..735c1e3d1a88 100644 > --- a/arch/arm/dts/zynqmp-sck-kr-g-revA.dts > +++ b/arch/arm/dts/zynqmp-sck-kr-g-revA.dts > @@ -329,19 +329,22 @@ > pinctrl_usb0_default: usb0-default { > conf { > groups = "usb0_0_grp"; > - slew-rate = <SLEW_RATE_SLOW>; > power-source = <IO_STANDARD_LVCMOS18>; > }; > > conf-rx { > pins = "MIO52", "MIO53", "MIO55"; > bias-high-impedance; > + drive-strength = <12>; > + slew-rate = <SLEW_RATE_FAST>; > }; > > conf-tx { > pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59", > "MIO60", "MIO61", "MIO62", "MIO63"; > bias-disable; > + drive-strength = <4>; > + slew-rate = <SLEW_RATE_SLOW>; > }; > > mux { > @@ -353,19 +356,22 @@ > pinctrl_usb1_default: usb1-default { > conf { > groups = "usb1_0_grp"; > - slew-rate = <SLEW_RATE_SLOW>; > power-source = <IO_STANDARD_LVCMOS18>; > }; > > conf-rx { > pins = "MIO64", "MIO65", "MIO67"; > bias-high-impedance; > + drive-strength = <12>; > + slew-rate = <SLEW_RATE_FAST>; > }; > > conf-tx { > pins = "MIO66", "MIO68", "MIO69", "MIO70", "MIO71", > "MIO72", "MIO73", "MIO74", "MIO75"; > bias-disable; > + drive-strength = <4>; > + slew-rate = <SLEW_RATE_SLOW>; > }; > > mux { > diff --git a/arch/arm/dts/zynqmp-sck-kr-g-revB.dts b/arch/arm/dts/zynqmp-sck-kr-g-revB.dts > index 56effb5e21a9..63590619d43e 100644 > --- a/arch/arm/dts/zynqmp-sck-kr-g-revB.dts > +++ b/arch/arm/dts/zynqmp-sck-kr-g-revB.dts > @@ -329,19 +329,22 @@ > pinctrl_usb0_default: usb0-default { > conf { > groups = "usb0_0_grp"; > - slew-rate = <SLEW_RATE_SLOW>; > power-source = <IO_STANDARD_LVCMOS18>; > }; > > conf-rx { > pins = "MIO52", "MIO53", "MIO55"; > bias-high-impedance; > + drive-strength = <12>; > + slew-rate = <SLEW_RATE_FAST>; > }; > > conf-tx { > pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59", > "MIO60", "MIO61", "MIO62", "MIO63"; > bias-disable; > + drive-strength = <4>; > + slew-rate = <SLEW_RATE_SLOW>; > }; > > mux { > @@ -353,19 +356,22 @@ > pinctrl_usb1_default: usb1-default { > conf { > groups = "usb1_0_grp"; > - slew-rate = <SLEW_RATE_SLOW>; > power-source = <IO_STANDARD_LVCMOS18>; > }; > > conf-rx { > pins = "MIO64", "MIO65", "MIO67"; > bias-high-impedance; > + drive-strength = <12>; > + slew-rate = <SLEW_RATE_FAST>; > }; > > conf-tx { > pins = "MIO66", "MIO68", "MIO69", "MIO70", "MIO71", > "MIO72", "MIO73", "MIO74", "MIO75"; > bias-disable; > + drive-strength = <4>; > + slew-rate = <SLEW_RATE_SLOW>; > }; > > mux { > diff --git a/arch/arm/dts/zynqmp-sck-kv-g-revA.dts b/arch/arm/dts/zynqmp-sck-kv-g-revA.dts > index 8250a493c8a0..b714bd3eb1b1 100644 > --- a/arch/arm/dts/zynqmp-sck-kv-g-revA.dts > +++ b/arch/arm/dts/zynqmp-sck-kv-g-revA.dts > @@ -285,19 +285,22 @@ > pinctrl_usb0_default: usb0-default { > conf { > groups = "usb0_0_grp"; > - slew-rate = <SLEW_RATE_SLOW>; > power-source = <IO_STANDARD_LVCMOS18>; > }; > > conf-rx { > pins = "MIO52", "MIO53", "MIO55"; > bias-high-impedance; > + drive-strength = <12>; > + slew-rate = <SLEW_RATE_FAST>; > }; > > conf-tx { > pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59", > "MIO60", "MIO61", "MIO62", "MIO63"; > bias-disable; > + drive-strength = <4>; > + slew-rate = <SLEW_RATE_SLOW>; > }; > > mux { > diff --git a/arch/arm/dts/zynqmp-sck-kv-g-revB.dts b/arch/arm/dts/zynqmp-sck-kv-g-revB.dts > index b81c2e6b7543..a1d8f9f0e51f 100644 > --- a/arch/arm/dts/zynqmp-sck-kv-g-revB.dts > +++ b/arch/arm/dts/zynqmp-sck-kv-g-revB.dts > @@ -272,19 +272,22 @@ > pinctrl_usb0_default: usb0-default { > conf { > groups = "usb0_0_grp"; > - slew-rate = <SLEW_RATE_SLOW>; > power-source = <IO_STANDARD_LVCMOS18>; > }; > > conf-rx { > pins = "MIO52", "MIO53", "MIO55"; > bias-high-impedance; > + drive-strength = <12>; > + slew-rate = <SLEW_RATE_FAST>; > }; > > conf-tx { > pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59", > "MIO60", "MIO61", "MIO62", "MIO63"; > bias-disable; > + drive-strength = <4>; > + slew-rate = <SLEW_RATE_SLOW>; > }; > > mux { > diff --git a/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts b/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts > index d20f6675687b..7ea2a1c96f4e 100644 > --- a/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts > +++ b/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts > @@ -187,19 +187,22 @@ > > conf { > groups = "usb0_0_grp"; > - slew-rate = <SLEW_RATE_SLOW>; > power-source = <IO_STANDARD_LVCMOS18>; > }; > > conf-rx { > pins = "MIO52", "MIO53", "MIO55"; > bias-high-impedance; > + drive-strength = <12>; > + slew-rate = <SLEW_RATE_FAST>; > }; > > conf-tx { > pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59", > "MIO60", "MIO61", "MIO62", "MIO63"; > bias-disable; > + drive-strength = <4>; > + slew-rate = <SLEW_RATE_SLOW>; > }; > }; > > diff --git a/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts b/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts > index f32f87acacb6..4e6160bcd8b9 100644 > --- a/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts > +++ b/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts > @@ -335,19 +335,22 @@ > > conf { > groups = "usb1_0_grp"; > - slew-rate = <SLEW_RATE_SLOW>; > power-source = <IO_STANDARD_LVCMOS18>; > }; > > conf-rx { > pins = "MIO64", "MIO65", "MIO67"; > bias-high-impedance; > + drive-strength = <12>; > + slew-rate = <SLEW_RATE_FAST>; > }; > > conf-tx { > pins = "MIO66", "MIO68", "MIO69", "MIO70", "MIO71", > "MIO72", "MIO73", "MIO74", "MIO75"; > bias-disable; > + drive-strength = <4>; > + slew-rate = <SLEW_RATE_SLOW>; > }; > }; > > diff --git a/arch/arm/dts/zynqmp-zcu100-revC.dts b/arch/arm/dts/zynqmp-zcu100-revC.dts > index ea630a43dc7f..5e7bc7384fce 100644 > --- a/arch/arm/dts/zynqmp-zcu100-revC.dts > +++ b/arch/arm/dts/zynqmp-zcu100-revC.dts > @@ -441,19 +441,22 @@ > > conf { > groups = "usb0_0_grp"; > - slew-rate = <SLEW_RATE_SLOW>; > power-source = <IO_STANDARD_LVCMOS18>; > }; > > conf-rx { > pins = "MIO52", "MIO53", "MIO55"; > bias-high-impedance; > + drive-strength = <12>; > + slew-rate = <SLEW_RATE_FAST>; > }; > > conf-tx { > pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59", > "MIO60", "MIO61", "MIO62", "MIO63"; > bias-disable; > + drive-strength = <4>; > + slew-rate = <SLEW_RATE_SLOW>; > }; > }; > > @@ -465,19 +468,22 @@ > > conf { > groups = "usb1_0_grp"; > - slew-rate = <SLEW_RATE_SLOW>; > power-source = <IO_STANDARD_LVCMOS18>; > }; > > conf-rx { > pins = "MIO64", "MIO65", "MIO67"; > bias-high-impedance; > + drive-strength = <12>; > + slew-rate = <SLEW_RATE_FAST>; > }; > > conf-tx { > pins = "MIO66", "MIO68", "MIO69", "MIO70", "MIO71", > "MIO72", "MIO73", "MIO74", "MIO75"; > bias-disable; > + drive-strength = <4>; > + slew-rate = <SLEW_RATE_SLOW>; > }; > }; > }; > diff --git a/arch/arm/dts/zynqmp-zcu102-revA.dts b/arch/arm/dts/zynqmp-zcu102-revA.dts > index c13b52a6aeaa..a4e92c8bb16b 100644 > --- a/arch/arm/dts/zynqmp-zcu102-revA.dts > +++ b/arch/arm/dts/zynqmp-zcu102-revA.dts > @@ -795,19 +795,22 @@ > > conf { > groups = "usb0_0_grp"; > - slew-rate = <SLEW_RATE_SLOW>; > power-source = <IO_STANDARD_LVCMOS18>; > }; > > conf-rx { > pins = "MIO52", "MIO53", "MIO55"; > bias-high-impedance; > + drive-strength = <12>; > + slew-rate = <SLEW_RATE_FAST>; > }; > > conf-tx { > pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59", > "MIO60", "MIO61", "MIO62", "MIO63"; > bias-disable; > + drive-strength = <4>; > + slew-rate = <SLEW_RATE_SLOW>; > }; > }; > > diff --git a/arch/arm/dts/zynqmp-zcu104-revA.dts b/arch/arm/dts/zynqmp-zcu104-revA.dts > index 50bf47908913..1418cffb2042 100644 > --- a/arch/arm/dts/zynqmp-zcu104-revA.dts > +++ b/arch/arm/dts/zynqmp-zcu104-revA.dts > @@ -402,20 +402,22 @@ > > conf { > groups = "usb0_0_grp"; > - slew-rate = <SLEW_RATE_SLOW>; > power-source = <IO_STANDARD_LVCMOS18>; > - drive-strength = <12>; > }; > > conf-rx { > pins = "MIO52", "MIO53", "MIO55"; > bias-high-impedance; > + drive-strength = <12>; > + slew-rate = <SLEW_RATE_FAST>; > }; > > conf-tx { > pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59", > "MIO60", "MIO61", "MIO62", "MIO63"; > bias-disable; > + drive-strength = <4>; > + slew-rate = <SLEW_RATE_SLOW>; > }; > }; > }; > diff --git a/arch/arm/dts/zynqmp-zcu104-revC.dts b/arch/arm/dts/zynqmp-zcu104-revC.dts > index 752a9e38f3d3..7fd19ca3a8c0 100644 > --- a/arch/arm/dts/zynqmp-zcu104-revC.dts > +++ b/arch/arm/dts/zynqmp-zcu104-revC.dts > @@ -414,20 +414,22 @@ > > conf { > groups = "usb0_0_grp"; > - slew-rate = <SLEW_RATE_SLOW>; > power-source = <IO_STANDARD_LVCMOS18>; > - drive-strength = <12>; > }; > > conf-rx { > pins = "MIO52", "MIO53", "MIO55"; > bias-high-impedance; > + drive-strength = <12>; > + slew-rate = <SLEW_RATE_FAST>; > }; > > conf-tx { > pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59", > "MIO60", "MIO61", "MIO62", "MIO63"; > bias-disable; > + drive-strength = <4>; > + slew-rate = <SLEW_RATE_SLOW>; > }; > }; > }; > diff --git a/arch/arm/dts/zynqmp-zcu106-revA.dts b/arch/arm/dts/zynqmp-zcu106-revA.dts > index 6dfc8fe17bf2..3e137676feb6 100644 > --- a/arch/arm/dts/zynqmp-zcu106-revA.dts > +++ b/arch/arm/dts/zynqmp-zcu106-revA.dts > @@ -793,19 +793,22 @@ > > conf { > groups = "usb0_0_grp"; > - slew-rate = <SLEW_RATE_SLOW>; > power-source = <IO_STANDARD_LVCMOS18>; > }; > > conf-rx { > pins = "MIO52", "MIO53", "MIO55"; > bias-high-impedance; > + drive-strength = <12>; > + slew-rate = <SLEW_RATE_FAST>; > }; > > conf-tx { > pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59", > "MIO60", "MIO61", "MIO62", "MIO63"; > bias-disable; > + drive-strength = <4>; > + slew-rate = <SLEW_RATE_SLOW>; > }; > }; > > diff --git a/arch/arm/dts/zynqmp-zcu111-revA.dts b/arch/arm/dts/zynqmp-zcu111-revA.dts > index 021fe88670fb..e412992ff1bd 100644 > --- a/arch/arm/dts/zynqmp-zcu111-revA.dts > +++ b/arch/arm/dts/zynqmp-zcu111-revA.dts > @@ -652,19 +652,22 @@ > > conf { > groups = "usb0_0_grp"; > - slew-rate = <SLEW_RATE_SLOW>; > power-source = <IO_STANDARD_LVCMOS18>; > }; > > conf-rx { > pins = "MIO52", "MIO53", "MIO55"; > bias-high-impedance; > + drive-strength = <12>; > + slew-rate = <SLEW_RATE_FAST>; > }; > > conf-tx { > pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59", > "MIO60", "MIO61", "MIO62", "MIO63"; > bias-disable; > + drive-strength = <4>; > + slew-rate = <SLEW_RATE_SLOW>; > }; > }; > > -- > 2.36.1 > Applied. M
diff --git a/arch/arm/dts/zynqmp-sck-kr-g-revA.dts b/arch/arm/dts/zynqmp-sck-kr-g-revA.dts index 7be02ab29fa1..735c1e3d1a88 100644 --- a/arch/arm/dts/zynqmp-sck-kr-g-revA.dts +++ b/arch/arm/dts/zynqmp-sck-kr-g-revA.dts @@ -329,19 +329,22 @@ pinctrl_usb0_default: usb0-default { conf { groups = "usb0_0_grp"; - slew-rate = <SLEW_RATE_SLOW>; power-source = <IO_STANDARD_LVCMOS18>; }; conf-rx { pins = "MIO52", "MIO53", "MIO55"; bias-high-impedance; + drive-strength = <12>; + slew-rate = <SLEW_RATE_FAST>; }; conf-tx { pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59", "MIO60", "MIO61", "MIO62", "MIO63"; bias-disable; + drive-strength = <4>; + slew-rate = <SLEW_RATE_SLOW>; }; mux { @@ -353,19 +356,22 @@ pinctrl_usb1_default: usb1-default { conf { groups = "usb1_0_grp"; - slew-rate = <SLEW_RATE_SLOW>; power-source = <IO_STANDARD_LVCMOS18>; }; conf-rx { pins = "MIO64", "MIO65", "MIO67"; bias-high-impedance; + drive-strength = <12>; + slew-rate = <SLEW_RATE_FAST>; }; conf-tx { pins = "MIO66", "MIO68", "MIO69", "MIO70", "MIO71", "MIO72", "MIO73", "MIO74", "MIO75"; bias-disable; + drive-strength = <4>; + slew-rate = <SLEW_RATE_SLOW>; }; mux { diff --git a/arch/arm/dts/zynqmp-sck-kr-g-revB.dts b/arch/arm/dts/zynqmp-sck-kr-g-revB.dts index 56effb5e21a9..63590619d43e 100644 --- a/arch/arm/dts/zynqmp-sck-kr-g-revB.dts +++ b/arch/arm/dts/zynqmp-sck-kr-g-revB.dts @@ -329,19 +329,22 @@ pinctrl_usb0_default: usb0-default { conf { groups = "usb0_0_grp"; - slew-rate = <SLEW_RATE_SLOW>; power-source = <IO_STANDARD_LVCMOS18>; }; conf-rx { pins = "MIO52", "MIO53", "MIO55"; bias-high-impedance; + drive-strength = <12>; + slew-rate = <SLEW_RATE_FAST>; }; conf-tx { pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59", "MIO60", "MIO61", "MIO62", "MIO63"; bias-disable; + drive-strength = <4>; + slew-rate = <SLEW_RATE_SLOW>; }; mux { @@ -353,19 +356,22 @@ pinctrl_usb1_default: usb1-default { conf { groups = "usb1_0_grp"; - slew-rate = <SLEW_RATE_SLOW>; power-source = <IO_STANDARD_LVCMOS18>; }; conf-rx { pins = "MIO64", "MIO65", "MIO67"; bias-high-impedance; + drive-strength = <12>; + slew-rate = <SLEW_RATE_FAST>; }; conf-tx { pins = "MIO66", "MIO68", "MIO69", "MIO70", "MIO71", "MIO72", "MIO73", "MIO74", "MIO75"; bias-disable; + drive-strength = <4>; + slew-rate = <SLEW_RATE_SLOW>; }; mux { diff --git a/arch/arm/dts/zynqmp-sck-kv-g-revA.dts b/arch/arm/dts/zynqmp-sck-kv-g-revA.dts index 8250a493c8a0..b714bd3eb1b1 100644 --- a/arch/arm/dts/zynqmp-sck-kv-g-revA.dts +++ b/arch/arm/dts/zynqmp-sck-kv-g-revA.dts @@ -285,19 +285,22 @@ pinctrl_usb0_default: usb0-default { conf { groups = "usb0_0_grp"; - slew-rate = <SLEW_RATE_SLOW>; power-source = <IO_STANDARD_LVCMOS18>; }; conf-rx { pins = "MIO52", "MIO53", "MIO55"; bias-high-impedance; + drive-strength = <12>; + slew-rate = <SLEW_RATE_FAST>; }; conf-tx { pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59", "MIO60", "MIO61", "MIO62", "MIO63"; bias-disable; + drive-strength = <4>; + slew-rate = <SLEW_RATE_SLOW>; }; mux { diff --git a/arch/arm/dts/zynqmp-sck-kv-g-revB.dts b/arch/arm/dts/zynqmp-sck-kv-g-revB.dts index b81c2e6b7543..a1d8f9f0e51f 100644 --- a/arch/arm/dts/zynqmp-sck-kv-g-revB.dts +++ b/arch/arm/dts/zynqmp-sck-kv-g-revB.dts @@ -272,19 +272,22 @@ pinctrl_usb0_default: usb0-default { conf { groups = "usb0_0_grp"; - slew-rate = <SLEW_RATE_SLOW>; power-source = <IO_STANDARD_LVCMOS18>; }; conf-rx { pins = "MIO52", "MIO53", "MIO55"; bias-high-impedance; + drive-strength = <12>; + slew-rate = <SLEW_RATE_FAST>; }; conf-tx { pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59", "MIO60", "MIO61", "MIO62", "MIO63"; bias-disable; + drive-strength = <4>; + slew-rate = <SLEW_RATE_SLOW>; }; mux { diff --git a/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts b/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts index d20f6675687b..7ea2a1c96f4e 100644 --- a/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts +++ b/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts @@ -187,19 +187,22 @@ conf { groups = "usb0_0_grp"; - slew-rate = <SLEW_RATE_SLOW>; power-source = <IO_STANDARD_LVCMOS18>; }; conf-rx { pins = "MIO52", "MIO53", "MIO55"; bias-high-impedance; + drive-strength = <12>; + slew-rate = <SLEW_RATE_FAST>; }; conf-tx { pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59", "MIO60", "MIO61", "MIO62", "MIO63"; bias-disable; + drive-strength = <4>; + slew-rate = <SLEW_RATE_SLOW>; }; }; diff --git a/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts b/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts index f32f87acacb6..4e6160bcd8b9 100644 --- a/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts +++ b/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts @@ -335,19 +335,22 @@ conf { groups = "usb1_0_grp"; - slew-rate = <SLEW_RATE_SLOW>; power-source = <IO_STANDARD_LVCMOS18>; }; conf-rx { pins = "MIO64", "MIO65", "MIO67"; bias-high-impedance; + drive-strength = <12>; + slew-rate = <SLEW_RATE_FAST>; }; conf-tx { pins = "MIO66", "MIO68", "MIO69", "MIO70", "MIO71", "MIO72", "MIO73", "MIO74", "MIO75"; bias-disable; + drive-strength = <4>; + slew-rate = <SLEW_RATE_SLOW>; }; }; diff --git a/arch/arm/dts/zynqmp-zcu100-revC.dts b/arch/arm/dts/zynqmp-zcu100-revC.dts index ea630a43dc7f..5e7bc7384fce 100644 --- a/arch/arm/dts/zynqmp-zcu100-revC.dts +++ b/arch/arm/dts/zynqmp-zcu100-revC.dts @@ -441,19 +441,22 @@ conf { groups = "usb0_0_grp"; - slew-rate = <SLEW_RATE_SLOW>; power-source = <IO_STANDARD_LVCMOS18>; }; conf-rx { pins = "MIO52", "MIO53", "MIO55"; bias-high-impedance; + drive-strength = <12>; + slew-rate = <SLEW_RATE_FAST>; }; conf-tx { pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59", "MIO60", "MIO61", "MIO62", "MIO63"; bias-disable; + drive-strength = <4>; + slew-rate = <SLEW_RATE_SLOW>; }; }; @@ -465,19 +468,22 @@ conf { groups = "usb1_0_grp"; - slew-rate = <SLEW_RATE_SLOW>; power-source = <IO_STANDARD_LVCMOS18>; }; conf-rx { pins = "MIO64", "MIO65", "MIO67"; bias-high-impedance; + drive-strength = <12>; + slew-rate = <SLEW_RATE_FAST>; }; conf-tx { pins = "MIO66", "MIO68", "MIO69", "MIO70", "MIO71", "MIO72", "MIO73", "MIO74", "MIO75"; bias-disable; + drive-strength = <4>; + slew-rate = <SLEW_RATE_SLOW>; }; }; }; diff --git a/arch/arm/dts/zynqmp-zcu102-revA.dts b/arch/arm/dts/zynqmp-zcu102-revA.dts index c13b52a6aeaa..a4e92c8bb16b 100644 --- a/arch/arm/dts/zynqmp-zcu102-revA.dts +++ b/arch/arm/dts/zynqmp-zcu102-revA.dts @@ -795,19 +795,22 @@ conf { groups = "usb0_0_grp"; - slew-rate = <SLEW_RATE_SLOW>; power-source = <IO_STANDARD_LVCMOS18>; }; conf-rx { pins = "MIO52", "MIO53", "MIO55"; bias-high-impedance; + drive-strength = <12>; + slew-rate = <SLEW_RATE_FAST>; }; conf-tx { pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59", "MIO60", "MIO61", "MIO62", "MIO63"; bias-disable; + drive-strength = <4>; + slew-rate = <SLEW_RATE_SLOW>; }; }; diff --git a/arch/arm/dts/zynqmp-zcu104-revA.dts b/arch/arm/dts/zynqmp-zcu104-revA.dts index 50bf47908913..1418cffb2042 100644 --- a/arch/arm/dts/zynqmp-zcu104-revA.dts +++ b/arch/arm/dts/zynqmp-zcu104-revA.dts @@ -402,20 +402,22 @@ conf { groups = "usb0_0_grp"; - slew-rate = <SLEW_RATE_SLOW>; power-source = <IO_STANDARD_LVCMOS18>; - drive-strength = <12>; }; conf-rx { pins = "MIO52", "MIO53", "MIO55"; bias-high-impedance; + drive-strength = <12>; + slew-rate = <SLEW_RATE_FAST>; }; conf-tx { pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59", "MIO60", "MIO61", "MIO62", "MIO63"; bias-disable; + drive-strength = <4>; + slew-rate = <SLEW_RATE_SLOW>; }; }; }; diff --git a/arch/arm/dts/zynqmp-zcu104-revC.dts b/arch/arm/dts/zynqmp-zcu104-revC.dts index 752a9e38f3d3..7fd19ca3a8c0 100644 --- a/arch/arm/dts/zynqmp-zcu104-revC.dts +++ b/arch/arm/dts/zynqmp-zcu104-revC.dts @@ -414,20 +414,22 @@ conf { groups = "usb0_0_grp"; - slew-rate = <SLEW_RATE_SLOW>; power-source = <IO_STANDARD_LVCMOS18>; - drive-strength = <12>; }; conf-rx { pins = "MIO52", "MIO53", "MIO55"; bias-high-impedance; + drive-strength = <12>; + slew-rate = <SLEW_RATE_FAST>; }; conf-tx { pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59", "MIO60", "MIO61", "MIO62", "MIO63"; bias-disable; + drive-strength = <4>; + slew-rate = <SLEW_RATE_SLOW>; }; }; }; diff --git a/arch/arm/dts/zynqmp-zcu106-revA.dts b/arch/arm/dts/zynqmp-zcu106-revA.dts index 6dfc8fe17bf2..3e137676feb6 100644 --- a/arch/arm/dts/zynqmp-zcu106-revA.dts +++ b/arch/arm/dts/zynqmp-zcu106-revA.dts @@ -793,19 +793,22 @@ conf { groups = "usb0_0_grp"; - slew-rate = <SLEW_RATE_SLOW>; power-source = <IO_STANDARD_LVCMOS18>; }; conf-rx { pins = "MIO52", "MIO53", "MIO55"; bias-high-impedance; + drive-strength = <12>; + slew-rate = <SLEW_RATE_FAST>; }; conf-tx { pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59", "MIO60", "MIO61", "MIO62", "MIO63"; bias-disable; + drive-strength = <4>; + slew-rate = <SLEW_RATE_SLOW>; }; }; diff --git a/arch/arm/dts/zynqmp-zcu111-revA.dts b/arch/arm/dts/zynqmp-zcu111-revA.dts index 021fe88670fb..e412992ff1bd 100644 --- a/arch/arm/dts/zynqmp-zcu111-revA.dts +++ b/arch/arm/dts/zynqmp-zcu111-revA.dts @@ -652,19 +652,22 @@ conf { groups = "usb0_0_grp"; - slew-rate = <SLEW_RATE_SLOW>; power-source = <IO_STANDARD_LVCMOS18>; }; conf-rx { pins = "MIO52", "MIO53", "MIO55"; bias-high-impedance; + drive-strength = <12>; + slew-rate = <SLEW_RATE_FAST>; }; conf-tx { pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59", "MIO60", "MIO61", "MIO62", "MIO63"; bias-disable; + drive-strength = <4>; + slew-rate = <SLEW_RATE_SLOW>; }; };