| Message ID | 20220621113732.11595-1-rex-bc.chen@mediatek.com |
|---|---|
| Headers | show |
| Series | drm/mediatek: Add MT8195 dp_intf driver | expand |
Il 21/06/22 13:37, Bo-Chen Chen ha scritto: > From: Guillaume Ranquet <granquet@baylibre.com> > > Dpintf is the displayport interface hardware unit. This unit is similar > to dpi and can reuse most of the code. > > This patch adds support for mt8195-dpintf to this dpi driver. Main > differences are: > - 4 pixels for one round for dp_intf while dpi is 1 pixel for one round. > Therefore, we add a new config "round_pixels" to control setting of Okay, I like where this is going, but "round_pixels" explains itself like "the pixels are round" (which doesn't make sense). So... is this "4 pixels per iteration" (computation of 4 pixels per iteration), or "outputs 4 pixels at a time"? I can give you some ideas about a better name for this struct member, I think... ...something like "output_4pixel"? Alternatively, we can do something even cleaner here: u8 pixels_per_round; ...where we define it like... static const struct mtk_dpi_conf mt8195_dpintf_conf = { .pixels_per_round = 4, .......... } static const struct mtk_dpi_conf mt8192_conf = { .pixels_per_round = 1, ......... } ... and then, in function mtk_dpi_set_display_mode(), we would have something like /* * Depending on the IP version, we may output a different amount * of pixels for each (choose: round/iteration): divide the clock * by this number and adjust the display porches accordingly. */ vm.pixelclock = pll_rate / factor; vm.pixelclock /= dpi->conf->pixels_per_round; ...... hsync.sync_width = vm.hsync_len / dpi->conf->pixels_per_round; hsync.back_porch = vm.hback_porch / dpi->conf->pixels_per_round; hsync.front_porch = vm.hfront_porch / dpi->conf->pixels_per_round; This would also eliminate any need to check if the IP has 4 pixels per round or if it has just 1, as in the latter case, we'd be dividing by 1 (hence, we would not be dividing anything). Do you like this solution? :-) Cheers, Angelo > pixel clock and timing parameter for dp_intf. > - Input of dp_intf is two pixels per round, so we add a new config > "input_2pixel" to control this. > - Some register contents differ slightly between the two components. To > work around this I added register bits/masks with a DPINTF_ prefix > and use them where different. > > Based on a separate driver for dpintf created by > Jitao shi <jitao.shi@mediatek.com>. > > Signed-off-by: Markus Schneider-Pargmann <msp@baylibre.com> > Signed-off-by: Guillaume Ranquet <granquet@baylibre.com> > [Bo-Chen: Modify reviewers' comments.] > Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> > --- > drivers/gpu/drm/mediatek/mtk_dpi.c | 62 +++++++++++++++++++++ > drivers/gpu/drm/mediatek/mtk_dpi_regs.h | 12 ++++ > drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 4 ++ > drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 1 + > drivers/gpu/drm/mediatek/mtk_drm_drv.c | 3 + > 5 files changed, 82 insertions(+) > > diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediatek/mtk_dpi.c > index ef7f828a4b1e..e562f0d55cc2 100644 > --- a/drivers/gpu/drm/mediatek/mtk_dpi.c > +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c > @@ -131,6 +131,11 @@ struct mtk_dpi_yc_limit { > * @color_fmt_trans_support: Enable color format transfer. > * @support_direct_pin: Dpi can directly connect pins, and enable this config > * to do this. > + * @round_pixels: Dp_intf is 4 pixels for one round while dpi is one pixel for > + * one round, so we need to enable this config for dp_intf to do > + * corresponding settings. > + * @input_2pixel: Input pixel of dp_intf is 2 pixel per round, so enable this > + * config to enable this feature. > * @dimension_mask: Mask used for HWIDTH, HPORCH, VSYNC_WIDTH and VSYNC_PORCH > * (no shift). > * @hvsize_mask: Mask of HSIZE and VSIZE mask (no shift). > @@ -149,6 +154,8 @@ struct mtk_dpi_conf { > bool swap_input_support; > bool color_fmt_trans_support; > bool support_direct_pin; > + bool round_pixels; > + bool input_2pixel; > u32 dimension_mask; > u32 hvsize_mask; > u32 channel_swap_shift; > @@ -560,6 +567,14 @@ static int mtk_dpi_set_display_mode(struct mtk_dpi *dpi, > pll_rate = clk_get_rate(dpi->tvd_clk); > > vm.pixelclock = pll_rate / factor; > + > + /* > + * For dp_intf, we need to divide clock by 4 because it's > + * 4 pixels for one round while dpi is 1 pixel for one round. > + */ > + if (dpi->conf->round_pixels) > + vm.pixelclock /= 4; > + > if ((dpi->output_fmt == MEDIA_BUS_FMT_RGB888_2X12_LE) || > (dpi->output_fmt == MEDIA_BUS_FMT_RGB888_2X12_BE)) > clk_set_rate(dpi->pixel_clk, vm.pixelclock * 2); > @@ -581,6 +596,17 @@ static int mtk_dpi_set_display_mode(struct mtk_dpi *dpi, > hsync.sync_width = vm.hsync_len; > hsync.back_porch = vm.hback_porch; > hsync.front_porch = vm.hfront_porch; > + > + /* > + * For dp_intf, we need to divide everything by 4 because it's > + * 4 pixels for one round while dpi is 1 pixel for one round. > + */ > + if (dpi->conf->round_pixels) { > + hsync.sync_width = vm.hsync_len / 4; > + hsync.back_porch = vm.hback_porch / 4; > + hsync.front_porch = vm.hfront_porch / 4; > + } > + > hsync.shift_half_line = false; > vsync_lodd.sync_width = vm.vsync_len; > vsync_lodd.back_porch = vm.vback_porch; > @@ -629,6 +655,10 @@ static int mtk_dpi_set_display_mode(struct mtk_dpi *dpi, > mtk_dpi_dual_edge(dpi); > mtk_dpi_config_disable_edge(dpi); > } > + if (dpi->conf->input_2pixel) { > + mtk_dpi_mask(dpi, DPI_CON, DPINTF_INPUT_2P_EN, > + DPINTF_INPUT_2P_EN); > + } > mtk_dpi_sw_reset(dpi, false); > > return 0; > @@ -869,6 +899,16 @@ static unsigned int mt8183_calculate_factor(int clock) > return 2; > } > > +static unsigned int mt8195_dpintf_calculate_factor(int clock) > +{ > + if (clock < 70000) > + return 4; > + else if (clock < 200000) > + return 2; > + else > + return 1; > +} > + > static const u32 mt8173_output_fmts[] = { > MEDIA_BUS_FMT_RGB888_1X24, > }; > @@ -878,6 +918,11 @@ static const u32 mt8183_output_fmts[] = { > MEDIA_BUS_FMT_RGB888_2X12_BE, > }; > > +static const u32 mt8195_output_fmts[] = { > + MEDIA_BUS_FMT_RGB888_1X24, > + MEDIA_BUS_FMT_YUYV8_1X16, > +}; > + > static const struct mtk_dpi_conf mt8173_conf = { > .cal_factor = mt8173_calculate_factor, > .reg_h_fre_con = 0xe0, > @@ -943,6 +988,20 @@ static const struct mtk_dpi_conf mt8192_conf = { > .csc_enable_bit = CSC_ENABLE, > }; > > +static const struct mtk_dpi_conf mt8195_dpintf_conf = { > + .cal_factor = mt8195_dpintf_calculate_factor, > + .max_clock_khz = 600000, > + .output_fmts = mt8195_output_fmts, > + .num_output_fmts = ARRAY_SIZE(mt8195_output_fmts), > + .round_pixels = true, > + .input_2pixel = true, > + .dimension_mask = DPINTF_HPW_MASK, > + .hvsize_mask = DPINTF_HSIZE_MASK, > + .channel_swap_shift = DPINTF_CH_SWAP, > + .yuv422_en_bit = DPINTF_YUV422_EN, > + .csc_enable_bit = DPINTF_CSC_ENABLE, > +}; > + > static int mtk_dpi_probe(struct platform_device *pdev) > { > struct device *dev = &pdev->dev; > @@ -1065,6 +1124,9 @@ static const struct of_device_id mtk_dpi_of_ids[] = { > { .compatible = "mediatek,mt8192-dpi", > .data = &mt8192_conf, > }, > + { .compatible = "mediatek,mt8195-dp-intf", > + .data = &mt8195_dpintf_conf, > + }, > { }, > }; > MODULE_DEVICE_TABLE(of, mtk_dpi_of_ids);
Il 21/06/22 13:37, Bo-Chen Chen ha scritto: > MediaTek dpi supports direct connection to pins while dp_intf does not > support. Therefore, add a config "support_direct_pin" to control this. > > Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> > --- > drivers/gpu/drm/mediatek/mtk_dpi.c | 17 +++++++++++++---- > 1 file changed, 13 insertions(+), 4 deletions(-) > > diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediatek/mtk_dpi.c > index 438bf3bc5e4a..ef7f828a4b1e 100644 > --- a/drivers/gpu/drm/mediatek/mtk_dpi.c > +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c > @@ -129,6 +129,8 @@ struct mtk_dpi_yc_limit { > * @is_ck_de_pol: Support CK/DE polarity. > * @swap_input_support: Support input swap function. > * @color_fmt_trans_support: Enable color format transfer. > + * @support_direct_pin: Dpi can directly connect pins, and enable this config > + * to do this. @support_direct_pin: IP supports direct connection to pins or @support_direct_pin: IP has direct connection to DP pins or @support_direct_pin: IP connects directly to DP pins pick one, after which: Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Il 21/06/22 13:37, Bo-Chen Chen ha scritto: > Dp_intf supports YUV422 as output format. In MT8195 Chrome project, > YUV422 output format is used for 4K resolution. > > To support this, it is also needed to support color format transfer. > Color format transfer is a new feature for both dpi and dpintf of MT8195. > > The input format could be RGB888 and output format for dp_intf should be > YUV422. Therefore, we add a mtk_dpi_matrix_sel() helper to update the > DPI_MATRIX_SET register depending on the color format. > > Signed-off-by: Guillaume Ranquet <granquet@baylibre.com> > Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> > --- > drivers/gpu/drm/mediatek/mtk_dpi.c | 34 ++++++++++++++++++++++++- > drivers/gpu/drm/mediatek/mtk_dpi_regs.h | 3 +++ > 2 files changed, 36 insertions(+), 1 deletion(-) > ..snip.. > diff --git a/drivers/gpu/drm/mediatek/mtk_dpi_regs.h b/drivers/gpu/drm/mediatek/mtk_dpi_regs.h > index 3a02fabe1662..65fce11316b7 100644 > --- a/drivers/gpu/drm/mediatek/mtk_dpi_regs.h > +++ b/drivers/gpu/drm/mediatek/mtk_dpi_regs.h > @@ -217,4 +217,7 @@ > > #define EDGE_SEL_EN BIT(5) > #define H_FRE_2N BIT(25) > + > +#define DPI_MATRIX_SET 0xB4 > +#define INT_MATRIX_SEL_MASK (0x1F << 0) Please, change INT_MATRIX_SEL_MASK: that's GENMASK(4, 0). After that, Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> > #endif /* __MTK_DPI_REGS_H */
Il 21/06/22 13:37, Bo-Chen Chen ha scritto: > For RGB colorimetry, CTA-861 support both limited and full range data > when receiving video with RGB color space. > We use drm_default_rgb_quant_range() to determine the correct setting. > > Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> > Reviewed-by: CK Hu <ck.hu@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Il 21/06/22 13:37, Bo-Chen Chen ha scritto: > This driver will support dp_intf and there are many configs between dpi > and dp_intf. Therefore, we will add many configs in "struct mtk_dpi_conf". > To let this structure more readable, we add this kernel doc. > > Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
On Tue, 2022-06-21 at 14:11 +0200, AngeloGioacchino Del Regno wrote: > Il 21/06/22 13:37, Bo-Chen Chen ha scritto: > > MediaTek dpi supports direct connection to pins while dp_intf does > > not > > support. Therefore, add a config "support_direct_pin" to control > > this. > > > > Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> > > --- > > drivers/gpu/drm/mediatek/mtk_dpi.c | 17 +++++++++++++---- > > 1 file changed, 13 insertions(+), 4 deletions(-) > > > > diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c > > b/drivers/gpu/drm/mediatek/mtk_dpi.c > > index 438bf3bc5e4a..ef7f828a4b1e 100644 > > --- a/drivers/gpu/drm/mediatek/mtk_dpi.c > > +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c > > @@ -129,6 +129,8 @@ struct mtk_dpi_yc_limit { > > * @is_ck_de_pol: Support CK/DE polarity. > > * @swap_input_support: Support input swap function. > > * @color_fmt_trans_support: Enable color format transfer. > > + * @support_direct_pin: Dpi can directly connect pins, and enable > > this config > > + * to do this. > > @support_direct_pin: IP supports direct connection to pins > > or > > @support_direct_pin: IP has direct connection to DP pins > > or > > @support_direct_pin: IP connects directly to DP pins > > pick one, after which: > > Reviewed-by: AngeloGioacchino Del Regno < > angelogioacchino.delregno@collabora.com> > > Hello Angelo, this is not connect to "DP" pin. This setting is for dpi to connect to panel directly and there is no such usecase for dp_intf. Therefore, I will use "@support_direct_pin: IP supports direct connection to pins". Thanks BRs, Bo-Chen
On Tue, 2022-06-21 at 14:11 +0200, AngeloGioacchino Del Regno wrote: > Il 21/06/22 13:37, Bo-Chen Chen ha scritto: > > From: Guillaume Ranquet <granquet@baylibre.com> > > > > Dpintf is the displayport interface hardware unit. This unit is > > similar > > to dpi and can reuse most of the code. > > > > This patch adds support for mt8195-dpintf to this dpi driver. Main > > differences are: > > - 4 pixels for one round for dp_intf while dpi is 1 pixel for one > > round. > > Therefore, we add a new config "round_pixels" to control > > setting of > > Okay, I like where this is going, but "round_pixels" explains itself > like > "the pixels are round" (which doesn't make sense). > > So... is this "4 pixels per iteration" (computation of 4 pixels per > iteration), > or "outputs 4 pixels at a time"? > I can give you some ideas about a better name for this struct member, > I think... > ...something like "output_4pixel"? > > Alternatively, we can do something even cleaner here: > u8 pixels_per_round; > > ...where we define it like... > > static const struct mtk_dpi_conf mt8195_dpintf_conf = { > .pixels_per_round = 4, > .......... > } > > static const struct mtk_dpi_conf mt8192_conf = { > .pixels_per_round = 1, > ......... > } > > ... and then, in function mtk_dpi_set_display_mode(), we would have > something like > > /* > > * Depending on the IP version, we may output a different > amount > > * of pixels for each (choose: round/iteration): divide the > clock > > * by this number and adjust the display porches accordingly. > > */ > > vm.pixelclock = pll_rate / factor; > > vm.pixelclock /= dpi->conf->pixels_per_round; > > > > ...... > > > > hsync.sync_width = vm.hsync_len / dpi->conf->pixels_per_round; > > hsync.back_porch = vm.hback_porch / dpi->conf- > >pixels_per_round; > > hsync.front_porch = vm.hfront_porch / dpi->conf- > >pixels_per_round; > > This would also eliminate any need to check if the IP has 4 pixels > per round > or if it has just 1, as in the latter case, we'd be dividing by 1 > (hence, we > would not be dividing anything). > > Do you like this solution? :-) > > Cheers, > Angelo > Hello Angelo, Thanks for the advise! After syncing with CK, I will use mothod of "pixels_per_round". This soultion is pretty good and more clear for this config. Thanks again! BRs, Bo-Chen > > pixel clock and timing parameter for dp_intf. > > - Input of dp_intf is two pixels per round, so we add a new > > config > > "input_2pixel" to control this. > > - Some register contents differ slightly between the two > > components. To > > work around this I added register bits/masks with a DPINTF_ > > prefix > > and use them where different. > > > > Based on a separate driver for dpintf created by > > Jitao shi <jitao.shi@mediatek.com>. > > > > Signed-off-by: Markus Schneider-Pargmann <msp@baylibre.com> > > Signed-off-by: Guillaume Ranquet <granquet@baylibre.com> > > [Bo-Chen: Modify reviewers' comments.] > > Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> > > --- > > drivers/gpu/drm/mediatek/mtk_dpi.c | 62 > > +++++++++++++++++++++ > > drivers/gpu/drm/mediatek/mtk_dpi_regs.h | 12 ++++ > > drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 4 ++ > > drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 1 + > > drivers/gpu/drm/mediatek/mtk_drm_drv.c | 3 + > > 5 files changed, 82 insertions(+) > > > > diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c > > b/drivers/gpu/drm/mediatek/mtk_dpi.c > > index ef7f828a4b1e..e562f0d55cc2 100644 > > --- a/drivers/gpu/drm/mediatek/mtk_dpi.c > > +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c > > @@ -131,6 +131,11 @@ struct mtk_dpi_yc_limit { > > * @color_fmt_trans_support: Enable color format transfer. > > * @support_direct_pin: Dpi can directly connect pins, and enable > > this config > > * to do this. > > + * @round_pixels: Dp_intf is 4 pixels for one round while dpi is > > one pixel for > > + * one round, so we need to enable this config for > > dp_intf to do > > + * corresponding settings. > > + * @input_2pixel: Input pixel of dp_intf is 2 pixel per round, so > > enable this > > + * config to enable this feature. > > * @dimension_mask: Mask used for HWIDTH, HPORCH, VSYNC_WIDTH and > > VSYNC_PORCH > > * (no shift). > > * @hvsize_mask: Mask of HSIZE and VSIZE mask (no shift). > > @@ -149,6 +154,8 @@ struct mtk_dpi_conf { > > bool swap_input_support; > > bool color_fmt_trans_support; > > bool support_direct_pin; > > + bool round_pixels; > > + bool input_2pixel; > > u32 dimension_mask; > > u32 hvsize_mask; > > u32 channel_swap_shift; > > @@ -560,6 +567,14 @@ static int mtk_dpi_set_display_mode(struct > > mtk_dpi *dpi, > > pll_rate = clk_get_rate(dpi->tvd_clk); > > > > vm.pixelclock = pll_rate / factor; > > + > > + /* > > + * For dp_intf, we need to divide clock by 4 because it's > > + * 4 pixels for one round while dpi is 1 pixel for one round. > > + */ > > + if (dpi->conf->round_pixels) > > + vm.pixelclock /= 4; > > + > > if ((dpi->output_fmt == MEDIA_BUS_FMT_RGB888_2X12_LE) || > > (dpi->output_fmt == MEDIA_BUS_FMT_RGB888_2X12_BE)) > > clk_set_rate(dpi->pixel_clk, vm.pixelclock * 2); > > @@ -581,6 +596,17 @@ static int mtk_dpi_set_display_mode(struct > > mtk_dpi *dpi, > > hsync.sync_width = vm.hsync_len; > > hsync.back_porch = vm.hback_porch; > > hsync.front_porch = vm.hfront_porch; > > + > > + /* > > + * For dp_intf, we need to divide everything by 4 because it's > > + * 4 pixels for one round while dpi is 1 pixel for one round. > > + */ > > + if (dpi->conf->round_pixels) { > > + hsync.sync_width = vm.hsync_len / 4; > > + hsync.back_porch = vm.hback_porch / 4; > > + hsync.front_porch = vm.hfront_porch / 4; > > + } > > + > > hsync.shift_half_line = false; > > vsync_lodd.sync_width = vm.vsync_len; > > vsync_lodd.back_porch = vm.vback_porch; > > @@ -629,6 +655,10 @@ static int mtk_dpi_set_display_mode(struct > > mtk_dpi *dpi, > > mtk_dpi_dual_edge(dpi); > > mtk_dpi_config_disable_edge(dpi); > > } > > + if (dpi->conf->input_2pixel) { > > + mtk_dpi_mask(dpi, DPI_CON, DPINTF_INPUT_2P_EN, > > + DPINTF_INPUT_2P_EN); > > + } > > mtk_dpi_sw_reset(dpi, false); > > > > return 0; > > @@ -869,6 +899,16 @@ static unsigned int > > mt8183_calculate_factor(int clock) > > return 2; > > } > > > > +static unsigned int mt8195_dpintf_calculate_factor(int clock) > > +{ > > + if (clock < 70000) > > + return 4; > > + else if (clock < 200000) > > + return 2; > > + else > > + return 1; > > +} > > + > > static const u32 mt8173_output_fmts[] = { > > MEDIA_BUS_FMT_RGB888_1X24, > > }; > > @@ -878,6 +918,11 @@ static const u32 mt8183_output_fmts[] = { > > MEDIA_BUS_FMT_RGB888_2X12_BE, > > }; > > > > +static const u32 mt8195_output_fmts[] = { > > + MEDIA_BUS_FMT_RGB888_1X24, > > + MEDIA_BUS_FMT_YUYV8_1X16, > > +}; > > + > > static const struct mtk_dpi_conf mt8173_conf = { > > .cal_factor = mt8173_calculate_factor, > > .reg_h_fre_con = 0xe0, > > @@ -943,6 +988,20 @@ static const struct mtk_dpi_conf mt8192_conf = > > { > > .csc_enable_bit = CSC_ENABLE, > > }; > > > > +static const struct mtk_dpi_conf mt8195_dpintf_conf = { > > + .cal_factor = mt8195_dpintf_calculate_factor, > > + .max_clock_khz = 600000, > > + .output_fmts = mt8195_output_fmts, > > + .num_output_fmts = ARRAY_SIZE(mt8195_output_fmts), > > + .round_pixels = true, > > + .input_2pixel = true, > > + .dimension_mask = DPINTF_HPW_MASK, > > + .hvsize_mask = DPINTF_HSIZE_MASK, > > + .channel_swap_shift = DPINTF_CH_SWAP, > > + .yuv422_en_bit = DPINTF_YUV422_EN, > > + .csc_enable_bit = DPINTF_CSC_ENABLE, > > +}; > > + > > static int mtk_dpi_probe(struct platform_device *pdev) > > { > > struct device *dev = &pdev->dev; > > @@ -1065,6 +1124,9 @@ static const struct of_device_id > > mtk_dpi_of_ids[] = { > > { .compatible = "mediatek,mt8192-dpi", > > .data = &mt8192_conf, > > }, > > + { .compatible = "mediatek,mt8195-dp-intf", > > + .data = &mt8195_dpintf_conf, > > + }, > > { }, > > }; > > MODULE_DEVICE_TABLE(of, mtk_dpi_of_ids);
On Wed, 2022-06-22 at 17:08 +0800, Rex-BC Chen wrote: > On Tue, 2022-06-21 at 14:11 +0200, AngeloGioacchino Del Regno wrote: > > Il 21/06/22 13:37, Bo-Chen Chen ha scritto: > > > MediaTek dpi supports direct connection to pins while dp_intf > > > does > > > not > > > support. Therefore, add a config "support_direct_pin" to control > > > this. > > > > > > Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> > > > --- > > > drivers/gpu/drm/mediatek/mtk_dpi.c | 17 +++++++++++++---- > > > 1 file changed, 13 insertions(+), 4 deletions(-) > > > > > > diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c > > > b/drivers/gpu/drm/mediatek/mtk_dpi.c > > > index 438bf3bc5e4a..ef7f828a4b1e 100644 > > > --- a/drivers/gpu/drm/mediatek/mtk_dpi.c > > > +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c > > > @@ -129,6 +129,8 @@ struct mtk_dpi_yc_limit { > > > * @is_ck_de_pol: Support CK/DE polarity. > > > * @swap_input_support: Support input swap function. > > > * @color_fmt_trans_support: Enable color format transfer. > > > + * @support_direct_pin: Dpi can directly connect pins, and > > > enable > > > this config > > > + * to do this. > > > > @support_direct_pin: IP supports direct connection to pins > > > > or > > > > @support_direct_pin: IP has direct connection to DP pins > > > > or > > > > @support_direct_pin: IP connects directly to DP pins > > > > pick one, after which: > > > > Reviewed-by: AngeloGioacchino Del Regno < > > angelogioacchino.delregno@collabora.com> > > > > > > Hello Angelo, > > this is not connect to "DP" pin. This setting is for dpi to connect > to > panel directly and there is no such usecase for dp_intf. > > Therefore, I will use "@support_direct_pin: IP supports direct > connection to pins". > > Thanks > > BRs, > Bo-Chen > Hello Angelo, I think "@support_direct_pin: IP supports direct connection to dpi panels" is more precise for this config. I will use this description. BRs, Bo-Chen
The dpi/dpintf driver and the added helper functions are required for the DisplayPort driver to work. This series is separated from [1] which is original from Guillaume. The display port driver is [2]. Changes for v13: 1. Change mediatek,mt8195-dp_intf to mediatek,mt8195-dp-intf. 2. Add kernel doc for mtk_dpi_conf. 3. Drop patch of tvd_pll enable. 4. Squash some color format transfer related patches. 5. Add new patch to support setting of direct connection to pins. 6. Change fix tag of "drm/mediatek: dpi: Only enable dpi after the bridge is enabled". Changes for v12: 1. Remove pll_gate. 2. Add more detailed commit message. 3. Separate tvd_clk patch and yuv422 output support from add dpintf support patch 4. Remove limit patch and use common driver codes to determine this. Changes for v11: 1. Rename ck_cg to pll_gate. 2. Add some commit message to clarify the modification reason. 3. Fix some driver order and modify for reviewers' comments. [1]:https://lore.kernel.org/all/20220523104758.29531-1-granquet@baylibre.com/ [2]:https://lore.kernel.org/all/20220610105522.13449-1-rex-bc.chen@mediatek.com/ Bo-Chen Chen (4): drm/mediatek: dpi: Add kernel document for struct mtk_dpi_conf drm/mediatek: dpi: Add support for quantization range drm/mediatek: dpi: Add YUV422 output support drm/mediatek: dpi: add config to control setting of direct connection to pins Guillaume Ranquet (9): drm/mediatek: dpi: implement a CK/DE pol toggle in SoC config drm/mediatek: dpi: implement a swap_input toggle in SoC config drm/mediatek: dpi: move dimension mask to SoC config drm/mediatek: dpi: move hvsize_mask to SoC config drm/mediatek: dpi: move swap_shift to SoC config drm/mediatek: dpi: move the yuv422_en_bit to SoC config drm/mediatek: dpi: move the csc_enable bit to SoC config drm/mediatek: dpi: Add dp_intf support drm/mediatek: dpi: Only enable dpi after the bridge is enabled Markus Schneider-Pargmann (1): dt-bindings: mediatek,dpi: Add DP_INTF compatible .../display/mediatek/mediatek,dpi.yaml | 11 +- drivers/gpu/drm/mediatek/mtk_dpi.c | 266 +++++++++++++++--- drivers/gpu/drm/mediatek/mtk_dpi_regs.h | 15 + drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 4 + drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 1 + drivers/gpu/drm/mediatek/mtk_drm_drv.c | 3 + 6 files changed, 253 insertions(+), 47 deletions(-)