| Message ID | 20220620121028.29234-1-rex-bc.chen@mediatek.com |
|---|---|
| Headers | show |
| Series | drm/mediatek: Add MT8195 dp_intf driver | expand |
Hi, Bo-Chen: On Mon, 2022-06-20 at 20:10 +0800, Bo-Chen Chen wrote: > For RGB colorimetry, CTA-861 support both limited and full range data > when receiving video with RGB color space. > We use drm_default_rgb_quant_range() to determine the correct > setting. Reviewed-by: CK Hu <ck.hu@mediatek.com> > > Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> > --- > drivers/gpu/drm/mediatek/mtk_dpi.c | 34 ++++++++++++++++++-------- > ---- > 1 file changed, 21 insertions(+), 13 deletions(-) > > diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c > b/drivers/gpu/drm/mediatek/mtk_dpi.c > index e61cd67b978f..21ad5623b568 100644 > --- a/drivers/gpu/drm/mediatek/mtk_dpi.c > +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c > @@ -235,16 +235,30 @@ static void mtk_dpi_config_fb_size(struct > mtk_dpi *dpi, u32 width, u32 height) > mtk_dpi_mask(dpi, DPI_SIZE, height << VSIZE, VSIZE_MASK); > } > > -static void mtk_dpi_config_channel_limit(struct mtk_dpi *dpi, > - struct mtk_dpi_yc_limit > *limit) > +static void mtk_dpi_config_channel_limit(struct mtk_dpi *dpi) > { > - mtk_dpi_mask(dpi, DPI_Y_LIMIT, limit->y_bottom << Y_LIMINT_BOT, > + struct mtk_dpi_yc_limit limit; > + > + if (drm_default_rgb_quant_range(&dpi->mode) == > + HDMI_QUANTIZATION_RANGE_LIMITED) { > + limit.y_bottom = 0x10; > + limit.y_top = 0xfe0; > + limit.c_bottom = 0x10; > + limit.c_top = 0xfe0; > + } else { > + limit.y_bottom = 0; > + limit.y_top = 0xfff; > + limit.c_bottom = 0; > + limit.c_top = 0xfff; > + } > + > + mtk_dpi_mask(dpi, DPI_Y_LIMIT, limit.y_bottom << Y_LIMINT_BOT, > Y_LIMINT_BOT_MASK); > - mtk_dpi_mask(dpi, DPI_Y_LIMIT, limit->y_top << Y_LIMINT_TOP, > + mtk_dpi_mask(dpi, DPI_Y_LIMIT, limit.y_top << Y_LIMINT_TOP, > Y_LIMINT_TOP_MASK); > - mtk_dpi_mask(dpi, DPI_C_LIMIT, limit->c_bottom << C_LIMIT_BOT, > + mtk_dpi_mask(dpi, DPI_C_LIMIT, limit.c_bottom << C_LIMIT_BOT, > C_LIMIT_BOT_MASK); > - mtk_dpi_mask(dpi, DPI_C_LIMIT, limit->c_top << C_LIMIT_TOP, > + mtk_dpi_mask(dpi, DPI_C_LIMIT, limit.c_top << C_LIMIT_TOP, > C_LIMIT_TOP_MASK); > } > > @@ -449,7 +463,6 @@ static int mtk_dpi_power_on(struct mtk_dpi *dpi) > static int mtk_dpi_set_display_mode(struct mtk_dpi *dpi, > struct drm_display_mode *mode) > { > - struct mtk_dpi_yc_limit limit; > struct mtk_dpi_polarities dpi_pol; > struct mtk_dpi_sync_param hsync; > struct mtk_dpi_sync_param vsync_lodd = { 0 }; > @@ -484,11 +497,6 @@ static int mtk_dpi_set_display_mode(struct > mtk_dpi *dpi, > dev_dbg(dpi->dev, "Got PLL %lu Hz, pixel clock %lu Hz\n", > pll_rate, vm.pixelclock); > > - limit.c_bottom = 0x0010; > - limit.c_top = 0x0FE0; > - limit.y_bottom = 0x0010; > - limit.y_top = 0x0FE0; > - > dpi_pol.ck_pol = MTK_DPI_POLARITY_FALLING; > dpi_pol.de_pol = MTK_DPI_POLARITY_RISING; > dpi_pol.hsync_pol = vm.flags & DISPLAY_FLAGS_HSYNC_HIGH ? > @@ -536,7 +544,7 @@ static int mtk_dpi_set_display_mode(struct > mtk_dpi *dpi, > else > mtk_dpi_config_fb_size(dpi, vm.hactive, vm.vactive); > > - mtk_dpi_config_channel_limit(dpi, &limit); > + mtk_dpi_config_channel_limit(dpi); > mtk_dpi_config_bit_num(dpi, dpi->bit_num); > mtk_dpi_config_channel_swap(dpi, dpi->channel_swap); > mtk_dpi_config_yc_map(dpi, dpi->yc_map);
Hi, Bo-Chen: On Mon, 2022-06-20 at 20:10 +0800, Bo-Chen Chen wrote: > From: Guillaume Ranquet <granquet@baylibre.com> > > The hardware design of dp_intf does not support input swap, so we add > a bit of flexibility to support SoCs without swap_input support. > We also add a warning message if the hardware is not supported and it > needs to swap input. Reviewed-by: CK Hu <ck.hu@mediatek.com> > > Signed-off-by: Guillaume Ranquet <granquet@baylibre.com> > [Bo-Chen: Add modification reason in commit message.] > Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> > Reviewed-by: AngeloGioacchino Del Regno < > angelogioacchino.delregno@collabora.com> > Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.com> > --- > drivers/gpu/drm/mediatek/mtk_dpi.c | 17 ++++++++++++++--- > 1 file changed, 14 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c > b/drivers/gpu/drm/mediatek/mtk_dpi.c > index c88d64889402..5aab3029c54d 100644 > --- a/drivers/gpu/drm/mediatek/mtk_dpi.c > +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c > @@ -126,6 +126,7 @@ struct mtk_dpi_conf { > const u32 *output_fmts; > u32 num_output_fmts; > bool is_ck_de_pol; > + bool swap_input_support; > }; > > static void mtk_dpi_mask(struct mtk_dpi *dpi, u32 offset, u32 val, > u32 mask) > @@ -390,18 +391,24 @@ static void mtk_dpi_config_color_format(struct > mtk_dpi *dpi, > (format == MTK_DPI_COLOR_FORMAT_YCBCR_444_FULL)) { > mtk_dpi_config_yuv422_enable(dpi, false); > mtk_dpi_config_csc_enable(dpi, true); > - mtk_dpi_config_swap_input(dpi, false); > + if (dpi->conf->swap_input_support) > + mtk_dpi_config_swap_input(dpi, false); > mtk_dpi_config_channel_swap(dpi, > MTK_DPI_OUT_CHANNEL_SWAP_BGR); > } else if ((format == MTK_DPI_COLOR_FORMAT_YCBCR_422) || > (format == MTK_DPI_COLOR_FORMAT_YCBCR_422_FULL)) { > mtk_dpi_config_yuv422_enable(dpi, true); > mtk_dpi_config_csc_enable(dpi, true); > - mtk_dpi_config_swap_input(dpi, true); > + if (dpi->conf->swap_input_support) > + mtk_dpi_config_swap_input(dpi, true); > + else > + dev_warn(dpi->dev, > + "Failed to swap input, hw is not > supported.\n"); > mtk_dpi_config_channel_swap(dpi, > MTK_DPI_OUT_CHANNEL_SWAP_RGB); > } else { > mtk_dpi_config_yuv422_enable(dpi, false); > mtk_dpi_config_csc_enable(dpi, false); > - mtk_dpi_config_swap_input(dpi, false); > + if (dpi->conf->swap_input_support) > + mtk_dpi_config_swap_input(dpi, false); > mtk_dpi_config_channel_swap(dpi, > MTK_DPI_OUT_CHANNEL_SWAP_RGB); > } > } > @@ -813,6 +820,7 @@ static const struct mtk_dpi_conf mt8173_conf = { > .output_fmts = mt8173_output_fmts, > .num_output_fmts = ARRAY_SIZE(mt8173_output_fmts), > .is_ck_de_pol = true, > + .swap_input_support = true, > }; > > static const struct mtk_dpi_conf mt2701_conf = { > @@ -823,6 +831,7 @@ static const struct mtk_dpi_conf mt2701_conf = { > .output_fmts = mt8173_output_fmts, > .num_output_fmts = ARRAY_SIZE(mt8173_output_fmts), > .is_ck_de_pol = true, > + .swap_input_support = true, > }; > > static const struct mtk_dpi_conf mt8183_conf = { > @@ -832,6 +841,7 @@ static const struct mtk_dpi_conf mt8183_conf = { > .output_fmts = mt8183_output_fmts, > .num_output_fmts = ARRAY_SIZE(mt8183_output_fmts), > .is_ck_de_pol = true, > + .swap_input_support = true, > }; > > static const struct mtk_dpi_conf mt8192_conf = { > @@ -841,6 +851,7 @@ static const struct mtk_dpi_conf mt8192_conf = { > .output_fmts = mt8183_output_fmts, > .num_output_fmts = ARRAY_SIZE(mt8183_output_fmts), > .is_ck_de_pol = true, > + .swap_input_support = true, > }; > > static int mtk_dpi_probe(struct platform_device *pdev)
Hi, Bo-Chen: On Mon, 2022-06-20 at 20:10 +0800, Bo-Chen Chen wrote: > From: Guillaume Ranquet <granquet@baylibre.com> > > dpintf is the displayport interface hardware unit. This unit is > similar > to dpi and can reuse most of the code. > > This patch adds support for mt8195-dpintf to this dpi driver. Main > differences are: > - 4 pixels for one round for dp_intf while dpi is 1 pixel for one > round. > Therefore, pixel clock and timing parameter should be divided by 4 > for > dp_intf. > - Some features/functional components are not available for dpintf > which are now excluded from code execution once is_dpintf is set. > The main difference is some parts of hardware design between > dp_intf > and dpi. > - Some register contents differ slightly between the two components. > To > work around this I added register bits/masks with a DPINTF_ prefix > and use them where different. > > Based on a separate driver for dpintf created by > Jitao shi <jitao.shi@mediatek.com>. > > Signed-off-by: Markus Schneider-Pargmann <msp@baylibre.com> > Signed-off-by: Guillaume Ranquet <granquet@baylibre.com> > [Bo-Chen: Modify reviewers' comments.] > Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> > --- > drivers/gpu/drm/mediatek/mtk_dpi.c | 65 > +++++++++++++++++++-- > drivers/gpu/drm/mediatek/mtk_dpi_regs.h | 13 +++++ > drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 4 ++ > drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 1 + > drivers/gpu/drm/mediatek/mtk_drm_drv.c | 3 + > 5 files changed, 82 insertions(+), 4 deletions(-) > > diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c > b/drivers/gpu/drm/mediatek/mtk_dpi.c > index e186870ba3bc..2717b1741b7a 100644 > --- a/drivers/gpu/drm/mediatek/mtk_dpi.c > +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c > @@ -126,6 +126,7 @@ struct mtk_dpi_conf { > const u32 *output_fmts; > u32 num_output_fmts; > bool is_ck_de_pol; > + bool is_dpintf; > bool swap_input_support; > /* Mask used for HWIDTH, HPORCH, VSYNC_WIDTH and VSYNC_PORCH > (no shift) */ > u32 dimension_mask; > @@ -513,6 +514,14 @@ static int mtk_dpi_set_display_mode(struct > mtk_dpi *dpi, > pll_rate = clk_get_rate(dpi->tvd_clk); > > vm.pixelclock = pll_rate / factor; > + > + /* > + * For dp_intf, we need to divide clock by 4 because it's > + * 4 pixels for one round while dpi is 1 pixel for one round. > + */ > + if (dpi->conf->is_dpintf) > + vm.pixelclock /= 4; I this this should define dpi->conf->round_pixels rather than dpi- >conf->is_dpintf. > + > if ((dpi->output_fmt == MEDIA_BUS_FMT_RGB888_2X12_LE) || > (dpi->output_fmt == MEDIA_BUS_FMT_RGB888_2X12_BE)) > clk_set_rate(dpi->pixel_clk, vm.pixelclock * 2); > @@ -534,6 +543,17 @@ static int mtk_dpi_set_display_mode(struct > mtk_dpi *dpi, > hsync.sync_width = vm.hsync_len; > hsync.back_porch = vm.hback_porch; > hsync.front_porch = vm.hfront_porch; > + > + /* > + * For dp_intf, we need to divide everything by 4 because it's > + * 4 pixels for one round while dpi is 1 pixel for one round. > + */ > + if (dpi->conf->is_dpintf) { > + hsync.sync_width = vm.hsync_len / 4; > + hsync.back_porch = vm.hback_porch / 4; > + hsync.front_porch = vm.hfront_porch / 4; > + } Ditto. > + > hsync.shift_half_line = false; > vsync_lodd.sync_width = vm.vsync_len; > vsync_lodd.back_porch = vm.vback_porch; > @@ -575,11 +595,16 @@ static int mtk_dpi_set_display_mode(struct > mtk_dpi *dpi, > mtk_dpi_config_channel_limit(dpi); > mtk_dpi_config_bit_num(dpi, dpi->bit_num); > mtk_dpi_config_channel_swap(dpi, dpi->channel_swap); > - mtk_dpi_config_yc_map(dpi, dpi->yc_map); > mtk_dpi_config_color_format(dpi, dpi->color_format); > - mtk_dpi_config_2n_h_fre(dpi); > - mtk_dpi_dual_edge(dpi); > - mtk_dpi_config_disable_edge(dpi); > + if (dpi->conf->is_dpintf) { Separate this to an independent patch and give a better config name rather than dpi->conf->is_dpintf. > + mtk_dpi_mask(dpi, DPI_CON, DPINTF_INPUT_2P_EN, > + DPINTF_INPUT_2P_EN); > + } else { > + mtk_dpi_config_yc_map(dpi, dpi->yc_map); > + mtk_dpi_config_2n_h_fre(dpi); > + mtk_dpi_dual_edge(dpi); > + mtk_dpi_config_disable_edge(dpi); > + } > mtk_dpi_sw_reset(dpi, false); > > return 0; > @@ -817,6 +842,16 @@ static unsigned int mt8183_calculate_factor(int > clock) > return 2; > } > [snip] > > #define EDGE_SEL_EN BIT(5) > #define H_FRE_2N BIT(25) > + This seems not related to dpintf support. Regards, CK > #endif /* __MTK_DPI_REGS_H */ >
Hi, Bo-Chen: On Mon, 2022-06-20 at 20:10 +0800, Bo-Chen Chen wrote: > We should enable/disable tvd_clk when power_on/power_off, so add this > patch to do this. Without this patch, what would happen? It seems this patch is redundant for these SoCs: static const struct of_device_id mtk_dpi_of_ids[] = { { .compatible = "mediatek,mt2701-dpi", .data = &mt2701_conf, }, { .compatible = "mediatek,mt8173-dpi", .data = &mt8173_conf, }, { .compatible = "mediatek,mt8183-dpi", .data = &mt8183_conf, }, { .compatible = "mediatek,mt8192-dpi", .data = &mt8192_conf, }, { }, }; Regards, CK > > Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> > --- > drivers/gpu/drm/mediatek/mtk_dpi.c | 11 ++++++++++- > 1 file changed, 10 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c > b/drivers/gpu/drm/mediatek/mtk_dpi.c > index 2717b1741b7a..f83ecb154457 100644 > --- a/drivers/gpu/drm/mediatek/mtk_dpi.c > +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c > @@ -455,6 +455,7 @@ static void mtk_dpi_power_off(struct mtk_dpi > *dpi) > mtk_dpi_disable(dpi); > clk_disable_unprepare(dpi->pixel_clk); > clk_disable_unprepare(dpi->engine_clk); > + clk_disable_unprepare(dpi->tvd_clk); > } > > static int mtk_dpi_power_on(struct mtk_dpi *dpi) > @@ -464,10 +465,16 @@ static int mtk_dpi_power_on(struct mtk_dpi > *dpi) > if (++dpi->refcount != 1) > return 0; > > + ret = clk_prepare_enable(dpi->tvd_clk); > + if (ret) { > + dev_err(dpi->dev, "Failed to enable tvd pll: %d\n", > ret); > + goto err_refcount; > + } > + > ret = clk_prepare_enable(dpi->engine_clk); > if (ret) { > dev_err(dpi->dev, "Failed to enable engine clock: > %d\n", ret); > - goto err_refcount; > + goto err_engine; > } > > ret = clk_prepare_enable(dpi->pixel_clk); > @@ -484,6 +491,8 @@ static int mtk_dpi_power_on(struct mtk_dpi *dpi) > > err_pixel: > clk_disable_unprepare(dpi->engine_clk); > +err_engine: > + clk_disable_unprepare(dpi->tvd_clk); > err_refcount: > dpi->refcount--; > return ret;
Hi, Bo-Chen: On Mon, 2022-06-20 at 20:10 +0800, Bo-Chen Chen wrote: > Dp_intf supports YUV422 as output format. In MT8195 Chrome project, > YUV422 output format is used for 4K resolution. Move this patch before [1]. Otherwise, [1] would result in a bug. [1] [v12,10/14] drm/mediatek: dpi: Add dpintf support > > Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> > --- > drivers/gpu/drm/mediatek/mtk_dpi.c | 5 ++++- > 1 file changed, 4 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c > b/drivers/gpu/drm/mediatek/mtk_dpi.c > index f83ecb154457..fc76ccad0a82 100644 > --- a/drivers/gpu/drm/mediatek/mtk_dpi.c > +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c > @@ -692,7 +692,10 @@ static int mtk_dpi_bridge_atomic_check(struct > drm_bridge *bridge, > dpi->bit_num = MTK_DPI_OUT_BIT_NUM_8BITS; > dpi->channel_swap = MTK_DPI_OUT_CHANNEL_SWAP_RGB; > dpi->yc_map = MTK_DPI_OUT_YC_MAP_RGB; > - dpi->color_format = MTK_DPI_COLOR_FORMAT_RGB; > + if (out_bus_format == MEDIA_BUS_FMT_YUYV8_1X16) > + dpi->color_format = > MTK_DPI_COLOR_FORMAT_YCBCR_422_FULL; > + else > + dpi->color_format = MTK_DPI_COLOR_FORMAT_RGB; If out_bus_format is MEDIA_BUS_FMT_YUV8_1X24, the color_format is MTK_DPI_COLOR_FORMAT_RGB? Regards, CK > > return 0; > }
On Tue, 2022-06-21 at 10:55 +0800, CK Hu wrote: > Hi, Bo-Chen: > > On Mon, 2022-06-20 at 20:10 +0800, Bo-Chen Chen wrote: > > We should enable/disable tvd_clk when power_on/power_off, so add > > this > > patch to do this. > > Without this patch, what would happen? > It seems this patch is redundant for these SoCs: > > static const struct of_device_id mtk_dpi_of_ids[] = { > { .compatible = "mediatek,mt2701-dpi", > .data = &mt2701_conf, > }, > { .compatible = "mediatek,mt8173-dpi", > .data = &mt8173_conf, > }, > { .compatible = "mediatek,mt8183-dpi", > .data = &mt8183_conf, > }, > { .compatible = "mediatek,mt8192-dpi", > .data = &mt8192_conf, > }, > { }, > }; > > Regards, > CK > Hello CK, IMO, this is a bug fix patch. From the usage of clock, if we want to use it, we should enable it . Therefore, I think we should add this and I will add a fix tag for this patch. BRs, Bo-Chen > > > > > Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> > > --- > > drivers/gpu/drm/mediatek/mtk_dpi.c | 11 ++++++++++- > > 1 file changed, 10 insertions(+), 1 deletion(-) > > > > diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c > > b/drivers/gpu/drm/mediatek/mtk_dpi.c > > index 2717b1741b7a..f83ecb154457 100644 > > --- a/drivers/gpu/drm/mediatek/mtk_dpi.c > > +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c > > @@ -455,6 +455,7 @@ static void mtk_dpi_power_off(struct mtk_dpi > > *dpi) > > mtk_dpi_disable(dpi); > > clk_disable_unprepare(dpi->pixel_clk); > > clk_disable_unprepare(dpi->engine_clk); > > + clk_disable_unprepare(dpi->tvd_clk); > > } > > > > static int mtk_dpi_power_on(struct mtk_dpi *dpi) > > @@ -464,10 +465,16 @@ static int mtk_dpi_power_on(struct mtk_dpi > > *dpi) > > if (++dpi->refcount != 1) > > return 0; > > > > + ret = clk_prepare_enable(dpi->tvd_clk); > > + if (ret) { > > + dev_err(dpi->dev, "Failed to enable tvd pll: %d\n", > > ret); > > + goto err_refcount; > > + } > > + > > ret = clk_prepare_enable(dpi->engine_clk); > > if (ret) { > > dev_err(dpi->dev, "Failed to enable engine clock: > > %d\n", ret); > > - goto err_refcount; > > + goto err_engine; > > } > > > > ret = clk_prepare_enable(dpi->pixel_clk); > > @@ -484,6 +491,8 @@ static int mtk_dpi_power_on(struct mtk_dpi > > *dpi) > > > > err_pixel: > > clk_disable_unprepare(dpi->engine_clk); > > +err_engine: > > + clk_disable_unprepare(dpi->tvd_clk); > > err_refcount: > > dpi->refcount--; > > return ret; > >
Hi, Bo-Chen: On Mon, 2022-06-20 at 20:10 +0800, Bo-Chen Chen wrote: > From: Guillaume Ranquet <granquet@baylibre.com> > > Enabling the dpi too early causes glitches on screen. > > Move the call to mtk_dpi_enable() at the end of the bridge_enable > callback to ensure everything is setup properly before enabling dpi. > > Fixes: f89c696e7f63 ("drm/mediatek: mtk_dpi: Convert to bridge > driver") I think this problem happen in the first patch [1]. [1] https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux.git/commit/drivers/gpu/drm/mediatek/mtk_dpi.c?h=mediatek-drm-next&id=9e629c17aa8d7a75b8c1d99ed42892cd8ba7cdc4 Regards, CK > Signed-off-by: Guillaume Ranquet <granquet@baylibre.com> > Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> > --- > drivers/gpu/drm/mediatek/mtk_dpi.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c > b/drivers/gpu/drm/mediatek/mtk_dpi.c > index fc76ccad0a82..220e9b18e2cd 100644 > --- a/drivers/gpu/drm/mediatek/mtk_dpi.c > +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c > @@ -486,7 +486,6 @@ static int mtk_dpi_power_on(struct mtk_dpi *dpi) > if (dpi->pinctrl && dpi->pins_dpi) > pinctrl_select_state(dpi->pinctrl, dpi->pins_dpi); > > - mtk_dpi_enable(dpi); > return 0; > > err_pixel: > @@ -731,6 +730,7 @@ static void mtk_dpi_bridge_enable(struct > drm_bridge *bridge) > > mtk_dpi_power_on(dpi); > mtk_dpi_set_display_mode(dpi, &dpi->mode); > + mtk_dpi_enable(dpi); > } > > static enum drm_mode_status
Hi, Bo-Chen: On Mon, 2022-06-20 at 20:10 +0800, Bo-Chen Chen wrote: > From: Guillaume Ranquet <granquet@baylibre.com> > > Matrix selection is a new feature for both dpi and dpintf of MT8195. > Add a mtk_dpi_matrix_sel() helper to update the DPI_MATRIX_SET > register depending on the color format. Describe more about what this do. > > Signed-off-by: Guillaume Ranquet <granquet@baylibre.com> > Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> > --- > drivers/gpu/drm/mediatek/mtk_dpi.c | 29 > +++++++++++++++++++++++++ > drivers/gpu/drm/mediatek/mtk_dpi_regs.h | 3 +++ > 2 files changed, 32 insertions(+) > > diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c > b/drivers/gpu/drm/mediatek/mtk_dpi.c > index 220e9b18e2cd..8a9151cb1622 100644 > --- a/drivers/gpu/drm/mediatek/mtk_dpi.c > +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c > @@ -135,6 +135,7 @@ struct mtk_dpi_conf { > u32 channel_swap_shift; > u32 yuv422_en_bit; > u32 csc_enable_bit; > + bool matrx_sel_support; > }; > > static void mtk_dpi_mask(struct mtk_dpi *dpi, u32 offset, u32 val, > u32 mask) > @@ -398,6 +399,31 @@ static void mtk_dpi_config_disable_edge(struct > mtk_dpi *dpi) > mtk_dpi_mask(dpi, dpi->conf->reg_h_fre_con, 0, > EDGE_SEL_EN); > } > > +static void mtk_dpi_matrix_sel(struct mtk_dpi *dpi, > + enum mtk_dpi_out_color_format format) > +{ > + u32 matrix_sel = 0; > + > + if (!dpi->conf->matrx_sel_support) { > + dev_info(dpi->dev, "matrix_sel is not supported.\n"); So for this SoC, there would be something wrong? I still does not understand what this feature is. static const struct of_device_id mtk_dpi_of_ids[] = { { .compatible = "mediatek,mt2701-dpi", .data = &mt2701_conf, }, { .compatible = "mediatek,mt8173-dpi", .data = &mt8173_conf, }, { .compatible = "mediatek,mt8183-dpi", .data = &mt8183_conf, }, { .compatible = "mediatek,mt8192-dpi", .data = &mt8192_conf, }, { }, }; > + return; > + } > + > + switch (format) { > + case MTK_DPI_COLOR_FORMAT_YCBCR_422: > + case MTK_DPI_COLOR_FORMAT_YCBCR_422_FULL: > + case MTK_DPI_COLOR_FORMAT_YCBCR_444: > + case MTK_DPI_COLOR_FORMAT_YCBCR_444_FULL: > + case MTK_DPI_COLOR_FORMAT_XV_YCC: > + if (dpi->mode.hdisplay <= 720) > + matrix_sel = 0x2; Symbolize 0x2. > + break; > + default: If format is MTK_DPI_COLOR_FORMAT_YCBCR_422 first, then format change to MTK_DPI_COLOR_FORMAT_RGB and matrix_sel would still be 0x2. Is this correct? Regards, CK > + break; > + } > + mtk_dpi_mask(dpi, DPI_MATRIX_SET, matrix_sel, > INT_MATRIX_SEL_MASK); > +} > + > static void mtk_dpi_config_color_format(struct mtk_dpi *dpi, > enum mtk_dpi_out_color_format > format) > { > @@ -405,6 +431,7 @@ static void mtk_dpi_config_color_format(struct > mtk_dpi *dpi, > (format == MTK_DPI_COLOR_FORMAT_YCBCR_444_FULL)) { > mtk_dpi_config_yuv422_enable(dpi, false); > mtk_dpi_config_csc_enable(dpi, true); > + mtk_dpi_matrix_sel(dpi, format); > if (dpi->conf->swap_input_support) > mtk_dpi_config_swap_input(dpi, false); > mtk_dpi_config_channel_swap(dpi, > MTK_DPI_OUT_CHANNEL_SWAP_BGR); > @@ -412,6 +439,7 @@ static void mtk_dpi_config_color_format(struct > mtk_dpi *dpi, > (format == MTK_DPI_COLOR_FORMAT_YCBCR_422_FULL)) { > mtk_dpi_config_yuv422_enable(dpi, true); > mtk_dpi_config_csc_enable(dpi, true); > + mtk_dpi_matrix_sel(dpi, format); > if (dpi->conf->swap_input_support) > mtk_dpi_config_swap_input(dpi, true); > else > @@ -951,6 +979,7 @@ static const struct mtk_dpi_conf > mt8195_dpintf_conf = { > .channel_swap_shift = DPINTF_CH_SWAP, > .yuv422_en_bit = DPINTF_YUV422_EN, > .csc_enable_bit = DPINTF_CSC_ENABLE, > + .matrx_sel_support = true, > }; > > static int mtk_dpi_probe(struct platform_device *pdev) > diff --git a/drivers/gpu/drm/mediatek/mtk_dpi_regs.h > b/drivers/gpu/drm/mediatek/mtk_dpi_regs.h > index f7f0272dbd6a..96c117202d0d 100644 > --- a/drivers/gpu/drm/mediatek/mtk_dpi_regs.h > +++ b/drivers/gpu/drm/mediatek/mtk_dpi_regs.h > @@ -230,4 +230,7 @@ > #define EDGE_SEL_EN BIT(5) > #define H_FRE_2N BIT(25) > > +#define DPI_MATRIX_SET 0xB4 > +#define INT_MATRIX_SEL_MASK (0x1F << 0) > + > #endif /* __MTK_DPI_REGS_H */
On Tue, 2022-06-21 at 11:11 +0800, Rex-BC Chen wrote: > On Tue, 2022-06-21 at 10:55 +0800, CK Hu wrote: > > Hi, Bo-Chen: > > > > On Mon, 2022-06-20 at 20:10 +0800, Bo-Chen Chen wrote: > > > We should enable/disable tvd_clk when power_on/power_off, so add > > > this > > > patch to do this. > > > > Without this patch, what would happen? > > It seems this patch is redundant for these SoCs: > > > > static const struct of_device_id mtk_dpi_of_ids[] = { > > { .compatible = "mediatek,mt2701-dpi", > > .data = &mt2701_conf, > > }, > > { .compatible = "mediatek,mt8173-dpi", > > .data = &mt8173_conf, > > }, > > { .compatible = "mediatek,mt8183-dpi", > > .data = &mt8183_conf, > > }, > > { .compatible = "mediatek,mt8192-dpi", > > .data = &mt8192_conf, > > }, > > { }, > > }; > > > > Regards, > > CK > > > > Hello CK, > > IMO, this is a bug fix patch. From the usage of clock, if we want to > use it, we should enable it . Therefore, I think we should add this > and > I will add a fix tag for this patch. I think mt8173 chromebook use this driver for HDMI output. So mt8173 chromebook HDMI could not work normally? Regards, CK > > BRs, > Bo-Chen > > > > > > > > Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> > > > --- > > > drivers/gpu/drm/mediatek/mtk_dpi.c | 11 ++++++++++- > > > 1 file changed, 10 insertions(+), 1 deletion(-) > > > > > > diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c > > > b/drivers/gpu/drm/mediatek/mtk_dpi.c > > > index 2717b1741b7a..f83ecb154457 100644 > > > --- a/drivers/gpu/drm/mediatek/mtk_dpi.c > > > +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c > > > @@ -455,6 +455,7 @@ static void mtk_dpi_power_off(struct mtk_dpi > > > *dpi) > > > mtk_dpi_disable(dpi); > > > clk_disable_unprepare(dpi->pixel_clk); > > > clk_disable_unprepare(dpi->engine_clk); > > > + clk_disable_unprepare(dpi->tvd_clk); > > > } > > > > > > static int mtk_dpi_power_on(struct mtk_dpi *dpi) > > > @@ -464,10 +465,16 @@ static int mtk_dpi_power_on(struct mtk_dpi > > > *dpi) > > > if (++dpi->refcount != 1) > > > return 0; > > > > > > + ret = clk_prepare_enable(dpi->tvd_clk); > > > + if (ret) { > > > + dev_err(dpi->dev, "Failed to enable tvd pll: %d\n", > > > ret); > > > + goto err_refcount; > > > + } > > > + > > > ret = clk_prepare_enable(dpi->engine_clk); > > > if (ret) { > > > dev_err(dpi->dev, "Failed to enable engine clock: > > > %d\n", ret); > > > - goto err_refcount; > > > + goto err_engine; > > > } > > > > > > ret = clk_prepare_enable(dpi->pixel_clk); > > > @@ -484,6 +491,8 @@ static int mtk_dpi_power_on(struct mtk_dpi > > > *dpi) > > > > > > err_pixel: > > > clk_disable_unprepare(dpi->engine_clk); > > > +err_engine: > > > + clk_disable_unprepare(dpi->tvd_clk); > > > err_refcount: > > > dpi->refcount--; > > > return ret; > > > > > >
On Tue, 2022-06-21 at 11:45 +0800, CK Hu wrote: > On Tue, 2022-06-21 at 11:11 +0800, Rex-BC Chen wrote: > > On Tue, 2022-06-21 at 10:55 +0800, CK Hu wrote: > > > Hi, Bo-Chen: > > > > > > On Mon, 2022-06-20 at 20:10 +0800, Bo-Chen Chen wrote: > > > > We should enable/disable tvd_clk when power_on/power_off, so > > > > add > > > > this > > > > patch to do this. > > > > > > Without this patch, what would happen? > > > It seems this patch is redundant for these SoCs: > > > > > > static const struct of_device_id mtk_dpi_of_ids[] = { > > > { .compatible = "mediatek,mt2701-dpi", > > > .data = &mt2701_conf, > > > }, > > > { .compatible = "mediatek,mt8173-dpi", > > > .data = &mt8173_conf, > > > }, > > > { .compatible = "mediatek,mt8183-dpi", > > > .data = &mt8183_conf, > > > }, > > > { .compatible = "mediatek,mt8192-dpi", > > > .data = &mt8192_conf, > > > }, > > > { }, > > > }; > > > > > > Regards, > > > CK > > > > > > > Hello CK, > > > > IMO, this is a bug fix patch. From the usage of clock, if we want > > to > > use it, we should enable it . Therefore, I think we should add this > > and > > I will add a fix tag for this patch. > > I think mt8173 chromebook use this driver for HDMI output. So mt8173 > chromebook HDMI could not work normally? > > Regards, > CK > Hmm.. I am not sure about this. But without this patch, dpi is also working in mt8183/mt8192. It may be related to the ccf driver. But anyway, I think we should do this whether ccf driver helps us to enable this clock. BRs, Bo-Chen > > > > BRs, > > Bo-Chen > > > > > > > > > > > Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> > > > > --- > > > > drivers/gpu/drm/mediatek/mtk_dpi.c | 11 ++++++++++- > > > > 1 file changed, 10 insertions(+), 1 deletion(-) > > > > > > > > diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c > > > > b/drivers/gpu/drm/mediatek/mtk_dpi.c > > > > index 2717b1741b7a..f83ecb154457 100644 > > > > --- a/drivers/gpu/drm/mediatek/mtk_dpi.c > > > > +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c > > > > @@ -455,6 +455,7 @@ static void mtk_dpi_power_off(struct > > > > mtk_dpi > > > > *dpi) > > > > mtk_dpi_disable(dpi); > > > > clk_disable_unprepare(dpi->pixel_clk); > > > > clk_disable_unprepare(dpi->engine_clk); > > > > + clk_disable_unprepare(dpi->tvd_clk); > > > > } > > > > > > > > static int mtk_dpi_power_on(struct mtk_dpi *dpi) > > > > @@ -464,10 +465,16 @@ static int mtk_dpi_power_on(struct > > > > mtk_dpi > > > > *dpi) > > > > if (++dpi->refcount != 1) > > > > return 0; > > > > > > > > + ret = clk_prepare_enable(dpi->tvd_clk); > > > > + if (ret) { > > > > + dev_err(dpi->dev, "Failed to enable tvd pll: > > > > %d\n", > > > > ret); > > > > + goto err_refcount; > > > > + } > > > > + > > > > ret = clk_prepare_enable(dpi->engine_clk); > > > > if (ret) { > > > > dev_err(dpi->dev, "Failed to enable engine > > > > clock: > > > > %d\n", ret); > > > > - goto err_refcount; > > > > + goto err_engine; > > > > } > > > > > > > > ret = clk_prepare_enable(dpi->pixel_clk); > > > > @@ -484,6 +491,8 @@ static int mtk_dpi_power_on(struct mtk_dpi > > > > *dpi) > > > > > > > > err_pixel: > > > > clk_disable_unprepare(dpi->engine_clk); > > > > +err_engine: > > > > + clk_disable_unprepare(dpi->tvd_clk); > > > > err_refcount: > > > > dpi->refcount--; > > > > return ret; > > > > > > > > > > > >
Hi, Rex: On Tue, 2022-06-21 at 11:50 +0800, Rex-BC Chen wrote: > On Tue, 2022-06-21 at 11:45 +0800, CK Hu wrote: > > On Tue, 2022-06-21 at 11:11 +0800, Rex-BC Chen wrote: > > > On Tue, 2022-06-21 at 10:55 +0800, CK Hu wrote: > > > > Hi, Bo-Chen: > > > > > > > > On Mon, 2022-06-20 at 20:10 +0800, Bo-Chen Chen wrote: > > > > > We should enable/disable tvd_clk when power_on/power_off, so > > > > > add > > > > > this > > > > > patch to do this. > > > > > > > > Without this patch, what would happen? > > > > It seems this patch is redundant for these SoCs: > > > > > > > > static const struct of_device_id mtk_dpi_of_ids[] = { > > > > { .compatible = "mediatek,mt2701-dpi", > > > > .data = &mt2701_conf, > > > > }, > > > > { .compatible = "mediatek,mt8173-dpi", > > > > .data = &mt8173_conf, > > > > }, > > > > { .compatible = "mediatek,mt8183-dpi", > > > > .data = &mt8183_conf, > > > > }, > > > > { .compatible = "mediatek,mt8192-dpi", > > > > .data = &mt8192_conf, > > > > }, > > > > { }, > > > > }; > > > > > > > > Regards, > > > > CK > > > > > > > > > > Hello CK, > > > > > > IMO, this is a bug fix patch. From the usage of clock, if we want > > > to > > > use it, we should enable it . Therefore, I think we should add > > > this > > > and > > > I will add a fix tag for this patch. > > > > I think mt8173 chromebook use this driver for HDMI output. So > > mt8173 > > chromebook HDMI could not work normally? > > > > Regards, > > CK > > > > Hmm.. > I am not sure about this. But without this patch, dpi is also working > in mt8183/mt8192. It may be related to the ccf driver. But anyway, I > think we should do this whether ccf driver helps us to enable this > clock. OK. So, could you help to fix the bug in ccf? If HDMI is disabled but ccf still turn on this clock, the power would be wasted. Regards, CK > > BRs, > Bo-Chen > > > > > > > BRs, > > > Bo-Chen > > > > > > > > > > > > > > Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> > > > > > --- > > > > > drivers/gpu/drm/mediatek/mtk_dpi.c | 11 ++++++++++- > > > > > 1 file changed, 10 insertions(+), 1 deletion(-) > > > > > > > > > > diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c > > > > > b/drivers/gpu/drm/mediatek/mtk_dpi.c > > > > > index 2717b1741b7a..f83ecb154457 100644 > > > > > --- a/drivers/gpu/drm/mediatek/mtk_dpi.c > > > > > +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c > > > > > @@ -455,6 +455,7 @@ static void mtk_dpi_power_off(struct > > > > > mtk_dpi > > > > > *dpi) > > > > > mtk_dpi_disable(dpi); > > > > > clk_disable_unprepare(dpi->pixel_clk); > > > > > clk_disable_unprepare(dpi->engine_clk); > > > > > + clk_disable_unprepare(dpi->tvd_clk); > > > > > } > > > > > > > > > > static int mtk_dpi_power_on(struct mtk_dpi *dpi) > > > > > @@ -464,10 +465,16 @@ static int mtk_dpi_power_on(struct > > > > > mtk_dpi > > > > > *dpi) > > > > > if (++dpi->refcount != 1) > > > > > return 0; > > > > > > > > > > + ret = clk_prepare_enable(dpi->tvd_clk); > > > > > + if (ret) { > > > > > + dev_err(dpi->dev, "Failed to enable tvd pll: > > > > > %d\n", > > > > > ret); > > > > > + goto err_refcount; > > > > > + } > > > > > + > > > > > ret = clk_prepare_enable(dpi->engine_clk); > > > > > if (ret) { > > > > > dev_err(dpi->dev, "Failed to enable engine > > > > > clock: > > > > > %d\n", ret); > > > > > - goto err_refcount; > > > > > + goto err_engine; > > > > > } > > > > > > > > > > ret = clk_prepare_enable(dpi->pixel_clk); > > > > > @@ -484,6 +491,8 @@ static int mtk_dpi_power_on(struct > > > > > mtk_dpi > > > > > *dpi) > > > > > > > > > > err_pixel: > > > > > clk_disable_unprepare(dpi->engine_clk); > > > > > +err_engine: > > > > > + clk_disable_unprepare(dpi->tvd_clk); > > > > > err_refcount: > > > > > dpi->refcount--; > > > > > return ret; > > > > > > > > > > > > > > > > > > > >
On Tue, 2022-06-21 at 12:08 +0800, CK Hu wrote: > Hi, Rex: > > On Tue, 2022-06-21 at 11:50 +0800, Rex-BC Chen wrote: > > On Tue, 2022-06-21 at 11:45 +0800, CK Hu wrote: > > > On Tue, 2022-06-21 at 11:11 +0800, Rex-BC Chen wrote: > > > > On Tue, 2022-06-21 at 10:55 +0800, CK Hu wrote: > > > > > Hi, Bo-Chen: > > > > > > > > > > On Mon, 2022-06-20 at 20:10 +0800, Bo-Chen Chen wrote: > > > > > > We should enable/disable tvd_clk when power_on/power_off, > > > > > > so > > > > > > add > > > > > > this > > > > > > patch to do this. > > > > > > > > > > Without this patch, what would happen? > > > > > It seems this patch is redundant for these SoCs: > > > > > > > > > > static const struct of_device_id mtk_dpi_of_ids[] = { > > > > > { .compatible = "mediatek,mt2701-dpi", > > > > > .data = &mt2701_conf, > > > > > }, > > > > > { .compatible = "mediatek,mt8173-dpi", > > > > > .data = &mt8173_conf, > > > > > }, > > > > > { .compatible = "mediatek,mt8183-dpi", > > > > > .data = &mt8183_conf, > > > > > }, > > > > > { .compatible = "mediatek,mt8192-dpi", > > > > > .data = &mt8192_conf, > > > > > }, > > > > > { }, > > > > > }; > > > > > > > > > > Regards, > > > > > CK > > > > > > > > > > > > > Hello CK, > > > > > > > > IMO, this is a bug fix patch. From the usage of clock, if we > > > > want > > > > to > > > > use it, we should enable it . Therefore, I think we should add > > > > this > > > > and > > > > I will add a fix tag for this patch. > > > > > > I think mt8173 chromebook use this driver for HDMI output. So > > > mt8173 > > > chromebook HDMI could not work normally? > > > > > > Regards, > > > CK > > > > > > > Hmm.. > > I am not sure about this. But without this patch, dpi is also > > working > > in mt8183/mt8192. It may be related to the ccf driver. But anyway, > > I > > think we should do this whether ccf driver helps us to enable this > > clock. > > OK. So, could you help to fix the bug in ccf? If HDMI is disabled but > ccf still turn on this clock, the power would be wasted. > > Regards, > CK > I am also testing if we don't have this patch and it also "works" (dpintf is working fine). do you think we need this patch or just drop this? For the ccf driver, I am not familiar to ccf and also not a expert of ccf. It just a guest for this. I am not sure whether it's a "bug" or just a. And I think it's not the purpose of this series. If there is any issue, I think we will fix it in the future. BRs, Bo-Chen > > > > BRs, > > Bo-Chen > > > > > > > > > > BRs, > > > > Bo-Chen > > > > > > > > > > > > > > > > > Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> > > > > > > --- > > > > > > drivers/gpu/drm/mediatek/mtk_dpi.c | 11 ++++++++++- > > > > > > 1 file changed, 10 insertions(+), 1 deletion(-) > > > > > > > > > > > > diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c > > > > > > b/drivers/gpu/drm/mediatek/mtk_dpi.c > > > > > > index 2717b1741b7a..f83ecb154457 100644 > > > > > > --- a/drivers/gpu/drm/mediatek/mtk_dpi.c > > > > > > +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c > > > > > > @@ -455,6 +455,7 @@ static void mtk_dpi_power_off(struct > > > > > > mtk_dpi > > > > > > *dpi) > > > > > > mtk_dpi_disable(dpi); > > > > > > clk_disable_unprepare(dpi->pixel_clk); > > > > > > clk_disable_unprepare(dpi->engine_clk); > > > > > > + clk_disable_unprepare(dpi->tvd_clk); > > > > > > } > > > > > > > > > > > > static int mtk_dpi_power_on(struct mtk_dpi *dpi) > > > > > > @@ -464,10 +465,16 @@ static int mtk_dpi_power_on(struct > > > > > > mtk_dpi > > > > > > *dpi) > > > > > > if (++dpi->refcount != 1) > > > > > > return 0; > > > > > > > > > > > > + ret = clk_prepare_enable(dpi->tvd_clk); > > > > > > + if (ret) { > > > > > > + dev_err(dpi->dev, "Failed to enable tvd pll: > > > > > > %d\n", > > > > > > ret); > > > > > > + goto err_refcount; > > > > > > + } > > > > > > + > > > > > > ret = clk_prepare_enable(dpi->engine_clk); > > > > > > if (ret) { > > > > > > dev_err(dpi->dev, "Failed to enable engine > > > > > > clock: > > > > > > %d\n", ret); > > > > > > - goto err_refcount; > > > > > > + goto err_engine; > > > > > > } > > > > > > > > > > > > ret = clk_prepare_enable(dpi->pixel_clk); > > > > > > @@ -484,6 +491,8 @@ static int mtk_dpi_power_on(struct > > > > > > mtk_dpi > > > > > > *dpi) > > > > > > > > > > > > err_pixel: > > > > > > clk_disable_unprepare(dpi->engine_clk); > > > > > > +err_engine: > > > > > > + clk_disable_unprepare(dpi->tvd_clk); > > > > > > err_refcount: > > > > > > dpi->refcount--; > > > > > > return ret; > > > > > > > > > > > > > > > > > > > > > > > > > > > > > >
Hi, Rex: On Tue, 2022-06-21 at 13:47 +0800, Rex-BC Chen wrote: > On Tue, 2022-06-21 at 12:08 +0800, CK Hu wrote: > > Hi, Rex: > > > > On Tue, 2022-06-21 at 11:50 +0800, Rex-BC Chen wrote: > > > On Tue, 2022-06-21 at 11:45 +0800, CK Hu wrote: > > > > On Tue, 2022-06-21 at 11:11 +0800, Rex-BC Chen wrote: > > > > > On Tue, 2022-06-21 at 10:55 +0800, CK Hu wrote: > > > > > > Hi, Bo-Chen: > > > > > > > > > > > > On Mon, 2022-06-20 at 20:10 +0800, Bo-Chen Chen wrote: > > > > > > > We should enable/disable tvd_clk when power_on/power_off, > > > > > > > so > > > > > > > add > > > > > > > this > > > > > > > patch to do this. > > > > > > > > > > > > Without this patch, what would happen? > > > > > > It seems this patch is redundant for these SoCs: > > > > > > > > > > > > static const struct of_device_id mtk_dpi_of_ids[] = { > > > > > > { .compatible = "mediatek,mt2701-dpi", > > > > > > .data = &mt2701_conf, > > > > > > }, > > > > > > { .compatible = "mediatek,mt8173-dpi", > > > > > > .data = &mt8173_conf, > > > > > > }, > > > > > > { .compatible = "mediatek,mt8183-dpi", > > > > > > .data = &mt8183_conf, > > > > > > }, > > > > > > { .compatible = "mediatek,mt8192-dpi", > > > > > > .data = &mt8192_conf, > > > > > > }, > > > > > > { }, > > > > > > }; > > > > > > > > > > > > Regards, > > > > > > CK > > > > > > > > > > > > > > > > Hello CK, > > > > > > > > > > IMO, this is a bug fix patch. From the usage of clock, if we > > > > > want > > > > > to > > > > > use it, we should enable it . Therefore, I think we should > > > > > add > > > > > this > > > > > and > > > > > I will add a fix tag for this patch. > > > > > > > > I think mt8173 chromebook use this driver for HDMI output. So > > > > mt8173 > > > > chromebook HDMI could not work normally? > > > > > > > > Regards, > > > > CK > > > > > > > > > > Hmm.. > > > I am not sure about this. But without this patch, dpi is also > > > working > > > in mt8183/mt8192. It may be related to the ccf driver. But > > > anyway, > > > I > > > think we should do this whether ccf driver helps us to enable > > > this > > > clock. > > > > OK. So, could you help to fix the bug in ccf? If HDMI is disabled > > but > > ccf still turn on this clock, the power would be wasted. > > > > Regards, > > CK > > > > I am also testing if we don't have this patch and it also "works" > (dpintf is working fine). > do you think we need this patch or just drop this? > > For the ccf driver, I am not familiar to ccf and also not a expert of > ccf. > It just a guest for this. I am not sure whether it's a "bug" or just > a. > And I think it's not the purpose of this series. If there is any > issue, > I think we will fix it in the future. Because we have no idea how this works, I think it's better to drop this patch. Regards, CK > > BRs, > Bo-Chen > > > > > > > BRs, > > > Bo-Chen > > > > > > > > > > > > > BRs, > > > > > Bo-Chen > > > > > > > > > > > > > > > > > > > > Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> > > > > > > > --- > > > > > > > drivers/gpu/drm/mediatek/mtk_dpi.c | 11 ++++++++++- > > > > > > > 1 file changed, 10 insertions(+), 1 deletion(-) > > > > > > > > > > > > > > diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c > > > > > > > b/drivers/gpu/drm/mediatek/mtk_dpi.c > > > > > > > index 2717b1741b7a..f83ecb154457 100644 > > > > > > > --- a/drivers/gpu/drm/mediatek/mtk_dpi.c > > > > > > > +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c > > > > > > > @@ -455,6 +455,7 @@ static void mtk_dpi_power_off(struct > > > > > > > mtk_dpi > > > > > > > *dpi) > > > > > > > mtk_dpi_disable(dpi); > > > > > > > clk_disable_unprepare(dpi->pixel_clk); > > > > > > > clk_disable_unprepare(dpi->engine_clk); > > > > > > > + clk_disable_unprepare(dpi->tvd_clk); > > > > > > > } > > > > > > > > > > > > > > static int mtk_dpi_power_on(struct mtk_dpi *dpi) > > > > > > > @@ -464,10 +465,16 @@ static int mtk_dpi_power_on(struct > > > > > > > mtk_dpi > > > > > > > *dpi) > > > > > > > if (++dpi->refcount != 1) > > > > > > > return 0; > > > > > > > > > > > > > > + ret = clk_prepare_enable(dpi->tvd_clk); > > > > > > > + if (ret) { > > > > > > > + dev_err(dpi->dev, "Failed to enable tvd pll: > > > > > > > %d\n", > > > > > > > ret); > > > > > > > + goto err_refcount; > > > > > > > + } > > > > > > > + > > > > > > > ret = clk_prepare_enable(dpi->engine_clk); > > > > > > > if (ret) { > > > > > > > dev_err(dpi->dev, "Failed to enable engine > > > > > > > clock: > > > > > > > %d\n", ret); > > > > > > > - goto err_refcount; > > > > > > > + goto err_engine; > > > > > > > } > > > > > > > > > > > > > > ret = clk_prepare_enable(dpi->pixel_clk); > > > > > > > @@ -484,6 +491,8 @@ static int mtk_dpi_power_on(struct > > > > > > > mtk_dpi > > > > > > > *dpi) > > > > > > > > > > > > > > err_pixel: > > > > > > > clk_disable_unprepare(dpi->engine_clk); > > > > > > > +err_engine: > > > > > > > + clk_disable_unprepare(dpi->tvd_clk); > > > > > > > err_refcount: > > > > > > > dpi->refcount--; > > > > > > > return ret; > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > >
On Tue, 2022-06-21 at 13:54 +0800, CK Hu wrote: > Hi, Rex: > > On Tue, 2022-06-21 at 13:47 +0800, Rex-BC Chen wrote: > > On Tue, 2022-06-21 at 12:08 +0800, CK Hu wrote: > > > Hi, Rex: > > > > > > On Tue, 2022-06-21 at 11:50 +0800, Rex-BC Chen wrote: > > > > On Tue, 2022-06-21 at 11:45 +0800, CK Hu wrote: > > > > > On Tue, 2022-06-21 at 11:11 +0800, Rex-BC Chen wrote: > > > > > > On Tue, 2022-06-21 at 10:55 +0800, CK Hu wrote: > > > > > > > Hi, Bo-Chen: > > > > > > > > > > > > > > On Mon, 2022-06-20 at 20:10 +0800, Bo-Chen Chen wrote: > > > > > > > > We should enable/disable tvd_clk when > > > > > > > > power_on/power_off, > > > > > > > > so > > > > > > > > add > > > > > > > > this > > > > > > > > patch to do this. > > > > > > > > > > > > > > Without this patch, what would happen? > > > > > > > It seems this patch is redundant for these SoCs: > > > > > > > > > > > > > > static const struct of_device_id mtk_dpi_of_ids[] = { > > > > > > > { .compatible = "mediatek,mt2701-dpi", > > > > > > > .data = &mt2701_conf, > > > > > > > }, > > > > > > > { .compatible = "mediatek,mt8173-dpi", > > > > > > > .data = &mt8173_conf, > > > > > > > }, > > > > > > > { .compatible = "mediatek,mt8183-dpi", > > > > > > > .data = &mt8183_conf, > > > > > > > }, > > > > > > > { .compatible = "mediatek,mt8192-dpi", > > > > > > > .data = &mt8192_conf, > > > > > > > }, > > > > > > > { }, > > > > > > > }; > > > > > > > > > > > > > > Regards, > > > > > > > CK > > > > > > > > > > > > > > > > > > > Hello CK, > > > > > > > > > > > > IMO, this is a bug fix patch. From the usage of clock, if > > > > > > we > > > > > > want > > > > > > to > > > > > > use it, we should enable it . Therefore, I think we should > > > > > > add > > > > > > this > > > > > > and > > > > > > I will add a fix tag for this patch. > > > > > > > > > > I think mt8173 chromebook use this driver for HDMI output. So > > > > > mt8173 > > > > > chromebook HDMI could not work normally? > > > > > > > > > > Regards, > > > > > CK > > > > > > > > > > > > > Hmm.. > > > > I am not sure about this. But without this patch, dpi is also > > > > working > > > > in mt8183/mt8192. It may be related to the ccf driver. But > > > > anyway, > > > > I > > > > think we should do this whether ccf driver helps us to enable > > > > this > > > > clock. > > > > > > OK. So, could you help to fix the bug in ccf? If HDMI is disabled > > > but > > > ccf still turn on this clock, the power would be wasted. > > > > > > Regards, > > > CK > > > > > > > I am also testing if we don't have this patch and it also "works" > > (dpintf is working fine). > > do you think we need this patch or just drop this? > > > > For the ccf driver, I am not familiar to ccf and also not a expert > > of > > ccf. > > It just a guest for this. I am not sure whether it's a "bug" or > > just > > a. > > And I think it's not the purpose of this series. If there is any > > issue, > > I think we will fix it in the future. > > Because we have no idea how this works, I think it's better to drop > this patch. > > Regards, > CK > ok, I will drop this patch in next version. BRs, Bo-Chen > > > > BRs, > > Bo-Chen > > > > > > > > > > BRs, > > > > Bo-Chen > > > > > > > > > > > > > > > > BRs, > > > > > > Bo-Chen > > > > > > > > > > > > > > > > > > > > > > > Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> > > > > > > > > --- > > > > > > > > drivers/gpu/drm/mediatek/mtk_dpi.c | 11 ++++++++++- > > > > > > > > 1 file changed, 10 insertions(+), 1 deletion(-) > > > > > > > > > > > > > > > > diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c > > > > > > > > b/drivers/gpu/drm/mediatek/mtk_dpi.c > > > > > > > > index 2717b1741b7a..f83ecb154457 100644 > > > > > > > > --- a/drivers/gpu/drm/mediatek/mtk_dpi.c > > > > > > > > +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c > > > > > > > > @@ -455,6 +455,7 @@ static void > > > > > > > > mtk_dpi_power_off(struct > > > > > > > > mtk_dpi > > > > > > > > *dpi) > > > > > > > > mtk_dpi_disable(dpi); > > > > > > > > clk_disable_unprepare(dpi->pixel_clk); > > > > > > > > clk_disable_unprepare(dpi->engine_clk); > > > > > > > > + clk_disable_unprepare(dpi->tvd_clk); > > > > > > > > } > > > > > > > > > > > > > > > > static int mtk_dpi_power_on(struct mtk_dpi *dpi) > > > > > > > > @@ -464,10 +465,16 @@ static int > > > > > > > > mtk_dpi_power_on(struct > > > > > > > > mtk_dpi > > > > > > > > *dpi) > > > > > > > > if (++dpi->refcount != 1) > > > > > > > > return 0; > > > > > > > > > > > > > > > > + ret = clk_prepare_enable(dpi->tvd_clk); > > > > > > > > + if (ret) { > > > > > > > > + dev_err(dpi->dev, "Failed to enable tvd > > > > > > > > pll: > > > > > > > > %d\n", > > > > > > > > ret); > > > > > > > > + goto err_refcount; > > > > > > > > + } > > > > > > > > + > > > > > > > > ret = clk_prepare_enable(dpi->engine_clk); > > > > > > > > if (ret) { > > > > > > > > dev_err(dpi->dev, "Failed to enable > > > > > > > > engine > > > > > > > > clock: > > > > > > > > %d\n", ret); > > > > > > > > - goto err_refcount; > > > > > > > > + goto err_engine; > > > > > > > > } > > > > > > > > > > > > > > > > ret = clk_prepare_enable(dpi->pixel_clk); > > > > > > > > @@ -484,6 +491,8 @@ static int mtk_dpi_power_on(struct > > > > > > > > mtk_dpi > > > > > > > > *dpi) > > > > > > > > > > > > > > > > err_pixel: > > > > > > > > clk_disable_unprepare(dpi->engine_clk); > > > > > > > > +err_engine: > > > > > > > > + clk_disable_unprepare(dpi->tvd_clk); > > > > > > > > err_refcount: > > > > > > > > dpi->refcount--; > > > > > > > > return ret; > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > >
On Tue, 2022-06-21 at 11:18 +0800, CK Hu wrote: > Hi, Bo-Chen: > > On Mon, 2022-06-20 at 20:10 +0800, Bo-Chen Chen wrote: > > From: Guillaume Ranquet <granquet@baylibre.com> > > > > Enabling the dpi too early causes glitches on screen. > > > > Move the call to mtk_dpi_enable() at the end of the bridge_enable > > callback to ensure everything is setup properly before enabling > > dpi. > > > > Fixes: f89c696e7f63 ("drm/mediatek: mtk_dpi: Convert to bridge > > driver") > > I think this problem happen in the first patch [1]. > > [1] > https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux.git/commit/drivers/gpu/drm/mediatek/mtk_dpi.c?h=mediatek-drm-next&id=9e629c17aa8d7a75b8c1d99ed42892cd8ba7cdc4 > > Regards, > CK > ok, I will fix this. BRs, Bo-Chen > > Signed-off-by: Guillaume Ranquet <granquet@baylibre.com> > > Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> > > --- > > drivers/gpu/drm/mediatek/mtk_dpi.c | 2 +- > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c > > b/drivers/gpu/drm/mediatek/mtk_dpi.c > > index fc76ccad0a82..220e9b18e2cd 100644 > > --- a/drivers/gpu/drm/mediatek/mtk_dpi.c > > +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c > > @@ -486,7 +486,6 @@ static int mtk_dpi_power_on(struct mtk_dpi > > *dpi) > > if (dpi->pinctrl && dpi->pins_dpi) > > pinctrl_select_state(dpi->pinctrl, dpi->pins_dpi); > > > > - mtk_dpi_enable(dpi); > > return 0; > > > > err_pixel: > > @@ -731,6 +730,7 @@ static void mtk_dpi_bridge_enable(struct > > drm_bridge *bridge) > > > > mtk_dpi_power_on(dpi); > > mtk_dpi_set_display_mode(dpi, &dpi->mode); > > + mtk_dpi_enable(dpi); > > } > > > > static enum drm_mode_status > >
On Tue, 2022-06-21 at 11:04 +0800, CK Hu wrote: > Hi, Bo-Chen: > > On Mon, 2022-06-20 at 20:10 +0800, Bo-Chen Chen wrote: > > Dp_intf supports YUV422 as output format. In MT8195 Chrome project, > > YUV422 output format is used for 4K resolution. > > Move this patch before [1]. Otherwise, [1] would result in a bug. > > [1] [v12,10/14] drm/mediatek: dpi: Add dpintf support > ok, I will do this. > > > > Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> > > --- > > drivers/gpu/drm/mediatek/mtk_dpi.c | 5 ++++- > > 1 file changed, 4 insertions(+), 1 deletion(-) > > > > diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c > > b/drivers/gpu/drm/mediatek/mtk_dpi.c > > index f83ecb154457..fc76ccad0a82 100644 > > --- a/drivers/gpu/drm/mediatek/mtk_dpi.c > > +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c > > @@ -692,7 +692,10 @@ static int mtk_dpi_bridge_atomic_check(struct > > drm_bridge *bridge, > > dpi->bit_num = MTK_DPI_OUT_BIT_NUM_8BITS; > > dpi->channel_swap = MTK_DPI_OUT_CHANNEL_SWAP_RGB; > > dpi->yc_map = MTK_DPI_OUT_YC_MAP_RGB; > > - dpi->color_format = MTK_DPI_COLOR_FORMAT_RGB; > > + if (out_bus_format == MEDIA_BUS_FMT_YUYV8_1X16) > > + dpi->color_format = > > MTK_DPI_COLOR_FORMAT_YCBCR_422_FULL; > > + else > > + dpi->color_format = MTK_DPI_COLOR_FORMAT_RGB; > > If out_bus_format is MEDIA_BUS_FMT_YUV8_1X24, the color_format is > MTK_DPI_COLOR_FORMAT_RGB? > I will drop output format of MEDIA_BUS_FMT_YUV8_1X24 for mt8195_dpintf because if support MEDIA_BUS_FMT_YUV8_1X24 means support RGB888. BRs, Bo-Chen > Regards, > CK > > > > > return 0; > > } > >
On Tue, 2022-06-21 at 11:33 +0800, CK Hu wrote: > Hi, Bo-Chen: > > On Mon, 2022-06-20 at 20:10 +0800, Bo-Chen Chen wrote: > > From: Guillaume Ranquet <granquet@baylibre.com> > > > > Matrix selection is a new feature for both dpi and dpintf of > > MT8195. > > Add a mtk_dpi_matrix_sel() helper to update the DPI_MATRIX_SET > > register depending on the color format. > > Describe more about what this do. > this feature is color format transfer. For mt8195, the input format is RGB888 andd output format could be YUV422. do you think I should squash this patch into [v12,12/14] drm/mediatek: dpi: Add YUV422 output support? > > > > Signed-off-by: Guillaume Ranquet <granquet@baylibre.com> > > Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> > > --- > > drivers/gpu/drm/mediatek/mtk_dpi.c | 29 > > +++++++++++++++++++++++++ > > drivers/gpu/drm/mediatek/mtk_dpi_regs.h | 3 +++ > > 2 files changed, 32 insertions(+) > > > > diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c > > b/drivers/gpu/drm/mediatek/mtk_dpi.c > > index 220e9b18e2cd..8a9151cb1622 100644 > > --- a/drivers/gpu/drm/mediatek/mtk_dpi.c > > +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c > > @@ -135,6 +135,7 @@ struct mtk_dpi_conf { > > u32 channel_swap_shift; > > u32 yuv422_en_bit; > > u32 csc_enable_bit; > > + bool matrx_sel_support; > > }; > > > > static void mtk_dpi_mask(struct mtk_dpi *dpi, u32 offset, u32 val, > > u32 mask) > > @@ -398,6 +399,31 @@ static void mtk_dpi_config_disable_edge(struct > > mtk_dpi *dpi) > > mtk_dpi_mask(dpi, dpi->conf->reg_h_fre_con, 0, > > EDGE_SEL_EN); > > } > > > > +static void mtk_dpi_matrix_sel(struct mtk_dpi *dpi, > > + enum mtk_dpi_out_color_format format) > > +{ > > + u32 matrix_sel = 0; > > + > > + if (!dpi->conf->matrx_sel_support) { > > + dev_info(dpi->dev, "matrix_sel is not supported.\n"); > > So for this SoC, there would be something wrong? I still does not > understand what this feature is. > > static const struct of_device_id mtk_dpi_of_ids[] = { > { .compatible = "mediatek,mt2701-dpi", > .data = &mt2701_conf, > }, > { .compatible = "mediatek,mt8173-dpi", > .data = &mt8173_conf, > }, > { .compatible = "mediatek,mt8183-dpi", > .data = &mt8183_conf, > }, > { .compatible = "mediatek,mt8192-dpi", > .data = &mt8192_conf, > }, > { }, > }; > > > + return; > > + } > > + > > + switch (format) { > > + case MTK_DPI_COLOR_FORMAT_YCBCR_422: > > + case MTK_DPI_COLOR_FORMAT_YCBCR_422_FULL: > > + case MTK_DPI_COLOR_FORMAT_YCBCR_444: > > + case MTK_DPI_COLOR_FORMAT_YCBCR_444_FULL: > > + case MTK_DPI_COLOR_FORMAT_XV_YCC: > > + if (dpi->mode.hdisplay <= 720) > > + matrix_sel = 0x2; > > Symbolize 0x2. > > > + break; > > + default: > > If format is MTK_DPI_COLOR_FORMAT_YCBCR_422 first, then format change > to MTK_DPI_COLOR_FORMAT_RGB and matrix_sel would still be 0x2. Is > this > correct? > > Regards, > CK > > > + break; > > + } > > + mtk_dpi_mask(dpi, DPI_MATRIX_SET, matrix_sel, > > INT_MATRIX_SEL_MASK); > > +} > > + > > static void mtk_dpi_config_color_format(struct mtk_dpi *dpi, > > enum mtk_dpi_out_color_format > > format) > > { > > @@ -405,6 +431,7 @@ static void mtk_dpi_config_color_format(struct > > mtk_dpi *dpi, > > (format == MTK_DPI_COLOR_FORMAT_YCBCR_444_FULL)) { > > mtk_dpi_config_yuv422_enable(dpi, false); > > mtk_dpi_config_csc_enable(dpi, true); > > + mtk_dpi_matrix_sel(dpi, format); > > if (dpi->conf->swap_input_support) > > mtk_dpi_config_swap_input(dpi, false); > > mtk_dpi_config_channel_swap(dpi, > > MTK_DPI_OUT_CHANNEL_SWAP_BGR); > > @@ -412,6 +439,7 @@ static void mtk_dpi_config_color_format(struct > > mtk_dpi *dpi, > > (format == MTK_DPI_COLOR_FORMAT_YCBCR_422_FULL)) { > > mtk_dpi_config_yuv422_enable(dpi, true); > > mtk_dpi_config_csc_enable(dpi, true); > > + mtk_dpi_matrix_sel(dpi, format); > > if (dpi->conf->swap_input_support) > > mtk_dpi_config_swap_input(dpi, true); > > else > > @@ -951,6 +979,7 @@ static const struct mtk_dpi_conf > > mt8195_dpintf_conf = { > > .channel_swap_shift = DPINTF_CH_SWAP, > > .yuv422_en_bit = DPINTF_YUV422_EN, > > .csc_enable_bit = DPINTF_CSC_ENABLE, > > + .matrx_sel_support = true, > > }; > > > > static int mtk_dpi_probe(struct platform_device *pdev) > > diff --git a/drivers/gpu/drm/mediatek/mtk_dpi_regs.h > > b/drivers/gpu/drm/mediatek/mtk_dpi_regs.h > > index f7f0272dbd6a..96c117202d0d 100644 > > --- a/drivers/gpu/drm/mediatek/mtk_dpi_regs.h > > +++ b/drivers/gpu/drm/mediatek/mtk_dpi_regs.h > > @@ -230,4 +230,7 @@ > > #define EDGE_SEL_EN BIT(5) > > #define H_FRE_2N BIT(25) > > > > +#define DPI_MATRIX_SET 0xB4 > > +#define INT_MATRIX_SEL_MASK (0x1F << 0) > > + > > #endif /* __MTK_DPI_REGS_H */ > >
On Tue, 2022-06-21 at 10:32 +0800, CK Hu wrote: > Hi, Bo-Chen: > > On Mon, 2022-06-20 at 20:10 +0800, Bo-Chen Chen wrote: > > From: Guillaume Ranquet <granquet@baylibre.com> > > > > dpintf is the displayport interface hardware unit. This unit is > > similar > > to dpi and can reuse most of the code. > > > > This patch adds support for mt8195-dpintf to this dpi driver. Main > > differences are: > > - 4 pixels for one round for dp_intf while dpi is 1 pixel for one > > round. > > Therefore, pixel clock and timing parameter should be divided by > > 4 > > for > > dp_intf. > > - Some features/functional components are not available for dpintf > > which are now excluded from code execution once is_dpintf is > > set. > > The main difference is some parts of hardware design between > > dp_intf > > and dpi. > > - Some register contents differ slightly between the two > > components. > > To > > work around this I added register bits/masks with a DPINTF_ > > prefix > > and use them where different. > > > > Based on a separate driver for dpintf created by > > Jitao shi <jitao.shi@mediatek.com>. > > > > Signed-off-by: Markus Schneider-Pargmann <msp@baylibre.com> > > Signed-off-by: Guillaume Ranquet <granquet@baylibre.com> > > [Bo-Chen: Modify reviewers' comments.] > > Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> > > --- > > drivers/gpu/drm/mediatek/mtk_dpi.c | 65 > > +++++++++++++++++++-- > > drivers/gpu/drm/mediatek/mtk_dpi_regs.h | 13 +++++ > > drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 4 ++ > > drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 1 + > > drivers/gpu/drm/mediatek/mtk_drm_drv.c | 3 + > > 5 files changed, 82 insertions(+), 4 deletions(-) > > > > diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c > > b/drivers/gpu/drm/mediatek/mtk_dpi.c > > index e186870ba3bc..2717b1741b7a 100644 > > --- a/drivers/gpu/drm/mediatek/mtk_dpi.c > > +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c > > @@ -126,6 +126,7 @@ struct mtk_dpi_conf { > > const u32 *output_fmts; > > u32 num_output_fmts; > > bool is_ck_de_pol; > > + bool is_dpintf; > > bool swap_input_support; > > /* Mask used for HWIDTH, HPORCH, VSYNC_WIDTH and VSYNC_PORCH > > (no shift) */ > > u32 dimension_mask; > > @@ -513,6 +514,14 @@ static int mtk_dpi_set_display_mode(struct > > mtk_dpi *dpi, > > pll_rate = clk_get_rate(dpi->tvd_clk); > > > > vm.pixelclock = pll_rate / factor; > > + > > + /* > > + * For dp_intf, we need to divide clock by 4 because it's > > + * 4 pixels for one round while dpi is 1 pixel for one round. > > + */ > > + if (dpi->conf->is_dpintf) > > + vm.pixelclock /= 4; > > I this this should define dpi->conf->round_pixels rather than dpi- > > conf->is_dpintf. ok, I will use this config and drop is_dpintf. > > + > > if ((dpi->output_fmt == MEDIA_BUS_FMT_RGB888_2X12_LE) || > > (dpi->output_fmt == MEDIA_BUS_FMT_RGB888_2X12_BE)) > > clk_set_rate(dpi->pixel_clk, vm.pixelclock * 2); > > @@ -534,6 +543,17 @@ static int mtk_dpi_set_display_mode(struct > > mtk_dpi *dpi, > > hsync.sync_width = vm.hsync_len; > > hsync.back_porch = vm.hback_porch; > > hsync.front_porch = vm.hfront_porch; > > + > > + /* > > + * For dp_intf, we need to divide everything by 4 because it's > > + * 4 pixels for one round while dpi is 1 pixel for one round. > > + */ > > + if (dpi->conf->is_dpintf) { > > + hsync.sync_width = vm.hsync_len / 4; > > + hsync.back_porch = vm.hback_porch / 4; > > + hsync.front_porch = vm.hfront_porch / 4; > > + } > > Ditto. > > > + > > hsync.shift_half_line = false; > > vsync_lodd.sync_width = vm.vsync_len; > > vsync_lodd.back_porch = vm.vback_porch; > > @@ -575,11 +595,16 @@ static int mtk_dpi_set_display_mode(struct > > mtk_dpi *dpi, > > mtk_dpi_config_channel_limit(dpi); > > mtk_dpi_config_bit_num(dpi, dpi->bit_num); > > mtk_dpi_config_channel_swap(dpi, dpi->channel_swap); > > - mtk_dpi_config_yc_map(dpi, dpi->yc_map); > > mtk_dpi_config_color_format(dpi, dpi->color_format); > > - mtk_dpi_config_2n_h_fre(dpi); > > - mtk_dpi_dual_edge(dpi); > > - mtk_dpi_config_disable_edge(dpi); > > + if (dpi->conf->is_dpintf) { > > Separate this to an independent patch and give a better config name > rather than dpi->conf->is_dpintf. > this is separate config. I will modify like this: add new config "input_2pixel" for input two pixels in this patch: mtk_dpi_mask(dpi, DPI_CON, DPINTF_INPUT_2P_EN, DPINTF_INPUT_2P_EN); and create another patch to add config "support_direct_pin" this config is only used for dpi which could be directly connect to pins while dp_intf is not. + if (dpi->conf->support_direct_pin) { + mtk_dpi_config_yc_map(dpi, dpi->yc_map); + mtk_dpi_config_2n_h_fre(dpi); + mtk_dpi_dual_edge(dpi); + mtk_dpi_config_disable_edge(dpi); + } BRs, Bo-Chen > > + mtk_dpi_mask(dpi, DPI_CON, DPINTF_INPUT_2P_EN, > > + DPINTF_INPUT_2P_EN); > > + } else { > > + mtk_dpi_config_yc_map(dpi, dpi->yc_map); > > + mtk_dpi_config_2n_h_fre(dpi); > > + mtk_dpi_dual_edge(dpi); > > + mtk_dpi_config_disable_edge(dpi); > > + } > > mtk_dpi_sw_reset(dpi, false); > > > > return 0; > > @@ -817,6 +842,16 @@ static unsigned int > > mt8183_calculate_factor(int > > clock) > > return 2; > > } > > > > [snip] > > > > > #define EDGE_SEL_EN BIT(5) > > #define H_FRE_2N BIT(25) > > + > > This seems not related to dpintf support. > > Regards, > CK > > > #endif /* __MTK_DPI_REGS_H */ > > > >
Hi, Rex: On Tue, 2022-06-21 at 16:41 +0800, Rex-BC Chen wrote: > On Tue, 2022-06-21 at 11:33 +0800, CK Hu wrote: > > Hi, Bo-Chen: > > > > On Mon, 2022-06-20 at 20:10 +0800, Bo-Chen Chen wrote: > > > From: Guillaume Ranquet <granquet@baylibre.com> > > > > > > Matrix selection is a new feature for both dpi and dpintf of > > > MT8195. > > > Add a mtk_dpi_matrix_sel() helper to update the DPI_MATRIX_SET > > > register depending on the color format. > > > > Describe more about what this do. > > > > this feature is color format transfer. > For mt8195, the input format is RGB888 andd output format could be > YUV422. do you think I should squash this patch into [v12,12/14] > drm/mediatek: dpi: Add YUV422 output support? OK, squash these two patches and add this description into commit message. For RGB input and RGB output, I think this function should be disabled. Regards, CK > > > > > > > Signed-off-by: Guillaume Ranquet <granquet@baylibre.com> > > > Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> > > > --- > > > drivers/gpu/drm/mediatek/mtk_dpi.c | 29 > > > +++++++++++++++++++++++++ > > > drivers/gpu/drm/mediatek/mtk_dpi_regs.h | 3 +++ > > > 2 files changed, 32 insertions(+) > > > > > > diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c > > > b/drivers/gpu/drm/mediatek/mtk_dpi.c > > > index 220e9b18e2cd..8a9151cb1622 100644 > > > --- a/drivers/gpu/drm/mediatek/mtk_dpi.c > > > +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c > > > @@ -135,6 +135,7 @@ struct mtk_dpi_conf { > > > u32 channel_swap_shift; > > > u32 yuv422_en_bit; > > > u32 csc_enable_bit; > > > + bool matrx_sel_support; > > > }; > > > > > > static void mtk_dpi_mask(struct mtk_dpi *dpi, u32 offset, u32 > > > val, > > > u32 mask) > > > @@ -398,6 +399,31 @@ static void > > > mtk_dpi_config_disable_edge(struct > > > mtk_dpi *dpi) > > > mtk_dpi_mask(dpi, dpi->conf->reg_h_fre_con, 0, > > > EDGE_SEL_EN); > > > } > > > > > > +static void mtk_dpi_matrix_sel(struct mtk_dpi *dpi, > > > + enum mtk_dpi_out_color_format format) > > > +{ > > > + u32 matrix_sel = 0; > > > + > > > + if (!dpi->conf->matrx_sel_support) { > > > + dev_info(dpi->dev, "matrix_sel is not supported.\n"); > > > > So for this SoC, there would be something wrong? I still does not > > understand what this feature is. > > > > static const struct of_device_id mtk_dpi_of_ids[] = { > > { .compatible = "mediatek,mt2701-dpi", > > .data = &mt2701_conf, > > }, > > { .compatible = "mediatek,mt8173-dpi", > > .data = &mt8173_conf, > > }, > > { .compatible = "mediatek,mt8183-dpi", > > .data = &mt8183_conf, > > }, > > { .compatible = "mediatek,mt8192-dpi", > > .data = &mt8192_conf, > > }, > > { }, > > }; > > > > > + return; > > > + } > > > + > > > + switch (format) { > > > + case MTK_DPI_COLOR_FORMAT_YCBCR_422: > > > + case MTK_DPI_COLOR_FORMAT_YCBCR_422_FULL: > > > + case MTK_DPI_COLOR_FORMAT_YCBCR_444: > > > + case MTK_DPI_COLOR_FORMAT_YCBCR_444_FULL: > > > + case MTK_DPI_COLOR_FORMAT_XV_YCC: > > > + if (dpi->mode.hdisplay <= 720) > > > + matrix_sel = 0x2; > > > > Symbolize 0x2. > > > > > + break; > > > + default: > > > > If format is MTK_DPI_COLOR_FORMAT_YCBCR_422 first, then format > > change > > to MTK_DPI_COLOR_FORMAT_RGB and matrix_sel would still be 0x2. Is > > this > > correct? > > > > Regards, > > CK > > > > > + break; > > > + } > > > + mtk_dpi_mask(dpi, DPI_MATRIX_SET, matrix_sel, > > > INT_MATRIX_SEL_MASK); > > > +} > > > + > > > static void mtk_dpi_config_color_format(struct mtk_dpi *dpi, > > > enum mtk_dpi_out_color_format > > > format) > > > { > > > @@ -405,6 +431,7 @@ static void > > > mtk_dpi_config_color_format(struct > > > mtk_dpi *dpi, > > > (format == MTK_DPI_COLOR_FORMAT_YCBCR_444_FULL)) { > > > mtk_dpi_config_yuv422_enable(dpi, false); > > > mtk_dpi_config_csc_enable(dpi, true); > > > + mtk_dpi_matrix_sel(dpi, format); > > > if (dpi->conf->swap_input_support) > > > mtk_dpi_config_swap_input(dpi, false); > > > mtk_dpi_config_channel_swap(dpi, > > > MTK_DPI_OUT_CHANNEL_SWAP_BGR); > > > @@ -412,6 +439,7 @@ static void > > > mtk_dpi_config_color_format(struct > > > mtk_dpi *dpi, > > > (format == MTK_DPI_COLOR_FORMAT_YCBCR_422_FULL)) { > > > mtk_dpi_config_yuv422_enable(dpi, true); > > > mtk_dpi_config_csc_enable(dpi, true); > > > + mtk_dpi_matrix_sel(dpi, format); > > > if (dpi->conf->swap_input_support) > > > mtk_dpi_config_swap_input(dpi, true); > > > else > > > @@ -951,6 +979,7 @@ static const struct mtk_dpi_conf > > > mt8195_dpintf_conf = { > > > .channel_swap_shift = DPINTF_CH_SWAP, > > > .yuv422_en_bit = DPINTF_YUV422_EN, > > > .csc_enable_bit = DPINTF_CSC_ENABLE, > > > + .matrx_sel_support = true, > > > }; > > > > > > static int mtk_dpi_probe(struct platform_device *pdev) > > > diff --git a/drivers/gpu/drm/mediatek/mtk_dpi_regs.h > > > b/drivers/gpu/drm/mediatek/mtk_dpi_regs.h > > > index f7f0272dbd6a..96c117202d0d 100644 > > > --- a/drivers/gpu/drm/mediatek/mtk_dpi_regs.h > > > +++ b/drivers/gpu/drm/mediatek/mtk_dpi_regs.h > > > @@ -230,4 +230,7 @@ > > > #define EDGE_SEL_EN BIT(5) > > > #define H_FRE_2N BIT(25) > > > > > > +#define DPI_MATRIX_SET 0xB4 > > > +#define INT_MATRIX_SEL_MASK (0x1F << 0) > > > + > > > #endif /* __MTK_DPI_REGS_H */ > > > > > >