Message ID | 20220506080056.84313-1-haochen.jiang@intel.com |
---|---|
State | New |
Headers | show |
Series | [i386] Add combine splitter to transform pxor/pcmpeqb/pmovmskb/cmp 0xffff to ptest. | expand |
> +(define_split > + [(set (reg:CCZ FLAGS_REG) > + (compare:CCZ (unspec:SI > + [(eq:VI1_AVX2 > + (match_operand:VI1_AVX2 0 "vector_operand") > + (match_operand:VI1_AVX2 1 "const0_operand"))] > + UNSPEC_MOVMSK) > + (match_operand 2 "const_int_operand")))] > + "TARGET_SSE4_1 && ix86_match_ccmode (insn, CCmode) It looks like set_src and set_dst are all CCZmode, do we really need ix86_match_ccmode? > + && (INTVAL (operands[2]) == (int) (<vi1avx2const>))" I think (int) convert is not needed for const, and INTVAL actually returns HOST_WIDE_INT > +#include <stdbool.h> > + > +bool is_zero(__m128i x) bool is not necessary here, we can use int and drop stdbool. Haochen Jiang via Gcc-patches <gcc-patches@gcc.gnu.org> 于2022年5月6日周五 16:01写道: > > Hi all, > > This patch aims to add a combine splitter to transform pxor/pcmpeqb/pmovmskb/cmp 0xffff to ptest. > > Regtested on x86_64-pc-linux-gnu. Ok for trunk? > > BRs, > Haochen > > gcc/ChangeLog: > > PR target/104371 > * config/i386/sse.md: Add new define_mode_attr and define_split. > > gcc/testsuite/ChangeLog: > > PR target/104371 > * gcc.target/i386/pr104371-1.c: New test. > * gcc.target/i386/pr104371-2.c: Ditto. > --- > gcc/config/i386/sse.md | 19 +++++++++++++++++++ > gcc/testsuite/gcc.target/i386/pr104371-1.c | 14 ++++++++++++++ > gcc/testsuite/gcc.target/i386/pr104371-2.c | 14 ++++++++++++++ > 3 files changed, 47 insertions(+) > create mode 100644 gcc/testsuite/gcc.target/i386/pr104371-1.c > create mode 100755 gcc/testsuite/gcc.target/i386/pr104371-2.c > > diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md > index 7b791def542..71afda73c8f 100644 > --- a/gcc/config/i386/sse.md > +++ b/gcc/config/i386/sse.md > @@ -20083,6 +20083,25 @@ > (set_attr "prefix" "maybe_vex") > (set_attr "mode" "SI")]) > > +;; Optimize pxor/pcmpeqb/pmovmskb/cmp 0xffff to ptest. > +(define_mode_attr vi1avx2const > + [(V32QI "0xffffffff") (V16QI "0xffff")]) > + > +(define_split > + [(set (reg:CCZ FLAGS_REG) > + (compare:CCZ (unspec:SI > + [(eq:VI1_AVX2 > + (match_operand:VI1_AVX2 0 "vector_operand") > + (match_operand:VI1_AVX2 1 "const0_operand"))] > + UNSPEC_MOVMSK) > + (match_operand 2 "const_int_operand")))] > + "TARGET_SSE4_1 && ix86_match_ccmode (insn, CCmode) > + && (INTVAL (operands[2]) == (int) (<vi1avx2const>))" > + [(set (reg:CC FLAGS_REG) > + (unspec:CC [(match_dup 0) > + (match_dup 0)] > + UNSPEC_PTEST))]) > + > (define_expand "sse2_maskmovdqu" > [(set (match_operand:V16QI 0 "memory_operand") > (unspec:V16QI [(match_operand:V16QI 1 "register_operand") > diff --git a/gcc/testsuite/gcc.target/i386/pr104371-1.c b/gcc/testsuite/gcc.target/i386/pr104371-1.c > new file mode 100644 > index 00000000000..df7c0b074e3 > --- /dev/null > +++ b/gcc/testsuite/gcc.target/i386/pr104371-1.c > @@ -0,0 +1,14 @@ > +/* { dg-do compile } */ > +/* { dg-options "-O2 -msse4" } */ > +/* { dg-final { scan-assembler "ptest\[ \\t\]" } } */ > +/* { dg-final { scan-assembler-not "pxor\[ \\t\]" } } */ > +/* { dg-final { scan-assembler-not "pcmpeqb\[ \\t\]" } } */ > +/* { dg-final { scan-assembler-not "pmovmskb\[ \\t\]" } } */ > + > +#include <smmintrin.h> > +#include <stdbool.h> > + > +bool is_zero(__m128i x) > +{ > + return _mm_movemask_epi8(_mm_cmpeq_epi8(x, _mm_setzero_si128())) == 0xffff; > +} > diff --git a/gcc/testsuite/gcc.target/i386/pr104371-2.c b/gcc/testsuite/gcc.target/i386/pr104371-2.c > new file mode 100755 > index 00000000000..f0d0afd5897 > --- /dev/null > +++ b/gcc/testsuite/gcc.target/i386/pr104371-2.c > @@ -0,0 +1,14 @@ > +/* { dg-do compile } */ > +/* { dg-options "-O2 -mavx2" } */ > +/* { dg-final { scan-assembler "vptest\[ \\t\]" } } */ > +/* { dg-final { scan-assembler-not "vpxor\[ \\t\]" } } */ > +/* { dg-final { scan-assembler-not "vpcmpeqb\[ \\t\]" } } */ > +/* { dg-final { scan-assembler-not "vpmovmskb\[ \\t\]" } } */ > + > +#include <immintrin.h> > +#include <stdbool.h> > + > +bool is_zero256(__m256i x) > +{ > + return _mm256_movemask_epi8(_mm256_cmpeq_epi8(x, _mm256_setzero_si256())) == 0xffffffff; > +} > -- > 2.18.1 >
On Fri, May 6, 2022 at 10:01 AM Haochen Jiang <haochen.jiang@intel.com> wrote: > > Hi all, > > This patch aims to add a combine splitter to transform pxor/pcmpeqb/pmovmskb/cmp 0xffff to ptest. > > Regtested on x86_64-pc-linux-gnu. Ok for trunk? > > BRs, > Haochen > > gcc/ChangeLog: > > PR target/104371 > * config/i386/sse.md: Add new define_mode_attr and define_split. > > gcc/testsuite/ChangeLog: > > PR target/104371 > * gcc.target/i386/pr104371-1.c: New test. > * gcc.target/i386/pr104371-2.c: Ditto. > --- > gcc/config/i386/sse.md | 19 +++++++++++++++++++ > gcc/testsuite/gcc.target/i386/pr104371-1.c | 14 ++++++++++++++ > gcc/testsuite/gcc.target/i386/pr104371-2.c | 14 ++++++++++++++ > 3 files changed, 47 insertions(+) > create mode 100644 gcc/testsuite/gcc.target/i386/pr104371-1.c > create mode 100755 gcc/testsuite/gcc.target/i386/pr104371-2.c > > diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md > index 7b791def542..71afda73c8f 100644 > --- a/gcc/config/i386/sse.md > +++ b/gcc/config/i386/sse.md > @@ -20083,6 +20083,25 @@ > (set_attr "prefix" "maybe_vex") > (set_attr "mode" "SI")]) > > +;; Optimize pxor/pcmpeqb/pmovmskb/cmp 0xffff to ptest. > +(define_mode_attr vi1avx2const > + [(V32QI "0xffffffff") (V16QI "0xffff")]) > + > +(define_split > + [(set (reg:CCZ FLAGS_REG) > + (compare:CCZ (unspec:SI > + [(eq:VI1_AVX2 > + (match_operand:VI1_AVX2 0 "vector_operand") > + (match_operand:VI1_AVX2 1 "const0_operand"))] > + UNSPEC_MOVMSK) > + (match_operand 2 "const_int_operand")))] > + "TARGET_SSE4_1 && ix86_match_ccmode (insn, CCmode) No need to use ix86_match_ccmode here, the pattern is already limited to CCZmode, Uros. > + && (INTVAL (operands[2]) == (int) (<vi1avx2const>))" > + [(set (reg:CC FLAGS_REG) > + (unspec:CC [(match_dup 0) > + (match_dup 0)] > + UNSPEC_PTEST))]) > + > (define_expand "sse2_maskmovdqu" > [(set (match_operand:V16QI 0 "memory_operand") > (unspec:V16QI [(match_operand:V16QI 1 "register_operand") > diff --git a/gcc/testsuite/gcc.target/i386/pr104371-1.c b/gcc/testsuite/gcc.target/i386/pr104371-1.c > new file mode 100644 > index 00000000000..df7c0b074e3 > --- /dev/null > +++ b/gcc/testsuite/gcc.target/i386/pr104371-1.c > @@ -0,0 +1,14 @@ > +/* { dg-do compile } */ > +/* { dg-options "-O2 -msse4" } */ > +/* { dg-final { scan-assembler "ptest\[ \\t\]" } } */ > +/* { dg-final { scan-assembler-not "pxor\[ \\t\]" } } */ > +/* { dg-final { scan-assembler-not "pcmpeqb\[ \\t\]" } } */ > +/* { dg-final { scan-assembler-not "pmovmskb\[ \\t\]" } } */ > + > +#include <smmintrin.h> > +#include <stdbool.h> > + > +bool is_zero(__m128i x) > +{ > + return _mm_movemask_epi8(_mm_cmpeq_epi8(x, _mm_setzero_si128())) == 0xffff; > +} > diff --git a/gcc/testsuite/gcc.target/i386/pr104371-2.c b/gcc/testsuite/gcc.target/i386/pr104371-2.c > new file mode 100755 > index 00000000000..f0d0afd5897 > --- /dev/null > +++ b/gcc/testsuite/gcc.target/i386/pr104371-2.c > @@ -0,0 +1,14 @@ > +/* { dg-do compile } */ > +/* { dg-options "-O2 -mavx2" } */ > +/* { dg-final { scan-assembler "vptest\[ \\t\]" } } */ > +/* { dg-final { scan-assembler-not "vpxor\[ \\t\]" } } */ > +/* { dg-final { scan-assembler-not "vpcmpeqb\[ \\t\]" } } */ > +/* { dg-final { scan-assembler-not "vpmovmskb\[ \\t\]" } } */ > + > +#include <immintrin.h> > +#include <stdbool.h> > + > +bool is_zero256(__m256i x) > +{ > + return _mm256_movemask_epi8(_mm256_cmpeq_epi8(x, _mm256_setzero_si256())) == 0xffffffff; > +} > -- > 2.18.1 >
> -----Original Message----- > From: Hongyu Wang <wwwhhhyyy333@gmail.com> > Sent: Friday, May 6, 2022 4:50 PM > To: Jiang, Haochen <haochen.jiang@intel.com> > Cc: GCC Patches <gcc-patches@gcc.gnu.org>; Liu, Hongtao > <hongtao.liu@intel.com> > Subject: Re: [PATCH] [i386]Add combine splitter to transform > pxor/pcmpeqb/pmovmskb/cmp 0xffff to ptest. > > > +(define_split > > + [(set (reg:CCZ FLAGS_REG) > > + (compare:CCZ (unspec:SI > > + [(eq:VI1_AVX2 > > + (match_operand:VI1_AVX2 0 "vector_operand") > > + (match_operand:VI1_AVX2 1 "const0_operand"))] > > + UNSPEC_MOVMSK) > > + (match_operand 2 "const_int_operand")))] > > + "TARGET_SSE4_1 && ix86_match_ccmode (insn, CCmode) > > It looks like set_src and set_dst are all CCZmode, do we really need > ix86_match_ccmode? > > > + && (INTVAL (operands[2]) == (int) (<vi1avx2const>))" > > I think (int) convert is not needed for const, and INTVAL actually > returns HOST_WIDE_INT It should be int convert here, because we need 0xfffffff become -1 in this compare. Haochen. > > > +#include <stdbool.h> > > + > > +bool is_zero(__m128i x) > > bool is not necessary here, we can use int and drop stdbool. > > Haochen Jiang via Gcc-patches <gcc-patches@gcc.gnu.org> 于2022年5月6 > 日周五 16:01写道: > > > > Hi all, > > > > This patch aims to add a combine splitter to transform > pxor/pcmpeqb/pmovmskb/cmp 0xffff to ptest. > > > > Regtested on x86_64-pc-linux-gnu. Ok for trunk? > > > > BRs, > > Haochen > > > > gcc/ChangeLog: > > > > PR target/104371 > > * config/i386/sse.md: Add new define_mode_attr and define_split. > > > > gcc/testsuite/ChangeLog: > > > > PR target/104371 > > * gcc.target/i386/pr104371-1.c: New test. > > * gcc.target/i386/pr104371-2.c: Ditto. > > --- > > gcc/config/i386/sse.md | 19 +++++++++++++++++++ > > gcc/testsuite/gcc.target/i386/pr104371-1.c | 14 ++++++++++++++ > > gcc/testsuite/gcc.target/i386/pr104371-2.c | 14 ++++++++++++++ > > 3 files changed, 47 insertions(+) > > create mode 100644 gcc/testsuite/gcc.target/i386/pr104371-1.c > > create mode 100755 gcc/testsuite/gcc.target/i386/pr104371-2.c > > > > diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md > > index 7b791def542..71afda73c8f 100644 > > --- a/gcc/config/i386/sse.md > > +++ b/gcc/config/i386/sse.md > > @@ -20083,6 +20083,25 @@ > > (set_attr "prefix" "maybe_vex") > > (set_attr "mode" "SI")]) > > > > +;; Optimize pxor/pcmpeqb/pmovmskb/cmp 0xffff to ptest. > > +(define_mode_attr vi1avx2const > > + [(V32QI "0xffffffff") (V16QI "0xffff")]) > > + > > +(define_split > > + [(set (reg:CCZ FLAGS_REG) > > + (compare:CCZ (unspec:SI > > + [(eq:VI1_AVX2 > > + (match_operand:VI1_AVX2 0 "vector_operand") > > + (match_operand:VI1_AVX2 1 "const0_operand"))] > > + UNSPEC_MOVMSK) > > + (match_operand 2 "const_int_operand")))] > > + "TARGET_SSE4_1 && ix86_match_ccmode (insn, CCmode) > > + && (INTVAL (operands[2]) == (int) (<vi1avx2const>))" > > + [(set (reg:CC FLAGS_REG) > > + (unspec:CC [(match_dup 0) > > + (match_dup 0)] > > + UNSPEC_PTEST))]) > > + > > (define_expand "sse2_maskmovdqu" > > [(set (match_operand:V16QI 0 "memory_operand") > > (unspec:V16QI [(match_operand:V16QI 1 "register_operand") > > diff --git a/gcc/testsuite/gcc.target/i386/pr104371-1.c > b/gcc/testsuite/gcc.target/i386/pr104371-1.c > > new file mode 100644 > > index 00000000000..df7c0b074e3 > > --- /dev/null > > +++ b/gcc/testsuite/gcc.target/i386/pr104371-1.c > > @@ -0,0 +1,14 @@ > > +/* { dg-do compile } */ > > +/* { dg-options "-O2 -msse4" } */ > > +/* { dg-final { scan-assembler "ptest\[ \\t\]" } } */ > > +/* { dg-final { scan-assembler-not "pxor\[ \\t\]" } } */ > > +/* { dg-final { scan-assembler-not "pcmpeqb\[ \\t\]" } } */ > > +/* { dg-final { scan-assembler-not "pmovmskb\[ \\t\]" } } */ > > + > > +#include <smmintrin.h> > > +#include <stdbool.h> > > + > > +bool is_zero(__m128i x) > > +{ > > + return _mm_movemask_epi8(_mm_cmpeq_epi8(x, _mm_setzero_si128())) > == 0xffff; > > +} > > diff --git a/gcc/testsuite/gcc.target/i386/pr104371-2.c > b/gcc/testsuite/gcc.target/i386/pr104371-2.c > > new file mode 100755 > > index 00000000000..f0d0afd5897 > > --- /dev/null > > +++ b/gcc/testsuite/gcc.target/i386/pr104371-2.c > > @@ -0,0 +1,14 @@ > > +/* { dg-do compile } */ > > +/* { dg-options "-O2 -mavx2" } */ > > +/* { dg-final { scan-assembler "vptest\[ \\t\]" } } */ > > +/* { dg-final { scan-assembler-not "vpxor\[ \\t\]" } } */ > > +/* { dg-final { scan-assembler-not "vpcmpeqb\[ \\t\]" } } */ > > +/* { dg-final { scan-assembler-not "vpmovmskb\[ \\t\]" } } */ > > + > > +#include <immintrin.h> > > +#include <stdbool.h> > > + > > +bool is_zero256(__m256i x) > > +{ > > + return _mm256_movemask_epi8(_mm256_cmpeq_epi8(x, > _mm256_setzero_si256())) == 0xffffffff; > > +} > > -- > > 2.18.1 > >
> -----Original Message----- > From: Uros Bizjak <ubizjak@gmail.com> > Sent: Friday, May 6, 2022 4:59 PM > To: Jiang, Haochen <haochen.jiang@intel.com> > Cc: gcc-patches@gcc.gnu.org; Liu, Hongtao <hongtao.liu@intel.com> > Subject: Re: [PATCH] [i386]Add combine splitter to transform > pxor/pcmpeqb/pmovmskb/cmp 0xffff to ptest. > > On Fri, May 6, 2022 at 10:01 AM Haochen Jiang <haochen.jiang@intel.com> > wrote: > > > > Hi all, > > > > This patch aims to add a combine splitter to transform pxor/pcmpeqb/pmovmskb/cmp 0xffff to ptest. > > > > Regtested on x86_64-pc-linux-gnu. Ok for trunk? > > > > BRs, > > Haochen > > > > gcc/ChangeLog: > > > > PR target/104371 > > * config/i386/sse.md: Add new define_mode_attr and define_split. > > > > gcc/testsuite/ChangeLog: > > > > PR target/104371 > > * gcc.target/i386/pr104371-1.c: New test. > > * gcc.target/i386/pr104371-2.c: Ditto. > > --- > > gcc/config/i386/sse.md | 19 +++++++++++++++++++ > > gcc/testsuite/gcc.target/i386/pr104371-1.c | 14 ++++++++++++++ > > gcc/testsuite/gcc.target/i386/pr104371-2.c | 14 ++++++++++++++ > > 3 files changed, 47 insertions(+) > > create mode 100644 gcc/testsuite/gcc.target/i386/pr104371-1.c > > create mode 100755 gcc/testsuite/gcc.target/i386/pr104371-2.c > > > > diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index > > 7b791def542..71afda73c8f 100644 > > --- a/gcc/config/i386/sse.md > > +++ b/gcc/config/i386/sse.md > > @@ -20083,6 +20083,25 @@ > > (set_attr "prefix" "maybe_vex") > > (set_attr "mode" "SI")]) > > > > +;; Optimize pxor/pcmpeqb/pmovmskb/cmp 0xffff to ptest. > > +(define_mode_attr vi1avx2const > > + [(V32QI "0xffffffff") (V16QI "0xffff")]) > > + > > +(define_split > > + [(set (reg:CCZ FLAGS_REG) > > + (compare:CCZ (unspec:SI > > + [(eq:VI1_AVX2 > > + (match_operand:VI1_AVX2 0 "vector_operand") > > + (match_operand:VI1_AVX2 1 "const0_operand"))] > > + UNSPEC_MOVMSK) > > + (match_operand 2 "const_int_operand")))] > > + "TARGET_SSE4_1 && ix86_match_ccmode (insn, CCmode) > > No need to use ix86_match_ccmode here, the pattern is already limited to > CCZmode, > > Uros. > Removed this condition in my new patch, also make the testcase change according to Hongyu's review. Is the patch Ok for trunk? Haochen > > + && (INTVAL (operands[2]) == (int) (<vi1avx2const>))" > > + [(set (reg:CC FLAGS_REG) > > + (unspec:CC [(match_dup 0) > > + (match_dup 0)] > > + UNSPEC_PTEST))]) > > + > > (define_expand "sse2_maskmovdqu" > > [(set (match_operand:V16QI 0 "memory_operand") > > (unspec:V16QI [(match_operand:V16QI 1 "register_operand") diff > > --git a/gcc/testsuite/gcc.target/i386/pr104371-1.c > > b/gcc/testsuite/gcc.target/i386/pr104371-1.c > > new file mode 100644 > > index 00000000000..df7c0b074e3 > > --- /dev/null > > +++ b/gcc/testsuite/gcc.target/i386/pr104371-1.c > > @@ -0,0 +1,14 @@ > > +/* { dg-do compile } */ > > +/* { dg-options "-O2 -msse4" } */ > > +/* { dg-final { scan-assembler "ptest\[ \\t\]" } } */ > > +/* { dg-final { scan-assembler-not "pxor\[ \\t\]" } } */ > > +/* { dg-final { scan-assembler-not "pcmpeqb\[ \\t\]" } } */ > > +/* { dg-final { scan-assembler-not "pmovmskb\[ \\t\]" } } */ > > + > > +#include <smmintrin.h> > > +#include <stdbool.h> > > + > > +bool is_zero(__m128i x) > > +{ > > + return _mm_movemask_epi8(_mm_cmpeq_epi8(x, _mm_setzero_si128())) > == > > +0xffff; } > > diff --git a/gcc/testsuite/gcc.target/i386/pr104371-2.c > > b/gcc/testsuite/gcc.target/i386/pr104371-2.c > > new file mode 100755 > > index 00000000000..f0d0afd5897 > > --- /dev/null > > +++ b/gcc/testsuite/gcc.target/i386/pr104371-2.c > > @@ -0,0 +1,14 @@ > > +/* { dg-do compile } */ > > +/* { dg-options "-O2 -mavx2" } */ > > +/* { dg-final { scan-assembler "vptest\[ \\t\]" } } */ > > +/* { dg-final { scan-assembler-not "vpxor\[ \\t\]" } } */ > > +/* { dg-final { scan-assembler-not "vpcmpeqb\[ \\t\]" } } */ > > +/* { dg-final { scan-assembler-not "vpmovmskb\[ \\t\]" } } */ > > + > > +#include <immintrin.h> > > +#include <stdbool.h> > > + > > +bool is_zero256(__m256i x) > > +{ > > + return _mm256_movemask_epi8(_mm256_cmpeq_epi8(x, > > +_mm256_setzero_si256())) == 0xffffffff; } > > -- > > 2.18.1 > >
Hi all, I just refined this patch with more explanation in commit message. No code change compare to last change, which removed ix86_match_ccmode. Ok for trunk? BRs, Haochen > -----Original Message----- > From: Jiang, Haochen > Sent: Saturday, May 7, 2022 9:55 AM > To: Uros Bizjak <ubizjak@gmail.com> > Cc: gcc-patches@gcc.gnu.org; Liu, Hongtao <Hongtao.Liu@intel.com> > Subject: RE: [PATCH] [i386]Add combine splitter to transform > pxor/pcmpeqb/pmovmskb/cmp 0xffff to ptest. > > > > > -----Original Message----- > > From: Uros Bizjak <ubizjak@gmail.com> > > Sent: Friday, May 6, 2022 4:59 PM > > To: Jiang, Haochen <haochen.jiang@intel.com> > > Cc: gcc-patches@gcc.gnu.org; Liu, Hongtao <hongtao.liu@intel.com> > > Subject: Re: [PATCH] [i386]Add combine splitter to transform > > pxor/pcmpeqb/pmovmskb/cmp 0xffff to ptest. > > > > On Fri, May 6, 2022 at 10:01 AM Haochen Jiang <haochen.jiang@intel.com> > > wrote: > > > > > > Hi all, > > > > > > This patch aims to add a combine splitter to transform > pxor/pcmpeqb/pmovmskb/cmp 0xffff to ptest. > > > > > > Regtested on x86_64-pc-linux-gnu. Ok for trunk? > > > > > > BRs, > > > Haochen > > > > > > gcc/ChangeLog: > > > > > > PR target/104371 > > > * config/i386/sse.md: Add new define_mode_attr and define_split. > > > > > > gcc/testsuite/ChangeLog: > > > > > > PR target/104371 > > > * gcc.target/i386/pr104371-1.c: New test. > > > * gcc.target/i386/pr104371-2.c: Ditto. > > > --- > > > gcc/config/i386/sse.md | 19 +++++++++++++++++++ > > > gcc/testsuite/gcc.target/i386/pr104371-1.c | 14 ++++++++++++++ > > > gcc/testsuite/gcc.target/i386/pr104371-2.c | 14 ++++++++++++++ > > > 3 files changed, 47 insertions(+) > > > create mode 100644 gcc/testsuite/gcc.target/i386/pr104371-1.c > > > create mode 100755 gcc/testsuite/gcc.target/i386/pr104371-2.c > > > > > > diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index > > > 7b791def542..71afda73c8f 100644 > > > --- a/gcc/config/i386/sse.md > > > +++ b/gcc/config/i386/sse.md > > > @@ -20083,6 +20083,25 @@ > > > (set_attr "prefix" "maybe_vex") > > > (set_attr "mode" "SI")]) > > > > > > +;; Optimize pxor/pcmpeqb/pmovmskb/cmp 0xffff to ptest. > > > +(define_mode_attr vi1avx2const > > > + [(V32QI "0xffffffff") (V16QI "0xffff")]) > > > + > > > +(define_split > > > + [(set (reg:CCZ FLAGS_REG) > > > + (compare:CCZ (unspec:SI > > > + [(eq:VI1_AVX2 > > > + (match_operand:VI1_AVX2 0 "vector_operand") > > > + (match_operand:VI1_AVX2 1 "const0_operand"))] > > > + UNSPEC_MOVMSK) > > > + (match_operand 2 "const_int_operand")))] > > > + "TARGET_SSE4_1 && ix86_match_ccmode (insn, CCmode) > > > > No need to use ix86_match_ccmode here, the pattern is already limited to > > CCZmode, > > > > Uros. > > > > Removed this condition in my new patch, also make the testcase change > according to > Hongyu's review. > > Is the patch Ok for trunk? > > Haochen > > > > + && (INTVAL (operands[2]) == (int) (<vi1avx2const>))" > > > + [(set (reg:CC FLAGS_REG) > > > + (unspec:CC [(match_dup 0) > > > + (match_dup 0)] > > > + UNSPEC_PTEST))]) > > > + > > > (define_expand "sse2_maskmovdqu" > > > [(set (match_operand:V16QI 0 "memory_operand") > > > (unspec:V16QI [(match_operand:V16QI 1 "register_operand") diff > > > --git a/gcc/testsuite/gcc.target/i386/pr104371-1.c > > > b/gcc/testsuite/gcc.target/i386/pr104371-1.c > > > new file mode 100644 > > > index 00000000000..df7c0b074e3 > > > --- /dev/null > > > +++ b/gcc/testsuite/gcc.target/i386/pr104371-1.c > > > @@ -0,0 +1,14 @@ > > > +/* { dg-do compile } */ > > > +/* { dg-options "-O2 -msse4" } */ > > > +/* { dg-final { scan-assembler "ptest\[ \\t\]" } } */ > > > +/* { dg-final { scan-assembler-not "pxor\[ \\t\]" } } */ > > > +/* { dg-final { scan-assembler-not "pcmpeqb\[ \\t\]" } } */ > > > +/* { dg-final { scan-assembler-not "pmovmskb\[ \\t\]" } } */ > > > + > > > +#include <smmintrin.h> > > > +#include <stdbool.h> > > > + > > > +bool is_zero(__m128i x) > > > +{ > > > + return _mm_movemask_epi8(_mm_cmpeq_epi8(x, _mm_setzero_si128())) > > == > > > +0xffff; } > > > diff --git a/gcc/testsuite/gcc.target/i386/pr104371-2.c > > > b/gcc/testsuite/gcc.target/i386/pr104371-2.c > > > new file mode 100755 > > > index 00000000000..f0d0afd5897 > > > --- /dev/null > > > +++ b/gcc/testsuite/gcc.target/i386/pr104371-2.c > > > @@ -0,0 +1,14 @@ > > > +/* { dg-do compile } */ > > > +/* { dg-options "-O2 -mavx2" } */ > > > +/* { dg-final { scan-assembler "vptest\[ \\t\]" } } */ > > > +/* { dg-final { scan-assembler-not "vpxor\[ \\t\]" } } */ > > > +/* { dg-final { scan-assembler-not "vpcmpeqb\[ \\t\]" } } */ > > > +/* { dg-final { scan-assembler-not "vpmovmskb\[ \\t\]" } } */ > > > + > > > +#include <immintrin.h> > > > +#include <stdbool.h> > > > + > > > +bool is_zero256(__m256i x) > > > +{ > > > + return _mm256_movemask_epi8(_mm256_cmpeq_epi8(x, > > > +_mm256_setzero_si256())) == 0xffffffff; } > > > -- > > > 2.18.1 > > >
On Thu, May 12, 2022 at 5:01 AM Jiang, Haochen <haochen.jiang@intel.com> wrote: > > Hi all, > > I just refined this patch with more explanation in commit message. The ChangeLog entry should in fact read as: PR target/104371 * config/i386/sse.md (vi1avx2const): New define_mode_attr. (pxor/pcmpeqb/pmovmskb/cmp 0xffff to ptest splitter): New define_split pattern. Please see [1]. [1] https://www.gnu.org/prep/standards/html_node/Change-Logs.html#Change-Logs OK with the fixed ChangeLog. Uros. > No code change compare to last change, which removed ix86_match_ccmode. > > Ok for trunk? > > BRs, > Haochen > > > -----Original Message----- > > From: Jiang, Haochen > > Sent: Saturday, May 7, 2022 9:55 AM > > To: Uros Bizjak <ubizjak@gmail.com> > > Cc: gcc-patches@gcc.gnu.org; Liu, Hongtao <Hongtao.Liu@intel.com> > > Subject: RE: [PATCH] [i386]Add combine splitter to transform > > pxor/pcmpeqb/pmovmskb/cmp 0xffff to ptest. > > > > > > > > > -----Original Message----- > > > From: Uros Bizjak <ubizjak@gmail.com> > > > Sent: Friday, May 6, 2022 4:59 PM > > > To: Jiang, Haochen <haochen.jiang@intel.com> > > > Cc: gcc-patches@gcc.gnu.org; Liu, Hongtao <hongtao.liu@intel.com> > > > Subject: Re: [PATCH] [i386]Add combine splitter to transform > > > pxor/pcmpeqb/pmovmskb/cmp 0xffff to ptest. > > > > > > On Fri, May 6, 2022 at 10:01 AM Haochen Jiang <haochen.jiang@intel.com> > > > wrote: > > > > > > > > Hi all, > > > > > > > > This patch aims to add a combine splitter to transform > > pxor/pcmpeqb/pmovmskb/cmp 0xffff to ptest. > > > > > > > > Regtested on x86_64-pc-linux-gnu. Ok for trunk? > > > > > > > > BRs, > > > > Haochen > > > > > > > > gcc/ChangeLog: > > > > > > > > PR target/104371 > > > > * config/i386/sse.md: Add new define_mode_attr and define_split. > > > > > > > > gcc/testsuite/ChangeLog: > > > > > > > > PR target/104371 > > > > * gcc.target/i386/pr104371-1.c: New test. > > > > * gcc.target/i386/pr104371-2.c: Ditto. > > > > --- > > > > gcc/config/i386/sse.md | 19 +++++++++++++++++++ > > > > gcc/testsuite/gcc.target/i386/pr104371-1.c | 14 ++++++++++++++ > > > > gcc/testsuite/gcc.target/i386/pr104371-2.c | 14 ++++++++++++++ > > > > 3 files changed, 47 insertions(+) > > > > create mode 100644 gcc/testsuite/gcc.target/i386/pr104371-1.c > > > > create mode 100755 gcc/testsuite/gcc.target/i386/pr104371-2.c > > > > > > > > diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index > > > > 7b791def542..71afda73c8f 100644 > > > > --- a/gcc/config/i386/sse.md > > > > +++ b/gcc/config/i386/sse.md > > > > @@ -20083,6 +20083,25 @@ > > > > (set_attr "prefix" "maybe_vex") > > > > (set_attr "mode" "SI")]) > > > > > > > > +;; Optimize pxor/pcmpeqb/pmovmskb/cmp 0xffff to ptest. > > > > +(define_mode_attr vi1avx2const > > > > + [(V32QI "0xffffffff") (V16QI "0xffff")]) > > > > + > > > > +(define_split > > > > + [(set (reg:CCZ FLAGS_REG) > > > > + (compare:CCZ (unspec:SI > > > > + [(eq:VI1_AVX2 > > > > + (match_operand:VI1_AVX2 0 "vector_operand") > > > > + (match_operand:VI1_AVX2 1 "const0_operand"))] > > > > + UNSPEC_MOVMSK) > > > > + (match_operand 2 "const_int_operand")))] > > > > + "TARGET_SSE4_1 && ix86_match_ccmode (insn, CCmode) > > > > > > No need to use ix86_match_ccmode here, the pattern is already limited to > > > CCZmode, > > > > > > Uros. > > > > > > > Removed this condition in my new patch, also make the testcase change > > according to > > Hongyu's review. > > > > Is the patch Ok for trunk? > > > > Haochen > > > > > > + && (INTVAL (operands[2]) == (int) (<vi1avx2const>))" > > > > + [(set (reg:CC FLAGS_REG) > > > > + (unspec:CC [(match_dup 0) > > > > + (match_dup 0)] > > > > + UNSPEC_PTEST))]) > > > > + > > > > (define_expand "sse2_maskmovdqu" > > > > [(set (match_operand:V16QI 0 "memory_operand") > > > > (unspec:V16QI [(match_operand:V16QI 1 "register_operand") diff > > > > --git a/gcc/testsuite/gcc.target/i386/pr104371-1.c > > > > b/gcc/testsuite/gcc.target/i386/pr104371-1.c > > > > new file mode 100644 > > > > index 00000000000..df7c0b074e3 > > > > --- /dev/null > > > > +++ b/gcc/testsuite/gcc.target/i386/pr104371-1.c > > > > @@ -0,0 +1,14 @@ > > > > +/* { dg-do compile } */ > > > > +/* { dg-options "-O2 -msse4" } */ > > > > +/* { dg-final { scan-assembler "ptest\[ \\t\]" } } */ > > > > +/* { dg-final { scan-assembler-not "pxor\[ \\t\]" } } */ > > > > +/* { dg-final { scan-assembler-not "pcmpeqb\[ \\t\]" } } */ > > > > +/* { dg-final { scan-assembler-not "pmovmskb\[ \\t\]" } } */ > > > > + > > > > +#include <smmintrin.h> > > > > +#include <stdbool.h> > > > > + > > > > +bool is_zero(__m128i x) > > > > +{ > > > > + return _mm_movemask_epi8(_mm_cmpeq_epi8(x, _mm_setzero_si128())) > > > == > > > > +0xffff; } > > > > diff --git a/gcc/testsuite/gcc.target/i386/pr104371-2.c > > > > b/gcc/testsuite/gcc.target/i386/pr104371-2.c > > > > new file mode 100755 > > > > index 00000000000..f0d0afd5897 > > > > --- /dev/null > > > > +++ b/gcc/testsuite/gcc.target/i386/pr104371-2.c > > > > @@ -0,0 +1,14 @@ > > > > +/* { dg-do compile } */ > > > > +/* { dg-options "-O2 -mavx2" } */ > > > > +/* { dg-final { scan-assembler "vptest\[ \\t\]" } } */ > > > > +/* { dg-final { scan-assembler-not "vpxor\[ \\t\]" } } */ > > > > +/* { dg-final { scan-assembler-not "vpcmpeqb\[ \\t\]" } } */ > > > > +/* { dg-final { scan-assembler-not "vpmovmskb\[ \\t\]" } } */ > > > > + > > > > +#include <immintrin.h> > > > > +#include <stdbool.h> > > > > + > > > > +bool is_zero256(__m256i x) > > > > +{ > > > > + return _mm256_movemask_epi8(_mm256_cmpeq_epi8(x, > > > > +_mm256_setzero_si256())) == 0xffffffff; } > > > > -- > > > > 2.18.1 > > > >
> -----Original Message----- > From: Uros Bizjak <ubizjak@gmail.com> > Sent: Thursday, May 12, 2022 5:12 PM > To: Jiang, Haochen <haochen.jiang@intel.com> > Cc: gcc-patches@gcc.gnu.org; Liu, Hongtao <hongtao.liu@intel.com>; Hongyu > Wang <wwwhhhyyy333@gmail.com> > Subject: Re: [PATCH] [i386]Add combine splitter to transform > pxor/pcmpeqb/pmovmskb/cmp 0xffff to ptest. > > On Thu, May 12, 2022 at 5:01 AM Jiang, Haochen <haochen.jiang@intel.com> > wrote: > > > > Hi all, > > > > I just refined this patch with more explanation in commit message. > > The ChangeLog entry should in fact read as: > > PR target/104371 > * config/i386/sse.md (vi1avx2const): New define_mode_attr. > (pxor/pcmpeqb/pmovmskb/cmp 0xffff to ptest splitter): > New define_split pattern. Fixed ChangeLog with this. Thx, Haochen > > Please see [1]. > > [1] https://www.gnu.org/prep/standards/html_node/Change- > Logs.html#Change-Logs > > OK with the fixed ChangeLog. > > Uros. > > > No code change compare to last change, which removed ix86_match_ccmode. > > > > Ok for trunk? > > > > BRs, > > Haochen > > > > > -----Original Message----- > > > From: Jiang, Haochen > > > Sent: Saturday, May 7, 2022 9:55 AM > > > To: Uros Bizjak <ubizjak@gmail.com> > > > Cc: gcc-patches@gcc.gnu.org; Liu, Hongtao <Hongtao.Liu@intel.com> > > > Subject: RE: [PATCH] [i386]Add combine splitter to transform > > > pxor/pcmpeqb/pmovmskb/cmp 0xffff to ptest. > > > > > > > > > > > > > -----Original Message----- > > > > From: Uros Bizjak <ubizjak@gmail.com> > > > > Sent: Friday, May 6, 2022 4:59 PM > > > > To: Jiang, Haochen <haochen.jiang@intel.com> > > > > Cc: gcc-patches@gcc.gnu.org; Liu, Hongtao <hongtao.liu@intel.com> > > > > Subject: Re: [PATCH] [i386]Add combine splitter to transform > > > > pxor/pcmpeqb/pmovmskb/cmp 0xffff to ptest. > > > > > > > > On Fri, May 6, 2022 at 10:01 AM Haochen Jiang > > > > <haochen.jiang@intel.com> > > > > wrote: > > > > > > > > > > Hi all, > > > > > > > > > > This patch aims to add a combine splitter to transform > > > pxor/pcmpeqb/pmovmskb/cmp 0xffff to ptest. > > > > > > > > > > Regtested on x86_64-pc-linux-gnu. Ok for trunk? > > > > > > > > > > BRs, > > > > > Haochen > > > > > > > > > > gcc/ChangeLog: > > > > > > > > > > PR target/104371 > > > > > * config/i386/sse.md: Add new define_mode_attr and define_split. > > > > > > > > > > gcc/testsuite/ChangeLog: > > > > > > > > > > PR target/104371 > > > > > * gcc.target/i386/pr104371-1.c: New test. > > > > > * gcc.target/i386/pr104371-2.c: Ditto. > > > > > --- > > > > > gcc/config/i386/sse.md | 19 +++++++++++++++++++ > > > > > gcc/testsuite/gcc.target/i386/pr104371-1.c | 14 ++++++++++++++ > > > > > gcc/testsuite/gcc.target/i386/pr104371-2.c | 14 ++++++++++++++ > > > > > 3 files changed, 47 insertions(+) create mode 100644 > > > > > gcc/testsuite/gcc.target/i386/pr104371-1.c > > > > > create mode 100755 gcc/testsuite/gcc.target/i386/pr104371-2.c > > > > > > > > > > diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md > > > > > index 7b791def542..71afda73c8f 100644 > > > > > --- a/gcc/config/i386/sse.md > > > > > +++ b/gcc/config/i386/sse.md > > > > > @@ -20083,6 +20083,25 @@ > > > > > (set_attr "prefix" "maybe_vex") > > > > > (set_attr "mode" "SI")]) > > > > > > > > > > +;; Optimize pxor/pcmpeqb/pmovmskb/cmp 0xffff to ptest. > > > > > +(define_mode_attr vi1avx2const > > > > > + [(V32QI "0xffffffff") (V16QI "0xffff")]) > > > > > + > > > > > +(define_split > > > > > + [(set (reg:CCZ FLAGS_REG) > > > > > + (compare:CCZ (unspec:SI > > > > > + [(eq:VI1_AVX2 > > > > > + (match_operand:VI1_AVX2 0 "vector_operand") > > > > > + (match_operand:VI1_AVX2 1 "const0_operand"))] > > > > > + UNSPEC_MOVMSK) > > > > > + (match_operand 2 "const_int_operand")))] > > > > > + "TARGET_SSE4_1 && ix86_match_ccmode (insn, CCmode) > > > > > > > > No need to use ix86_match_ccmode here, the pattern is already > > > > limited to CCZmode, > > > > > > > > Uros. > > > > > > > > > > Removed this condition in my new patch, also make the testcase > > > change according to Hongyu's review. > > > > > > Is the patch Ok for trunk? > > > > > > Haochen > > > > > > > > + && (INTVAL (operands[2]) == (int) (<vi1avx2const>))" > > > > > + [(set (reg:CC FLAGS_REG) > > > > > + (unspec:CC [(match_dup 0) > > > > > + (match_dup 0)] > > > > > + UNSPEC_PTEST))]) > > > > > + > > > > > (define_expand "sse2_maskmovdqu" > > > > > [(set (match_operand:V16QI 0 "memory_operand") > > > > > (unspec:V16QI [(match_operand:V16QI 1 > > > > > "register_operand") diff --git > > > > > a/gcc/testsuite/gcc.target/i386/pr104371-1.c > > > > > b/gcc/testsuite/gcc.target/i386/pr104371-1.c > > > > > new file mode 100644 > > > > > index 00000000000..df7c0b074e3 > > > > > --- /dev/null > > > > > +++ b/gcc/testsuite/gcc.target/i386/pr104371-1.c > > > > > @@ -0,0 +1,14 @@ > > > > > +/* { dg-do compile } */ > > > > > +/* { dg-options "-O2 -msse4" } */ > > > > > +/* { dg-final { scan-assembler "ptest\[ \\t\]" } } */ > > > > > +/* { dg-final { scan-assembler-not "pxor\[ \\t\]" } } */ > > > > > +/* { dg-final { scan-assembler-not "pcmpeqb\[ \\t\]" } } */ > > > > > +/* { dg-final { scan-assembler-not "pmovmskb\[ \\t\]" } } */ > > > > > + > > > > > +#include <smmintrin.h> > > > > > +#include <stdbool.h> > > > > > + > > > > > +bool is_zero(__m128i x) > > > > > +{ > > > > > + return _mm_movemask_epi8(_mm_cmpeq_epi8(x, > > > > > +_mm_setzero_si128())) > > > > == > > > > > +0xffff; } > > > > > diff --git a/gcc/testsuite/gcc.target/i386/pr104371-2.c > > > > > b/gcc/testsuite/gcc.target/i386/pr104371-2.c > > > > > new file mode 100755 > > > > > index 00000000000..f0d0afd5897 > > > > > --- /dev/null > > > > > +++ b/gcc/testsuite/gcc.target/i386/pr104371-2.c > > > > > @@ -0,0 +1,14 @@ > > > > > +/* { dg-do compile } */ > > > > > +/* { dg-options "-O2 -mavx2" } */ > > > > > +/* { dg-final { scan-assembler "vptest\[ \\t\]" } } */ > > > > > +/* { dg-final { scan-assembler-not "vpxor\[ \\t\]" } } */ > > > > > +/* { dg-final { scan-assembler-not "vpcmpeqb\[ \\t\]" } } */ > > > > > +/* { dg-final { scan-assembler-not "vpmovmskb\[ \\t\]" } } */ > > > > > + > > > > > +#include <immintrin.h> > > > > > +#include <stdbool.h> > > > > > + > > > > > +bool is_zero256(__m256i x) > > > > > +{ > > > > > + return _mm256_movemask_epi8(_mm256_cmpeq_epi8(x, > > > > > +_mm256_setzero_si256())) == 0xffffffff; } > > > > > -- > > > > > 2.18.1 > > > > >
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 7b791def542..71afda73c8f 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -20083,6 +20083,25 @@ (set_attr "prefix" "maybe_vex") (set_attr "mode" "SI")]) +;; Optimize pxor/pcmpeqb/pmovmskb/cmp 0xffff to ptest. +(define_mode_attr vi1avx2const + [(V32QI "0xffffffff") (V16QI "0xffff")]) + +(define_split + [(set (reg:CCZ FLAGS_REG) + (compare:CCZ (unspec:SI + [(eq:VI1_AVX2 + (match_operand:VI1_AVX2 0 "vector_operand") + (match_operand:VI1_AVX2 1 "const0_operand"))] + UNSPEC_MOVMSK) + (match_operand 2 "const_int_operand")))] + "TARGET_SSE4_1 && ix86_match_ccmode (insn, CCmode) + && (INTVAL (operands[2]) == (int) (<vi1avx2const>))" + [(set (reg:CC FLAGS_REG) + (unspec:CC [(match_dup 0) + (match_dup 0)] + UNSPEC_PTEST))]) + (define_expand "sse2_maskmovdqu" [(set (match_operand:V16QI 0 "memory_operand") (unspec:V16QI [(match_operand:V16QI 1 "register_operand") diff --git a/gcc/testsuite/gcc.target/i386/pr104371-1.c b/gcc/testsuite/gcc.target/i386/pr104371-1.c new file mode 100644 index 00000000000..df7c0b074e3 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr104371-1.c @@ -0,0 +1,14 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -msse4" } */ +/* { dg-final { scan-assembler "ptest\[ \\t\]" } } */ +/* { dg-final { scan-assembler-not "pxor\[ \\t\]" } } */ +/* { dg-final { scan-assembler-not "pcmpeqb\[ \\t\]" } } */ +/* { dg-final { scan-assembler-not "pmovmskb\[ \\t\]" } } */ + +#include <smmintrin.h> +#include <stdbool.h> + +bool is_zero(__m128i x) +{ + return _mm_movemask_epi8(_mm_cmpeq_epi8(x, _mm_setzero_si128())) == 0xffff; +} diff --git a/gcc/testsuite/gcc.target/i386/pr104371-2.c b/gcc/testsuite/gcc.target/i386/pr104371-2.c new file mode 100755 index 00000000000..f0d0afd5897 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr104371-2.c @@ -0,0 +1,14 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx2" } */ +/* { dg-final { scan-assembler "vptest\[ \\t\]" } } */ +/* { dg-final { scan-assembler-not "vpxor\[ \\t\]" } } */ +/* { dg-final { scan-assembler-not "vpcmpeqb\[ \\t\]" } } */ +/* { dg-final { scan-assembler-not "vpmovmskb\[ \\t\]" } } */ + +#include <immintrin.h> +#include <stdbool.h> + +bool is_zero256(__m256i x) +{ + return _mm256_movemask_epi8(_mm256_cmpeq_epi8(x, _mm256_setzero_si256())) == 0xffffffff; +}