mbox series

[0/2] soc: qcom: llcc: Add sc8180x and sc8280xp support

Message ID 20220502215406.612967-1-bjorn.andersson@linaro.org
Headers show
Series soc: qcom: llcc: Add sc8180x and sc8280xp support | expand

Message

Bjorn Andersson May 2, 2022, 9:54 p.m. UTC 
These patches adds support for the LLCC instance found in the sc8180x and sc8280xp.

Bjorn Andersson (2):
  dt-bindings: arm: msm: Add sc8180x and sc8280xp LLCC compatibles
  soc: qcom: llcc: Add sc8180x and sc8280xp configurations

 .../bindings/arm/msm/qcom,llcc.yaml           |  2 +
 drivers/soc/qcom/llcc-qcom.c                  | 60 +++++++++++++++++++
 include/linux/soc/qcom/llcc-qcom.h            |  2 +
 3 files changed, 64 insertions(+)

Comments

Sai Prakash Ranjan May 4, 2022, 1:58 a.m. UTC | #1 
On 5/3/2022 3:24 AM, Bjorn Andersson wrote:
> Add LLCC configuration data for the SC8180X and SC8280XP platforms,
> based on the downstream tables.
>
> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
> ---
>
> Changs since v1:
> - Updated tables according to documentation - thanks Sai!
>
>   drivers/soc/qcom/llcc-qcom.c       | 60 ++++++++++++++++++++++++++++++
>   include/linux/soc/qcom/llcc-qcom.h |  2 +
>   2 files changed, 62 insertions(+)
>
> diff --git a/drivers/soc/qcom/llcc-qcom.c b/drivers/soc/qcom/llcc-qcom.c
> index 85ba8209b182..4b143cf7b4ce 100644
> --- a/drivers/soc/qcom/llcc-qcom.c
> +++ b/drivers/soc/qcom/llcc-qcom.c
> @@ -130,6 +130,50 @@ static const struct llcc_slice_config sc7280_data[] =  {
>   	{ LLCC_MODPE,    29, 64,  1, 1, 0x3f, 0x0, 0, 0, 0, 1, 0, 0},
>   };
>   
> +static const struct llcc_slice_config sc8180x_data[] = {
> +	{ LLCC_CPUSS,    1, 6144,  1, 1, 0xfff, 0x0,   0, 0, 0, 1, 1 },
> +	{ LLCC_VIDSC0,   2, 512,   2, 1, 0xfff, 0x0,   0, 0, 0, 1, 0 },
> +	{ LLCC_VIDSC1,   3, 512,   2, 1, 0xfff, 0x0,   0, 0, 0, 1, 0 },
> +	{ LLCC_AUDIO,    6, 1024,  1, 1, 0xfff, 0x0,   0, 0, 0, 1, 0 },
> +	{ LLCC_MDMHPGRW, 7, 3072,  1, 1, 0x3ff, 0xc00, 0, 0, 0, 1, 0 },
> +	{ LLCC_MDM,      8, 3072,  1, 1, 0xfff, 0x0,   0, 0, 0, 1, 0 },
> +	{ LLCC_MODHW,    9, 1024,  1, 1, 0xfff, 0x0,   0, 0, 0, 1, 0 },
> +	{ LLCC_CMPT,     10, 6144, 1, 1, 0xfff, 0x0,   0, 0, 0, 1, 0 },
> +	{ LLCC_GPUHTW,   11, 1024, 1, 1, 0xfff, 0x0,   0, 0, 0, 1, 0 },
> +	{ LLCC_GPU,      12, 5120, 1, 1, 0xfff, 0x0,   0, 0, 0, 1, 0 },
> +	{ LLCC_MMUHWT,   13, 1024, 1, 1, 0xfff, 0x0,   0, 0, 0, 0, 1 },
> +	{ LLCC_CMPTDMA,  15, 6144, 1, 1, 0xfff, 0x0,   0, 0, 0, 1, 0 },
> +	{ LLCC_DISP,     16, 6144, 1, 1, 0xfff, 0x0,   0, 0, 0, 1, 0 },
> +	{ LLCC_VIDFW,    17, 1024, 1, 1, 0xfff, 0x0,   0, 0, 0, 1, 0 },
> +	{ LLCC_MDMHPFX,  20, 1024, 2, 1, 0xfff, 0x0,   0, 0, 0, 1, 0 },
> +	{ LLCC_MDMPNG,   21, 1024, 0, 1, 0xc,   0x0,   0, 0, 0, 1, 0 },
> +	{ LLCC_AUDHW,    22, 1024, 1, 1, 0xfff, 0x0,   0, 0, 0, 1, 0 },
> +	{ LLCC_NPU,      23, 6144, 1, 1, 0xfff, 0x0,   0, 0, 0, 1, 0 },
> +	{ LLCC_WLHW,     24, 6144, 1, 1, 0xfff, 0x0,   0, 0, 0, 1, 0 },
> +	{ LLCC_MODPE,    29, 512,  1, 1, 0xc,   0x0,   0, 0, 0, 1, 0 },
> +	{ LLCC_APTCM,    30, 512,  3, 1, 0x0,   0x1,   1, 0, 0, 1, 0 },
> +	{ LLCC_WRCACHE,  31, 128,  1, 1, 0xfff, 0x0,   0, 0, 0, 0, 0 },
> +};
> +
> +static const struct llcc_slice_config sc8280xp_data[] = {
> +	{ LLCC_CPUSS,    1,  6144, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 1, 0 },
> +	{ LLCC_VIDSC0,   2,  512,  3, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },
> +	{ LLCC_AUDIO,    6,  1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 0, 0 },
> +	{ LLCC_CMPT,     10, 6144, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 0, 0 },
> +	{ LLCC_GPUHTW,   11, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },
> +	{ LLCC_GPU,      12, 4096, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 1 },
> +	{ LLCC_MMUHWT,   13, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 },
> +	{ LLCC_DISP,     16, 6144, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },
> +	{ LLCC_AUDHW,    22, 2048, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },
> +	{ LLCC_DRE,      26, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },
> +	{ LLCC_CVP,      28, 512,  3, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },
> +	{ LLCC_APTCM,    30, 1024, 3, 1, 0x0,   0x1, 1, 0, 0, 1, 0, 0 },
> +	{ LLCC_WRCACHE,  31, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 },
> +	{ LLCC_CVPFW,    32, 512,  1, 0, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },
> +	{ LLCC_CPUSS1,   33, 2048, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },
> +	{ LLCC_CPUHWT,   36, 512,  1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 },
> +};
> +
>   static const struct llcc_slice_config sdm845_data[] =  {
>   	{ LLCC_CPUSS,    1,  2816, 1, 0, 0xffc, 0x2,   0, 0, 1, 1, 1 },
>   	{ LLCC_VIDSC0,   2,  512,  2, 1, 0x0,   0x0f0, 0, 0, 1, 1, 0 },
> @@ -276,6 +320,20 @@ static const struct qcom_llcc_config sc7280_cfg = {
>   	.reg_offset	= llcc_v1_2_reg_offset,
>   };
>   
> +static const struct qcom_llcc_config sc8180x_cfg = {
> +	.sct_data	= sc8180x_data,
> +	.size		= ARRAY_SIZE(sc8180x_data),
> +	.need_llcc_cfg	= true,
> +	.reg_offset	= llcc_v1_2_reg_offset,
> +};
> +
> +static const struct qcom_llcc_config sc8280xp_cfg = {
> +	.sct_data	= sc8280xp_data,
> +	.size		= ARRAY_SIZE(sc8280xp_data),
> +	.need_llcc_cfg	= true,
> +	.reg_offset	= llcc_v1_2_reg_offset,
> +};
> +
>   static const struct qcom_llcc_config sdm845_cfg = {
>   	.sct_data	= sdm845_data,
>   	.size		= ARRAY_SIZE(sdm845_data),
> @@ -741,6 +799,8 @@ static int qcom_llcc_probe(struct platform_device *pdev)
>   static const struct of_device_id qcom_llcc_of_match[] = {
>   	{ .compatible = "qcom,sc7180-llcc", .data = &sc7180_cfg },
>   	{ .compatible = "qcom,sc7280-llcc", .data = &sc7280_cfg },
> +	{ .compatible = "qcom,sc8180x-llcc", .data = &sc8180x_cfg },
> +	{ .compatible = "qcom,sc8280xp-llcc", .data = &sc8280xp_cfg },
>   	{ .compatible = "qcom,sdm845-llcc", .data = &sdm845_cfg },
>   	{ .compatible = "qcom,sm6350-llcc", .data = &sm6350_cfg },
>   	{ .compatible = "qcom,sm8150-llcc", .data = &sm8150_cfg },
> diff --git a/include/linux/soc/qcom/llcc-qcom.h b/include/linux/soc/qcom/llcc-qcom.h
> index 0bc21ee58fac..9ed5384c5ca1 100644
> --- a/include/linux/soc/qcom/llcc-qcom.h
> +++ b/include/linux/soc/qcom/llcc-qcom.h
> @@ -29,6 +29,8 @@
>   #define LLCC_AUDHW       22
>   #define LLCC_NPU         23
>   #define LLCC_WLHW        24
> +#define LLCC_PIMEM       25
> +#define LLCC_DRE         26
>   #define LLCC_CVP         28
>   #define LLCC_MODPE       29
>   #define LLCC_APTCM       30

Reviewed-by: Sai Prakash Ranjan <quic_saipraka@quicinc.com>

(Note: LLCC_PIMEM isn't used now, but I guess doesn't hurt much to be included in header)

Thanks,
Sai
Bjorn Andersson May 4, 2022, 5:21 p.m. UTC | #2 
On Mon, 2 May 2022 14:54:04 -0700, Bjorn Andersson wrote:
> These patches adds support for the LLCC instance found in the sc8180x and sc8280xp.
> 
> Bjorn Andersson (2):
>   dt-bindings: arm: msm: Add sc8180x and sc8280xp LLCC compatibles
>   soc: qcom: llcc: Add sc8180x and sc8280xp configurations
> 
> .../bindings/arm/msm/qcom,llcc.yaml           |  2 +
>  drivers/soc/qcom/llcc-qcom.c                  | 60 +++++++++++++++++++
>  include/linux/soc/qcom/llcc-qcom.h            |  2 +
>  3 files changed, 64 insertions(+)
> 
> [...]

Applied, thanks!

[1/2] dt-bindings: arm: msm: Add sc8180x and sc8280xp LLCC compatibles
      commit: d0d8cb7b94b8d23e9721cbbec5c7b00c04ae6514
[2/2] soc: qcom: llcc: Add sc8180x and sc8280xp configurations
      commit: ec69dfbdc426f22a9557e5c5408d7902fe0e0144

Best regards,