| Message ID | 20220419113516.1827863-1-abel.vesa@nxp.com |
|---|---|
| Headers | show |
| Series | arm64: dts: Add i.MX8DXL initial support | expand |
On 19/04/2022 13:35, Abel Vesa wrote: > From: Jacky Bai <ping.bai@nxp.com> > > Add i.MX8DXL EVK board support. > Thank you for your patch. There is something to discuss/improve. (...) > + /* global autoconfigured region for contiguous allocations */ > + linux,cma { > + compatible = "shared-dma-pool"; > + reusable; > + size = <0 0x14000000>; > + alloc-ranges = <0 0x98000000 0 0x14000000>; > + linux,cma-default; > + }; > + }; > + > + reg_usdhc2_vmmc: usdhc2-vmmc { usdhc2-vmmc-regulator or regulator-0 (...) > +&thermal_zones { > + pmic-thermal0 { Are you sure this passes the dtbs_check? > + polling-delay-passive = <250>; > + polling-delay = <2000>; > + thermal-sensors = <&tsens IMX_SC_R_PMIC_0>; > + (...) > + pinctrl_usdhc1: usdhc1grp { > + fsl,pins = < > + IMX8DXL_EMMC0_CLK_CONN_EMMC0_CLK 0x06000041 > + IMX8DXL_EMMC0_CMD_CONN_EMMC0_CMD 0x00000021 > + IMX8DXL_EMMC0_DATA0_CONN_EMMC0_DATA0 0x00000021 > + IMX8DXL_EMMC0_DATA1_CONN_EMMC0_DATA1 0x00000021 > + IMX8DXL_EMMC0_DATA2_CONN_EMMC0_DATA2 0x00000021 > + IMX8DXL_EMMC0_DATA3_CONN_EMMC0_DATA3 0x00000021 > + IMX8DXL_EMMC0_DATA4_CONN_EMMC0_DATA4 0x00000021 > + IMX8DXL_EMMC0_DATA5_CONN_EMMC0_DATA5 0x00000021 > + IMX8DXL_EMMC0_DATA6_CONN_EMMC0_DATA6 0x00000021 > + IMX8DXL_EMMC0_DATA7_CONN_EMMC0_DATA7 0x00000021 > + IMX8DXL_EMMC0_STROBE_CONN_EMMC0_STROBE 0x00000041 > + >; > + }; > + > + pinctrl_usdhc1_100mhz: usdhc1grp100mhz { and this as well... I don't remember if we have schema for this but even without it, it breaks the convention. See other files. Best regards, Krzysztof
On 19/04/2022 13:35, Abel Vesa wrote: > From: Jacky Bai <ping.bai@nxp.com> > > The i.MX8DXL is a device targeting the automotive and industrial > market segments. The flexibility of the architecture allows for > use in a wide variety of general embedded applications. The chip > is designed to achieve both high performance and low power consumption. > The chip relies on the power efficient dual (2x) Cortex-A35 cluster. > > Add the reserved memory node property for dsp reserved memory, > the wakeup-irq property for SCU node, the rpmsg and the cm4 rproc > support. > > Signed-off-by: Jacky Bai <ping.bai@nxp.com> > Signed-off-by: Abel Vesa <abel.vesa@nxp.com> (...) > + thermal_zones: thermal-zones { > + cpu-thermal0 { Same concerns as you DTS. > + polling-delay-passive = <250>; > + polling-delay = <2000>; > + thermal-sensors = <&tsens IMX_SC_R_SYSTEM>; > + > + trips { > + cpu_alert0: trip0 { > + temperature = <107000>; > + hysteresis = <2000>; > + type = "passive"; > + }; > + > + cpu_crit0: trip1 { > + temperature = <127000>; > + hysteresis = <2000>; > + type = "critical"; > + }; > + }; > + > + cooling-maps { > + map0 { > + trip = <&cpu_alert0>; > + cooling-device = > + <&A35_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, > + <&A35_1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; > + }; > + }; > + }; > + }; > + > + clk_dummy: clock-dummy { > + compatible = "fixed-clock"; > + #clock-cells = <0>; > + clock-frequency = <0>; > + clock-output-names = "clk_dummy"; > + }; > + > + xtal32k: clock-xtal32k { > + compatible = "fixed-clock"; > + #clock-cells = <0>; > + clock-frequency = <32768>; > + clock-output-names = "xtal_32KHz"; > + }; > + > + xtal24m: clock-xtal24m { > + compatible = "fixed-clock"; > + #clock-cells = <0>; > + clock-frequency = <24000000>; > + clock-output-names = "xtal_24MHz"; > + }; > + > + /* sorted in register address */ > + #include "imx8-ss-adma.dtsi" > + #include "imx8-ss-conn.dtsi" > + #include "imx8-ss-ddr.dtsi" > + #include "imx8-ss-lsio.dtsi" > +}; > + > +#include "imx8dxl-ss-adma.dtsi" There is no such file. Your changes are not bisectable. > +#include "imx8dxl-ss-conn.dtsi" > +#include "imx8dxl-ss-lsio.dtsi" > +#include "imx8dxl-ss-ddr.dtsi" Best regards, Krzysztof
On 19/04/2022 13:35, Abel Vesa wrote: (...) > + > + usbmisc2: usbmisc@5b0e0200 { Generic node names, so maybe "usb"? > + #index-cells = <1>; > + compatible = "fsl,imx8dxl-usbmisc", "fsl,imx7ulp-usbmisc"; > + reg = <0x5b0e0200 0x200>; > + }; > + > + usbphy2: usbphy@5b110000 { Generic node names, so "phy". > + compatible = "fsl,imx8dxl-usbphy", "fsl,imx7ulp-usbphy"; > + reg = <0x5b110000 0x1000>; > + clocks = <&usb2_2_lpcg IMX_LPCG_CLK_7>; > + status = "disabled"; > + }; > + Best regards, Krzysztof