diff mbox series

crypto/fsl: add invalidate_dcache_range for hash output buffer

Message ID 20220418093007.1152201-1-gaurav.jain@nxp.com
State Superseded
Delegated to: Stefano Babic
Headers show
Series crypto/fsl: add invalidate_dcache_range for hash output buffer | expand

Commit Message

Gaurav Jain April 18, 2022, 9:30 a.m. UTC 
HW accelerated hash operations are giving incorrect hash output.
so invalidate cache lines to avoid cache overwriting in DDR memory region.

caam_hash()
 -moved address alignment check in the beginning of function.
 -added invalidate_dcache_range for pout buffer before running descriptor.

Fixes: d7af2baa49 (crypto/fsl: Fix HW accelerated hash commands)
Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
---
 drivers/crypto/fsl/fsl_hash.c | 15 +++++++++------
 1 file changed, 9 insertions(+), 6 deletions(-)

Comments

Fabio Estevam April 18, 2022, 6:41 p.m. UTC | #1 
Hi Gaurav,

On Mon, Apr 18, 2022 at 6:30 AM Gaurav Jain <gaurav.jain@nxp.com> wrote:

>         if (!IS_ALIGNED((uintptr_t)pbuf, ARCH_DMA_MINALIGN) ||
>             !IS_ALIGNED((uintptr_t)pout, ARCH_DMA_MINALIGN)) {
>                 puts("Error: Address arguments are not aligned\n");
>                 return -EINVAL;
>         }
>
> +       debug("\ncaam hash\n");

Minor nit: please remove this line.

Reviewed-by: Fabio Estevam <festevam@denx.de>
diff mbox series

Patch

diff --git a/drivers/crypto/fsl/fsl_hash.c b/drivers/crypto/fsl/fsl_hash.c
index 2379b70c2d..a5d364ea42 100644
--- a/drivers/crypto/fsl/fsl_hash.c
+++ b/drivers/crypto/fsl/fsl_hash.c
@@ -168,18 +168,19 @@  int caam_hash(const unsigned char *pbuf, unsigned int buf_len,
 	uint32_t *desc;
 	unsigned int size;
 
-	desc = malloc_cache_aligned(sizeof(int) * MAX_CAAM_DESCSIZE);
-	if (!desc) {
-		debug("Not enough memory for descriptor allocation\n");
-		return -ENOMEM;
-	}
-
 	if (!IS_ALIGNED((uintptr_t)pbuf, ARCH_DMA_MINALIGN) ||
 	    !IS_ALIGNED((uintptr_t)pout, ARCH_DMA_MINALIGN)) {
 		puts("Error: Address arguments are not aligned\n");
 		return -EINVAL;
 	}
 
+	debug("\ncaam hash\n");
+	desc = malloc_cache_aligned(sizeof(int) * MAX_CAAM_DESCSIZE);
+	if (!desc) {
+		debug("Not enough memory for descriptor allocation\n");
+		return -ENOMEM;
+	}
+
 	size = ALIGN(buf_len, ARCH_DMA_MINALIGN);
 	flush_dcache_range((unsigned long)pbuf, (unsigned long)pbuf + size);
 
@@ -190,6 +191,8 @@  int caam_hash(const unsigned char *pbuf, unsigned int buf_len,
 
 	size = ALIGN(sizeof(int) * MAX_CAAM_DESCSIZE, ARCH_DMA_MINALIGN);
 	flush_dcache_range((unsigned long)desc, (unsigned long)desc + size);
+	size = ALIGN(driver_hash[algo].digestsize, ARCH_DMA_MINALIGN);
+	invalidate_dcache_range((unsigned long)pout, (unsigned long)pout + size);
 
 	ret = run_descriptor_jr(desc);