| Message ID | 20220408213336.581661-1-bjorn.andersson@linaro.org |
|---|---|
| State | Not Applicable, archived |
| Headers | show |
| Series | [1/3] dt-bindings: arm: msm: Add sc8180x and sc8280xp LLCC compatibles | expand |
| Context | Check | Description |
|---|---|---|
| robh/checkpatch | success | |
| robh/patch-applied | success | |
| robh/dtbs-check | warning | build log |
| robh/dt-meta-schema | success |
On Sat, 9 Apr 2022 at 00:31, Bjorn Andersson <bjorn.andersson@linaro.org> wrote: > > The llcc-qcom driver can be compiled as a module, but lacks > MODULE_DEVICE_TABLE() and will therefore not be loaded automatically. > Fix this. > > Fixes: a3134fb09e0b ("drivers: soc: Add LLCC driver") > Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > --- > drivers/soc/qcom/llcc-qcom.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/soc/qcom/llcc-qcom.c b/drivers/soc/qcom/llcc-qcom.c > index a76d58195637..918bfd0df0e2 100644 > --- a/drivers/soc/qcom/llcc-qcom.c > +++ b/drivers/soc/qcom/llcc-qcom.c > @@ -809,6 +809,7 @@ static const struct of_device_id qcom_llcc_of_match[] = { > { .compatible = "qcom,sm8450-llcc", .data = &sm8450_cfg }, > { } > }; > +MODULE_DEVICE_TABLE(of, qcom_llcc_of_match); > > static struct platform_driver qcom_llcc_driver = { > .driver = { > -- > 2.35.1 >
On 08/04/2022 23:33, Bjorn Andersson wrote: > Add compatibles for the SC8180X and SC8280XP platforms to the existing > LLCC binding. > > Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> > --- > Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml | 2 ++ > 1 file changed, 2 insertions(+) > Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Best regards, Krzysztof
On 4/9/2022 3:03 AM, Bjorn Andersson wrote: > The llcc-qcom driver can be compiled as a module, but lacks > MODULE_DEVICE_TABLE() and will therefore not be loaded automatically. > Fix this. > > Fixes: a3134fb09e0b ("drivers: soc: Add LLCC driver") > Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> > --- > drivers/soc/qcom/llcc-qcom.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/soc/qcom/llcc-qcom.c b/drivers/soc/qcom/llcc-qcom.c > index a76d58195637..918bfd0df0e2 100644 > --- a/drivers/soc/qcom/llcc-qcom.c > +++ b/drivers/soc/qcom/llcc-qcom.c > @@ -809,6 +809,7 @@ static const struct of_device_id qcom_llcc_of_match[] = { > { .compatible = "qcom,sm8450-llcc", .data = &sm8450_cfg }, > { } > }; > +MODULE_DEVICE_TABLE(of, qcom_llcc_of_match); > > static struct platform_driver qcom_llcc_driver = { > .driver = { Reviewed-by: Sai Prakash Ranjan <quic_saipraka@quicinc.com> Thanks, Sai
Hi Bjorn, Looks like downstream LLCC configuration data is not up to date, I have cross checked with SCT table in IP doc and have suggested the changes inline as per the latest doc. On 4/9/2022 3:03 AM, Bjorn Andersson wrote: > Add LLCC configuration data for the SC8180X and SC8280XP platforms, > based on the downstream tables. > > Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> > --- > drivers/soc/qcom/llcc-qcom.c | 60 ++++++++++++++++++++++++++++++ > include/linux/soc/qcom/llcc-qcom.h | 2 + > 2 files changed, 62 insertions(+) > > diff --git a/drivers/soc/qcom/llcc-qcom.c b/drivers/soc/qcom/llcc-qcom.c > index eecafeded56f..a76d58195637 100644 > --- a/drivers/soc/qcom/llcc-qcom.c > +++ b/drivers/soc/qcom/llcc-qcom.c > @@ -130,6 +130,50 @@ static const struct llcc_slice_config sc7280_data[] = { > { LLCC_MODPE, 29, 64, 1, 1, 0x3f, 0x0, 0, 0, 0, 1, 0, 0}, > }; > > +static const struct llcc_slice_config sc8180x_data[] = { > + { LLCC_CPUSS, 1, 6144, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 1 }, > + { LLCC_VIDSC0, 2, 512, 2, 1, 0xfff, 0x0, 0, 0, 0, 1, 0 }, > + { LLCC_VIDSC1, 3, 512, 2, 1, 0xfff, 0x0, 0, 0, 0, 1, 0 }, > + { LLCC_ROTATOR, 4, 1024, 2, 1, 0xfff, 0x0, 2, 0, 0, 1, 0 }, > + { LLCC_VOICE, 5, 6144, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0 }, These two are not present in latest SCT table, you can remove these. > + { LLCC_AUDIO, 6, 6144, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0 }, Max size is 1024KB -> { LLCC_AUDIO, 6, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0 }, > + { LLCC_MDMHPGRW, 7, 1024, 2, 0, 0xfff, 0x0, 0, 0, 0, 1, 0 }, Max size is 3072KB , priority is 1, fixed size is 1, bonus ways is 0x3ff, reserved ways is 0xc00, change like below. { LLCC_MDMHPGRW, 7, 3072, 1, 1, 0x3ff, 0xc00, 0, 0, 0, 1, 0 }, > + { LLCC_MDM, 8, 6144, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0 }, Max size is 3072KB -> { LLCC_MDM, 8, 3072, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0 }, There is one more entry for LLCC_MODHW like below after LLCC_MDM, { LLCC_MODHW, 9, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0 }, > + { LLCC_CMPT, 10, 6144, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0 }, > + { LLCC_GPUHTW, 11, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0 }, > + { LLCC_GPU, 12, 5120, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0 }, > + { LLCC_MMUHWT, 13, 6144, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1 }, Max size is 1024KB -> { LLCC_MMUHWT, 13, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1 }, > + { LLCC_CMPTDMA, 15, 6144, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0 }, > + { LLCC_DISP, 16, 6144, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0 }, > + { LLCC_VIDFW, 17, 6144, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0 }, Max size is 1024KB -> { LLCC_VIDFW, 17, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0 }, > + { LLCC_MDMHPFX, 20, 1024, 2, 1, 0xfff, 0x0, 0, 0, 0, 1, 0 }, > + { LLCC_MDMPNG, 21, 1024, 0, 1, 0xf, 0x0, 0, 0, 0, 1, 0 }, Bonus ways is 0xc -> { LLCC_MDMPNG, 21, 1024, 0, 1, 0xc, 0x0, 0, 0, 0, 1, 0 }, > + { LLCC_AUDHW, 22, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0 }, > + { LLCC_NPU, 23, 6144, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0 }, > + { LLCC_WLHW, 24, 6144, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0 }, > + { LLCC_PIMEM, 25, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0 }, There is no PIMEM entry, you can remove that and add 3 other entries as below, { LLCC_MODPE, 29, 512, 1, 1, 0xc, 0x0, 0, 0, 0, 1, 0 }, { LLCC_APTCM, 30, 512, 3, 1, 0x0, 0x1, 1, 0, 0, 1, 0 }, { LLCC_WRCACHE, 31, 128, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 0 }, > +}; > + > +static const struct llcc_slice_config sc8280xp_data[] = { > + { LLCC_CPUSS, 1, 6144, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 1 }, > + { LLCC_VIDSC0, 2, 512, 3, 1, 0xfff, 0x0, 0, 0, 0, 1, 0 }, > + { LLCC_AUDIO, 6, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 0 }, > + { LLCC_CMPT, 10, 6144, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 0 }, > + { LLCC_GPUHTW, 11, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0 }, > + { LLCC_GPU, 12, 4608, 1, 0, 0xfff, 0x0, 0, 0, 0, 1, 0 }, Max capacity in 4096KB, fixed size is 1 -> { LLCC_GPU, 12, 4096, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0 }, > + { LLCC_MMUHWT, 13, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1 }, > + { LLCC_DISP, 16, 6144, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0 }, > + { LLCC_AUDHW, 22, 2048, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0 }, > + { LLCC_DRE, 26, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0 }, > + { LLCC_CVP, 28, 512, 3, 1, 0xfff, 0x0, 0, 0, 0, 1, 0 }, > + { LLCC_APTCM, 30, 1024, 3, 1, 0x0, 0x1, 1, 0, 0, 1, 0 }, > + { LLCC_WRCACHE, 31, 512, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1 }, Max capacity is 1024KB -> { LLCC_WRCACHE, 31, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1 }, > + { LLCC_CVPFW, 17, 512, 1, 0, 0xfff, 0x0, 0, 0, 0, 1, 0 }, > + { LLCC_CPUSS1, 3, 2048, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0 }, > + { LLCC_CAMEXP0, 14, 6144, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 0 }, This is not present in latest LLCC SCT table, you can remove it. > + { LLCC_CPUHWT, 5, 512, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1 }, > +}; > + Also need one more column field (write_scid_en) at the end with all false(0) values except for GPU SCID (12) which is true (1) for sc8280xp. > static const struct llcc_slice_config sdm845_data[] = { > { LLCC_CPUSS, 1, 2816, 1, 0, 0xffc, 0x2, 0, 0, 1, 1, 1 }, > { LLCC_VIDSC0, 2, 512, 2, 1, 0x0, 0x0f0, 0, 0, 1, 1, 0 }, > @@ -276,6 +320,20 @@ static const struct qcom_llcc_config sc7280_cfg = { > .reg_offset = llcc_v1_2_reg_offset, > }; > > +static const struct qcom_llcc_config sc8180x_cfg = { > + .sct_data = sc8180x_data, > + .size = ARRAY_SIZE(sc8180x_data), > + .need_llcc_cfg = true, > + .reg_offset = llcc_v1_2_reg_offset, > +}; > + > +static const struct qcom_llcc_config sc8280xp_cfg = { > + .sct_data = sc8280xp_data, > + .size = ARRAY_SIZE(sc8280xp_data), > + .need_llcc_cfg = true, > + .reg_offset = llcc_v1_2_reg_offset, > +}; > + > static const struct qcom_llcc_config sdm845_cfg = { > .sct_data = sdm845_data, > .size = ARRAY_SIZE(sdm845_data), > @@ -741,6 +799,8 @@ static int qcom_llcc_probe(struct platform_device *pdev) > static const struct of_device_id qcom_llcc_of_match[] = { > { .compatible = "qcom,sc7180-llcc", .data = &sc7180_cfg }, > { .compatible = "qcom,sc7280-llcc", .data = &sc7280_cfg }, > + { .compatible = "qcom,sc8180x-llcc", .data = &sc8180x_cfg }, > + { .compatible = "qcom,sc8280xp-llcc", .data = &sc8280xp_cfg }, > { .compatible = "qcom,sdm845-llcc", .data = &sdm845_cfg }, > { .compatible = "qcom,sm6350-llcc", .data = &sm6350_cfg }, > { .compatible = "qcom,sm8150-llcc", .data = &sm8150_cfg }, > diff --git a/include/linux/soc/qcom/llcc-qcom.h b/include/linux/soc/qcom/llcc-qcom.h > index 0bc21ee58fac..9ed5384c5ca1 100644 > --- a/include/linux/soc/qcom/llcc-qcom.h > +++ b/include/linux/soc/qcom/llcc-qcom.h > @@ -29,6 +29,8 @@ > #define LLCC_AUDHW 22 > #define LLCC_NPU 23 > #define LLCC_WLHW 24 > +#define LLCC_PIMEM 25 > +#define LLCC_DRE 26 > #define LLCC_CVP 28 > #define LLCC_MODPE 29 > #define LLCC_APTCM 30 Thanks, Sai
diff --git a/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml b/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml index 30fcbe2ad8a3..5ea506412b4e 100644 --- a/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml +++ b/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml @@ -23,6 +23,8 @@ properties: enum: - qcom,sc7180-llcc - qcom,sc7280-llcc + - qcom,sc8180x-llcc + - qcom,sc8280xp-llcc - qcom,sdm845-llcc - qcom,sm6350-llcc - qcom,sm8150-llcc
Add compatibles for the SC8180X and SC8280XP platforms to the existing LLCC binding. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> --- Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml | 2 ++ 1 file changed, 2 insertions(+)