| Message ID | 20220318201324.1647416-1-michael@walle.cc |
|---|---|
| Headers | show |
| Series | net: mscc-miim: add integrated PHY reset support | expand |
On Fri, Mar 18, 2022 at 09:13:23PM +0100, Michael Walle wrote: > Replace the magic numbers by macros which are already defined. It seems > the original commit missed to use them. > > Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Andrew
On Fri, Mar 18, 2022 at 09:13:24PM +0100, Michael Walle wrote: > The LAN966x has two internal PHYs which are in reset by default. The > driver already supported the internal PHYs of the SparX-5. Now add > support for the LAN966x, too. Add a new compatible to distinguish them. > > The LAN966x has additional control bits in this register, thus convert > the regmap_write() to regmap_update_bits() to leave the remaining bits > untouched. This doesn't change anything for the SparX-5 SoC, because > there, the register consists only of reset bits. > > Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Andrew
Hello: This series was applied to netdev/net-next.git (master) by Jakub Kicinski <kuba@kernel.org>: On Fri, 18 Mar 2022 21:13:21 +0100 you wrote: > The MDIO driver has support to release the integrated PHYs from reset. > This was implemented for the SparX-5 for now. Now add support for the > LAN966x, too. > > changes since v2: > - fix typo in commit message > - use microchip,lan966x instead of mscc,lan966x > - rename mask variable to {phy_,}reset_bits > - check return code from device_get_match_data() right after > the call instead of checking it where it is used > > [...] Here is the summary with links: - [net-next,v3,1/3] dt-bindings: net: mscc-miim: add lan966x compatible https://git.kernel.org/netdev/net-next/c/a2e4b5adfdf8 - [net-next,v3,2/3] net: mdio: mscc-miim: replace magic numbers for the bus reset https://git.kernel.org/netdev/net-next/c/58ebdba3d851 - [net-next,v3,3/3] net: mdio: mscc-miim: add lan966x internal phy reset support https://git.kernel.org/netdev/net-next/c/74529db3e01d You are awesome, thank you!
The MDIO driver has support to release the integrated PHYs from reset. This was implemented for the SparX-5 for now. Now add support for the LAN966x, too. changes since v2: - fix typo in commit message - use microchip,lan966x instead of mscc,lan966x - rename mask variable to {phy_,}reset_bits - check return code from device_get_match_data() right after the call instead of checking it where it is used changes since v1: - fix typo in the subject in patch 3/3 Michael Walle (3): dt-bindings: net: mscc-miim: add lan966x compatible net: mdio: mscc-miim: replace magic numbers for the bus reset net: mdio: mscc-miim: add lan966x internal phy reset support .../devicetree/bindings/net/mscc-miim.txt | 2 +- drivers/net/mdio/mdio-mscc-miim.c | 67 ++++++++++++++----- 2 files changed, 50 insertions(+), 19 deletions(-)