| Message ID | 20220313151023.21229-1-jiaxin.yu@mediatek.com |
|---|---|
| Headers | show |
| Series | ASoC: mediatek: Add support for MT8186 SoC | expand |
Il 13/03/22 16:10, Jiaxin Yu ha scritto: > This fixes the following build errors when mt6358 is configured as module: > >>> ERROR: modpost: "mt6358_set_mtkaif_protocol" >>> [sound/soc/mediatek/mt8186/mt8186-mt6366-rt1019-rt5682s.ko] undefined! >>> ERROR: modpost: "mt6358_set_mtkaif_protocol" >>> [sound/soc/mediatek/mt8186/mt8186-mt6366-da7219-max98357.ko] undefined! > > Signed-off-by: Jiaxin Yu <jiaxin.yu@mediatek.com> Hello Jiaxin, Can you please add a Fixes tag to this patch and send it separately from the MT8186 series? After adding the Fixes tag: Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Thanks, Angelo > --- > sound/soc/codecs/mt6358.c | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/sound/soc/codecs/mt6358.c b/sound/soc/codecs/mt6358.c > index 1fdd2f8cf877..61f2a7632fd4 100644 > --- a/sound/soc/codecs/mt6358.c > +++ b/sound/soc/codecs/mt6358.c > @@ -107,6 +107,7 @@ int mt6358_set_mtkaif_protocol(struct snd_soc_component *cmpnt, > priv->mtkaif_protocol = mtkaif_protocol; > return 0; > } > +EXPORT_SYMBOL_GPL(mt6358_set_mtkaif_protocol); > > static void playback_gpio_set(struct mt6358_priv *priv) > { > @@ -273,6 +274,7 @@ int mt6358_mtkaif_calibration_enable(struct snd_soc_component *cmpnt) > 1 << RG_AUD_PAD_TOP_DAT_MISO_LOOPBACK_SFT); > return 0; > } > +EXPORT_SYMBOL_GPL(mt6358_mtkaif_calibration_enable); > > int mt6358_mtkaif_calibration_disable(struct snd_soc_component *cmpnt) > { > @@ -296,6 +298,7 @@ int mt6358_mtkaif_calibration_disable(struct snd_soc_component *cmpnt) > capture_gpio_reset(priv); > return 0; > } > +EXPORT_SYMBOL_GPL(mt6358_mtkaif_calibration_disable); > > int mt6358_set_mtkaif_calibration_phase(struct snd_soc_component *cmpnt, > int phase_1, int phase_2) > @@ -310,6 +313,7 @@ int mt6358_set_mtkaif_calibration_phase(struct snd_soc_component *cmpnt, > phase_2 << RG_AUD_PAD_TOP_PHASE_MODE2_SFT); > return 0; > } > +EXPORT_SYMBOL_GPL(mt6358_set_mtkaif_calibration_phase); > > /* dl pga gain */ > enum {
Il 13/03/22 16:10, Jiaxin Yu ha scritto: > Add mt8186 audio cg control. Audio clock gates are registered to > CCF for reference count and clock parent management. > > Signed-off-by: Jiaxin Yu <jiaxin.yu@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> > --- > sound/soc/mediatek/mt8186/mt8186-audsys-clk.c | 150 ++++++++++++++++++ > sound/soc/mediatek/mt8186/mt8186-audsys-clk.h | 15 ++ > .../soc/mediatek/mt8186/mt8186-audsys-clkid.h | 45 ++++++ > 3 files changed, 210 insertions(+) > create mode 100644 sound/soc/mediatek/mt8186/mt8186-audsys-clk.c > create mode 100644 sound/soc/mediatek/mt8186/mt8186-audsys-clk.h > create mode 100644 sound/soc/mediatek/mt8186/mt8186-audsys-clkid.h >
Il 13/03/22 16:10, Jiaxin Yu ha scritto: > Add mt8186 adda dai driver. > > Signed-off-by: Jiaxin Yu <jiaxin.yu@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> > --- > sound/soc/mediatek/mt8186/mt8186-dai-adda.c | 878 ++++++++++++++++++++ > 1 file changed, 878 insertions(+) > create mode 100644 sound/soc/mediatek/mt8186/mt8186-dai-adda.c >
Il 13/03/22 16:10, Jiaxin Yu ha scritto: > Add mt8186 hw gain dai driver. > > Signed-off-by: Jiaxin Yu <jiaxin.yu@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> > --- > .../soc/mediatek/mt8186/mt8186-dai-hw-gain.c | 236 ++++++++++++++++++ > 1 file changed, 236 insertions(+) > create mode 100644 sound/soc/mediatek/mt8186/mt8186-dai-hw-gain.c >
Il 13/03/22 16:10, Jiaxin Yu ha scritto: > Add mt8186 hostless dai driver. > > Signed-off-by: Jiaxin Yu <jiaxin.yu@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> > --- > .../soc/mediatek/mt8186/mt8186-dai-hostless.c | 298 ++++++++++++++++++ > 1 file changed, 298 insertions(+) > create mode 100644 sound/soc/mediatek/mt8186/mt8186-dai-hostless.c >
Il 13/03/22 16:10, Jiaxin Yu ha scritto: > Add mt8186 i2s dai driver. > > Signed-off-by: Jiaxin Yu <jiaxin.yu@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> > --- > sound/soc/mediatek/mt8186/mt8186-dai-i2s.c | 1355 ++++++++++++++++++++ > 1 file changed, 1355 insertions(+) > create mode 100644 sound/soc/mediatek/mt8186/mt8186-dai-i2s.c >
Il 13/03/22 16:10, Jiaxin Yu ha scritto: > Add mt8186 pcm dai driver. > > Signed-off-by: Jiaxin Yu <jiaxin.yu@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> > --- > sound/soc/mediatek/mt8186/mt8186-dai-pcm.c | 423 +++++++++++++++++++++ > 1 file changed, 423 insertions(+) > create mode 100644 sound/soc/mediatek/mt8186/mt8186-dai-pcm.c >
Il 13/03/22 16:10, Jiaxin Yu ha scritto: > Add mt8186 src dai driver > > Signed-off-by: Jiaxin Yu <jiaxin.yu@mediatek.com> > --- > sound/soc/mediatek/mt8186/mt8186-dai-src.c | 726 +++++++++++++++++++++ > 1 file changed, 726 insertions(+) > create mode 100644 sound/soc/mediatek/mt8186/mt8186-dai-src.c > > diff --git a/sound/soc/mediatek/mt8186/mt8186-dai-src.c b/sound/soc/mediatek/mt8186/mt8186-dai-src.c > new file mode 100644 > index 000000000000..0277cb0ad3f2 > --- /dev/null > +++ b/sound/soc/mediatek/mt8186/mt8186-dai-src.c > @@ -0,0 +1,726 @@ > +// SPDX-License-Identifier: GPL-2.0 > +// > +// MediaTek ALSA SoC Audio DAI SRC Control > +// > +// Copyright (c) 2022 MediaTek Inc. > +// Author: Jiaxin Yu <jiaxin.yu@mediatek.com> > + > +#include <linux/regmap.h> > +#include "mt8186-afe-common.h" > +#include "mt8186-interconnection.h" > + ..snip.. > + > +static const unsigned int *get_iir_coeff(unsigned int rate_in, > + unsigned int rate_out, > + unsigned int *param_num) > +{ > + if (rate_in == 32000 && rate_out == 16000) { > + *param_num = ARRAY_SIZE(src_iir_coeff_32_to_16); > + return src_iir_coeff_32_to_16; > + } else if (rate_in == 44100 && rate_out == 16000) { > + *param_num = ARRAY_SIZE(src_iir_coeff_44_to_16); > + return src_iir_coeff_44_to_16; > + } else if (rate_in == 44100 && rate_out == 32000) { > + *param_num = ARRAY_SIZE(src_iir_coeff_44_to_32); > + return src_iir_coeff_44_to_32; > + } else if ((rate_in == 48000 && rate_out == 16000) || > + (rate_in == 96000 && rate_out == 32000)) { > + *param_num = ARRAY_SIZE(src_iir_coeff_48_to_16); > + return src_iir_coeff_48_to_16; > + } else if (rate_in == 48000 && rate_out == 32000) { > + *param_num = ARRAY_SIZE(src_iir_coeff_48_to_32); > + return src_iir_coeff_48_to_32; > + } else if (rate_in == 48000 && rate_out == 44100) { > + *param_num = ARRAY_SIZE(src_iir_coeff_48_to_44); > + return src_iir_coeff_48_to_44; > + } else if (rate_in == 96000 && rate_out == 16000) { > + *param_num = ARRAY_SIZE(src_iir_coeff_96_to_16); > + return src_iir_coeff_96_to_16; > + } else if ((rate_in == 96000 && rate_out == 44100) || > + (rate_in == 48000 && rate_out == 22050)) { > + *param_num = ARRAY_SIZE(src_iir_coeff_96_to_44); > + return src_iir_coeff_96_to_44; > + } > + > + *param_num = 0; > + return NULL; > +} > + > +#define DEBUG_COEFF I think that this debugging hackery unintentionally slipped through... or was that intentional? In the latter case, if you want to provide a way to debug that, you should use debugfs instead... Please, either remove this debugging code, or use debugfs. Thanks, Angelo > +static int mtk_set_src_1_param(struct mtk_base_afe *afe, int id) > +{ > + struct mt8186_afe_private *afe_priv = afe->platform_priv; > + struct mtk_afe_src_priv *src_priv = afe_priv->dai_priv[id]; > + unsigned int iir_coeff_num; > + unsigned int iir_stage; > + int rate_in = src_priv->dl_rate; > + int rate_out = src_priv->ul_rate; > + unsigned int out_freq_mode = mtk_get_src_freq_mode(afe, rate_out); > + unsigned int in_freq_mode = mtk_get_src_freq_mode(afe, rate_in); > + > + /* set out freq mode */ > + regmap_update_bits(afe->regmap, AFE_GENERAL1_ASRC_2CH_CON3, > + G_SRC_ASM_FREQ_4_MASK_SFT, > + out_freq_mode << G_SRC_ASM_FREQ_4_SFT); > + > + /* set in freq mode */ > + regmap_update_bits(afe->regmap, AFE_GENERAL1_ASRC_2CH_CON4, > + G_SRC_ASM_FREQ_5_MASK_SFT, > + in_freq_mode << G_SRC_ASM_FREQ_5_SFT); > + > + regmap_write(afe->regmap, AFE_GENERAL1_ASRC_2CH_CON5, 0x3f5986); > + regmap_write(afe->regmap, AFE_GENERAL1_ASRC_2CH_CON5, 0x3f5987); > + regmap_write(afe->regmap, AFE_GENERAL1_ASRC_2CH_CON6, 0x1fbd); > + regmap_write(afe->regmap, AFE_GENERAL1_ASRC_2CH_CON2, 0); > + > + /* set iir if in_rate > out_rate */ > + if (rate_in > rate_out) { > + int i; > +#ifdef DEBUG_COEFF > + int reg_val; > +#endif > + const unsigned int *iir_coeff = get_iir_coeff(rate_in, rate_out, > + &iir_coeff_num); > + > + if (iir_coeff_num == 0 || !iir_coeff) { > + dev_err(afe->dev, "%s(), iir coeff error, num %d, coeff %p\n", > + __func__, iir_coeff_num, iir_coeff); > + return -EINVAL; > + } > + > + /* COEFF_SRAM_CTRL */ > + regmap_update_bits(afe->regmap, AFE_GENERAL1_ASRC_2CH_CON0, > + G_SRC_COEFF_SRAM_CTRL_MASK_SFT, > + BIT(G_SRC_COEFF_SRAM_CTRL_SFT)); > + /* Clear coeff history to r/w coeff from the first position */ > + regmap_update_bits(afe->regmap, AFE_GENERAL1_ASRC_2CH_CON13, > + G_SRC_COEFF_SRAM_ADR_MASK_SFT, 0); > + /* Write SRC coeff, should not read the reg during write */ > + for (i = 0; i < iir_coeff_num; i++) > + regmap_write(afe->regmap, AFE_GENERAL1_ASRC_2CH_CON12, > + iir_coeff[i]); > + > +#ifdef DEBUG_COEFF > + regmap_update_bits(afe->regmap, AFE_GENERAL1_ASRC_2CH_CON13, > + G_SRC_COEFF_SRAM_ADR_MASK_SFT, 0); > + > + for (i = 0; i < iir_coeff_num; i++) { > + regmap_read(afe->regmap, AFE_GENERAL1_ASRC_2CH_CON12, > + ®_val); > + dev_info(afe->dev, "%s(), i = %d, coeff = 0x%x\n", > + __func__, i, reg_val); > + } > +#endif > + /* disable sram access */ > + regmap_update_bits(afe->regmap, AFE_GENERAL1_ASRC_2CH_CON0, > + G_SRC_COEFF_SRAM_CTRL_MASK_SFT, 0); > + /* CHSET_IIR_STAGE */ > + iir_stage = (iir_coeff_num / 6) - 1; > + regmap_update_bits(afe->regmap, AFE_GENERAL1_ASRC_2CH_CON2, > + G_SRC_CHSET_IIR_STAGE_MASK_SFT, > + iir_stage << G_SRC_CHSET_IIR_STAGE_SFT); > + /* CHSET_IIR_EN */ > + regmap_update_bits(afe->regmap, AFE_GENERAL1_ASRC_2CH_CON2, > + G_SRC_CHSET_IIR_EN_MASK_SFT, > + BIT(G_SRC_CHSET_IIR_EN_SFT)); > + } else { > + /* CHSET_IIR_EN off */ > + regmap_update_bits(afe->regmap, AFE_GENERAL1_ASRC_2CH_CON2, > + G_SRC_CHSET_IIR_EN_MASK_SFT, 0); > + } > + > + return 0; > +} > + > +static int mtk_set_src_2_param(struct mtk_base_afe *afe, int id) > +{ > + struct mt8186_afe_private *afe_priv = afe->platform_priv; > + struct mtk_afe_src_priv *src_priv = afe_priv->dai_priv[id]; > + unsigned int iir_coeff_num; > + unsigned int iir_stage; > + int rate_in = src_priv->dl_rate; > + int rate_out = src_priv->ul_rate; > + unsigned int out_freq_mode = mtk_get_src_freq_mode(afe, rate_out); > + unsigned int in_freq_mode = mtk_get_src_freq_mode(afe, rate_in); > + > + /* set out freq mode */ > + regmap_update_bits(afe->regmap, AFE_GENERAL2_ASRC_2CH_CON3, > + G_SRC_ASM_FREQ_4_MASK_SFT, > + out_freq_mode << G_SRC_ASM_FREQ_4_SFT); > + > + /* set in freq mode */ > + regmap_update_bits(afe->regmap, AFE_GENERAL2_ASRC_2CH_CON4, > + G_SRC_ASM_FREQ_5_MASK_SFT, > + in_freq_mode << G_SRC_ASM_FREQ_5_SFT); > + > + regmap_write(afe->regmap, AFE_GENERAL2_ASRC_2CH_CON5, 0x3f5986); > + regmap_write(afe->regmap, AFE_GENERAL2_ASRC_2CH_CON5, 0x3f5987); > + regmap_write(afe->regmap, AFE_GENERAL2_ASRC_2CH_CON6, 0x1fbd); > + regmap_write(afe->regmap, AFE_GENERAL2_ASRC_2CH_CON2, 0); > + > + /* set iir if in_rate > out_rate */ > + if (rate_in > rate_out) { > + int i; > +#ifdef DEBUG_COEFF > + int reg_val; > +#endif > + const unsigned int *iir_coeff = get_iir_coeff(rate_in, rate_out, > + &iir_coeff_num); > + > + if (iir_coeff_num == 0 || !iir_coeff) { > + dev_err(afe->dev, "%s(), iir coeff error, num %d, coeff %p\n", > + __func__, iir_coeff_num, iir_coeff); > + return -EINVAL; > + } > + > + /* COEFF_SRAM_CTRL */ > + regmap_update_bits(afe->regmap, AFE_GENERAL2_ASRC_2CH_CON0, > + G_SRC_COEFF_SRAM_CTRL_MASK_SFT, > + BIT(G_SRC_COEFF_SRAM_CTRL_SFT)); > + /* Clear coeff history to r/w coeff from the first position */ > + regmap_update_bits(afe->regmap, AFE_GENERAL2_ASRC_2CH_CON13, > + G_SRC_COEFF_SRAM_ADR_MASK_SFT, 0); > + /* Write SRC coeff, should not read the reg during write */ > + for (i = 0; i < iir_coeff_num; i++) > + regmap_write(afe->regmap, AFE_GENERAL2_ASRC_2CH_CON12, > + iir_coeff[i]); > + > +#ifdef DEBUG_COEFF > + regmap_update_bits(afe->regmap, AFE_GENERAL2_ASRC_2CH_CON13, > + G_SRC_COEFF_SRAM_ADR_MASK_SFT, 0); > + > + for (i = 0; i < iir_coeff_num; i++) { > + regmap_read(afe->regmap, AFE_GENERAL2_ASRC_2CH_CON12, > + ®_val); > + dev_info(afe->dev, "%s(), i = %d, coeff = 0x%x\n", > + __func__, i, reg_val); > + } > +#endif > + /* disable sram access */ > + regmap_update_bits(afe->regmap, AFE_GENERAL2_ASRC_2CH_CON0, > + G_SRC_COEFF_SRAM_CTRL_MASK_SFT, 0); > + /* CHSET_IIR_STAGE */ > + iir_stage = (iir_coeff_num / 6) - 1; > + regmap_update_bits(afe->regmap, AFE_GENERAL2_ASRC_2CH_CON2, > + G_SRC_CHSET_IIR_STAGE_MASK_SFT, > + iir_stage << G_SRC_CHSET_IIR_STAGE_SFT); > + /* CHSET_IIR_EN */ > + regmap_update_bits(afe->regmap, AFE_GENERAL2_ASRC_2CH_CON2, > + G_SRC_CHSET_IIR_EN_MASK_SFT, > + BIT(G_SRC_CHSET_IIR_EN_SFT)); > + } else { > + /* CHSET_IIR_EN off */ > + regmap_update_bits(afe->regmap, AFE_GENERAL2_ASRC_2CH_CON2, > + G_SRC_CHSET_IIR_EN_MASK_SFT, 0); > + } > + > + return 0; > +} > +
Il 13/03/22 16:10, Jiaxin Yu ha scritto: > Add mt8186 tdm dai driver. > > Signed-off-by: Jiaxin Yu <jiaxin.yu@mediatek.com> > --- > sound/soc/mediatek/mt8186/mt8186-dai-tdm.c | 695 +++++++++++++++++++++ > 1 file changed, 695 insertions(+) > create mode 100644 sound/soc/mediatek/mt8186/mt8186-dai-tdm.c > > diff --git a/sound/soc/mediatek/mt8186/mt8186-dai-tdm.c b/sound/soc/mediatek/mt8186/mt8186-dai-tdm.c > new file mode 100644 > index 000000000000..52acc5f6e147 > --- /dev/null > +++ b/sound/soc/mediatek/mt8186/mt8186-dai-tdm.c > @@ -0,0 +1,695 @@ > +// SPDX-License-Identifier: GPL-2.0 > +// > +// MediaTek ALSA SoC Audio DAI TDM Control > +// > +// Copyright (c) 2022 MediaTek Inc. > +// Author: Jiaxin Yu <jiaxin.yu@mediatek.com> > + > +#include <linux/regmap.h> > +#include <sound/pcm_params.h> > + > +#include "mt8186-afe-clk.h" > +#include "mt8186-afe-common.h" > +#include "mt8186-afe-gpio.h" > +#include "mt8186-interconnection.h" > + > +#define TDM_HD_EN_W_NAME "TDM_HD_EN" > +#define TDM_MCLK_EN_W_NAME "TDM_MCLK_EN" > +#define MTK_AFE_TDM_KCONTROL_NAME "TDM_HD_Mux" > + > +struct mtk_afe_tdm_priv { > + unsigned int id; > + unsigned int rate; /* for determine which apll to use */ > + unsigned int bck_invert; > + unsigned int lck_invert; > + unsigned int lrck_width; > + unsigned int mclk_id; > + unsigned int mclk_multiple; /* according to sample rate */ > + unsigned int mclk_rate; > + unsigned int mclk_apll; > + unsigned int tdm_mode; > + unsigned int data_mode; > + unsigned int slave_mode; > + unsigned int low_jitter_en; > +}; > + > +enum { > + TDM_IN_I2S = 0, > + TDM_IN_LJ = 1, > + TDM_IN_RJ = 2, > + TDM_IN_DSP_A = 4, > + TDM_IN_DSP_B = 5, > +}; > + > +enum { > + TDM_DATA_ONE_PIN = 0, > + TDM_DATA_MULTI_PIN, > +}; > + > +enum { > + TDM_BCK_NON_INV = 0, > + TDM_BCK_INV = 1, > +}; > + > +enum { > + TDM_LCK_NON_INV = 0, > + TDM_LCK_INV = 1, > +}; > + > +static unsigned int get_tdm_lrck_width(snd_pcm_format_t format, > + unsigned int mode) > +{ > + if (mode == TDM_IN_DSP_A || mode == TDM_IN_DSP_B) > + return 0; > + > + return snd_pcm_format_physical_width(format) - 1; > +} > + > +static unsigned int get_tdm_ch_fixup(unsigned int channels) > +{ > + if (channels > 4) > + return 8; > + else if (channels > 2) > + return 4; > + > + return 2; > +} > + > +static unsigned int get_tdm_ch_per_sdata(unsigned int mode, > + unsigned int channels) > +{ > + if (mode == TDM_IN_DSP_A || mode == TDM_IN_DSP_B) > + return get_tdm_ch_fixup(channels); > + > + return 2; > +} > + > +enum { > + SUPPLY_SEQ_APLL, > + SUPPLY_SEQ_TDM_MCK_EN, > + SUPPLY_SEQ_TDM_HD_EN, > + SUPPLY_SEQ_TDM_EN, > +}; > + > +static int get_tdm_id_by_name(const char *name) > +{ > + return MT8186_DAI_TDM_IN; > +} > + > +static int mtk_tdm_en_event(struct snd_soc_dapm_widget *w, > + struct snd_kcontrol *kcontrol, > + int event) > +{ > + struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm); > + struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt); > + struct mt8186_afe_private *afe_priv = afe->platform_priv; > + int dai_id = get_tdm_id_by_name(w->name); > + struct mtk_afe_tdm_priv *tdm_priv = afe_priv->dai_priv[dai_id]; > + > + if (!tdm_priv) { > + dev_err(afe->dev, "%s(), tdm_priv == NULL", __func__); > + return -EINVAL; > + } > + > + dev_dbg(cmpnt->dev, "%s(), name %s, event 0x%x\n", > + __func__, w->name, event); > + > + switch (event) { > + case SND_SOC_DAPM_PRE_PMU: > + mt8186_afe_gpio_request(afe->dev, true, tdm_priv->id, 0); > + break; > + case SND_SOC_DAPM_POST_PMD: > + mt8186_afe_gpio_request(afe->dev, false, tdm_priv->id, 0); > + break; > + default: > + break; > + } > + > + return 0; > +} > + > +static int mtk_tdm_mck_en_event(struct snd_soc_dapm_widget *w, > + struct snd_kcontrol *kcontrol, > + int event) > +{ > + struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm); > + struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt); > + struct mt8186_afe_private *afe_priv = afe->platform_priv; > + int dai_id = get_tdm_id_by_name(w->name); > + struct mtk_afe_tdm_priv *tdm_priv = afe_priv->dai_priv[dai_id]; > + > + if (!tdm_priv) { > + dev_err(afe->dev, "%s(), tdm_priv == NULL", __func__); > + return -EINVAL; > + } > + > + dev_dbg(cmpnt->dev, "%s(), name %s, event 0x%x, dai_id %d\n", > + __func__, w->name, event, dai_id); > + > + switch (event) { > + case SND_SOC_DAPM_PRE_PMU: > + mt8186_mck_enable(afe, tdm_priv->mclk_id, tdm_priv->mclk_rate); > + break; > + case SND_SOC_DAPM_POST_PMD: > + tdm_priv->mclk_rate = 0; > + mt8186_mck_disable(afe, tdm_priv->mclk_id); > + break; > + default: > + break; > + } > + > + return 0; > +} > + > +/* dai component */ > +/* tdm virtual mux to output widget */ > +static const char * const tdm_mux_map[] = { > + "Normal", "Dummy_Widget", > +}; > + > +static int tdm_mux_map_value[] = { > + 0, 1, > +}; > + > +static SOC_VALUE_ENUM_SINGLE_AUTODISABLE_DECL(tdm_mux_map_enum, > + SND_SOC_NOPM, > + 0, > + 1, > + tdm_mux_map, > + tdm_mux_map_value); > + > +static const struct snd_kcontrol_new tdm_in_mux_control = > + SOC_DAPM_ENUM("TDM In Select", tdm_mux_map_enum); > + > +static const struct snd_soc_dapm_widget mtk_dai_tdm_widgets[] = { > + SND_SOC_DAPM_CLOCK_SUPPLY("aud_tdm_clk"), > + > + SND_SOC_DAPM_SUPPLY_S("TDM_EN", SUPPLY_SEQ_TDM_EN, > + ETDM_IN1_CON0, ETDM_IN1_CON0_REG_ETDM_IN_EN_SFT, > + 0, mtk_tdm_en_event, > + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD), > + /* tdm hd en */ > + SND_SOC_DAPM_SUPPLY_S(TDM_HD_EN_W_NAME, SUPPLY_SEQ_TDM_HD_EN, > + ETDM_IN1_CON2, ETDM_IN1_CON2_REG_CLOCK_SOURCE_SEL_SFT, > + 0, NULL, > + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD), > + > + SND_SOC_DAPM_SUPPLY_S(TDM_MCLK_EN_W_NAME, SUPPLY_SEQ_TDM_MCK_EN, > + SND_SOC_NOPM, 0, 0, > + mtk_tdm_mck_en_event, > + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD), > + > + SND_SOC_DAPM_INPUT("TDM_DUMMY_IN"), > + > + SND_SOC_DAPM_MUX("TDM_In_Mux", > + SND_SOC_NOPM, 0, 0, &tdm_in_mux_control), > +}; > + > +static int mtk_afe_tdm_mclk_connect(struct snd_soc_dapm_widget *source, > + struct snd_soc_dapm_widget *sink) > +{ > + struct snd_soc_dapm_widget *w = sink; > + struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm); > + struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt); > + struct mt8186_afe_private *afe_priv = afe->platform_priv; > + int dai_id = get_tdm_id_by_name(w->name); > + struct mtk_afe_tdm_priv *tdm_priv = afe_priv->dai_priv[dai_id]; > + > + if (!tdm_priv) { > + dev_err(afe->dev, "%s(), tdm_priv == NULL", __func__); > + return 0; > + } > + > + return (tdm_priv->mclk_rate > 0) ? 1 : 0; > +} > + > +static int mtk_afe_tdm_mclk_apll_connect(struct snd_soc_dapm_widget *source, > + struct snd_soc_dapm_widget *sink) > +{ > + struct snd_soc_dapm_widget *w = sink; > + struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm); > + struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt); > + struct mt8186_afe_private *afe_priv = afe->platform_priv; > + int dai_id = get_tdm_id_by_name(w->name); > + struct mtk_afe_tdm_priv *tdm_priv = afe_priv->dai_priv[dai_id]; > + int cur_apll; > + > + /* which apll */ > + cur_apll = mt8186_get_apll_by_name(afe, source->name); > + > + return (tdm_priv->mclk_apll == cur_apll) ? 1 : 0; > +} > + > +static int mtk_afe_tdm_hd_connect(struct snd_soc_dapm_widget *source, > + struct snd_soc_dapm_widget *sink) > +{ > + struct snd_soc_dapm_widget *w = sink; > + struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm); > + struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt); > + struct mt8186_afe_private *afe_priv = afe->platform_priv; > + int dai_id = get_tdm_id_by_name(w->name); > + struct mtk_afe_tdm_priv *tdm_priv = afe_priv->dai_priv[dai_id]; > + > + if (!tdm_priv) { > + dev_err(afe->dev, "%s(), tdm_priv == NULL", __func__); > + return 0; > + } > + > + return tdm_priv->low_jitter_en; > +} > + > +static int mtk_afe_tdm_apll_connect(struct snd_soc_dapm_widget *source, > + struct snd_soc_dapm_widget *sink) > +{ > + struct snd_soc_dapm_widget *w = sink; > + struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm); > + struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt); > + struct mt8186_afe_private *afe_priv = afe->platform_priv; > + int dai_id = get_tdm_id_by_name(w->name); > + struct mtk_afe_tdm_priv *tdm_priv = afe_priv->dai_priv[dai_id]; > + int cur_apll; > + int tdm_need_apll; > + > + if (!tdm_priv) { > + dev_err(afe->dev, "%s(), tdm_priv == NULL", __func__); > + return 0; > + } > + > + /* which apll */ > + cur_apll = mt8186_get_apll_by_name(afe, source->name); > + > + /* choose APLL from tdm rate */ > + tdm_need_apll = mt8186_get_apll_by_rate(afe, tdm_priv->rate); > + > + return (tdm_need_apll == cur_apll) ? 1 : 0; > +} > + > +/* low jitter control */ > +static const char * const mt8186_tdm_hd_str[] = { > + "Normal", "Low_Jitter" > +}; > + > +static const struct soc_enum mt8186_tdm_enum[] = { > + SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(mt8186_tdm_hd_str), > + mt8186_tdm_hd_str), > +}; > + > +static int mt8186_tdm_hd_get(struct snd_kcontrol *kcontrol, > + struct snd_ctl_elem_value *ucontrol) > +{ > + struct snd_soc_component *cmpnt = snd_soc_kcontrol_component(kcontrol); > + struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt); > + struct mt8186_afe_private *afe_priv = afe->platform_priv; > + int dai_id = get_tdm_id_by_name(kcontrol->id.name); > + struct mtk_afe_tdm_priv *tdm_priv = afe_priv->dai_priv[dai_id]; > + > + if (!tdm_priv) { > + dev_err(afe->dev, "%s(), tdm_priv == NULL", __func__); > + return -EINVAL; > + } > + > + ucontrol->value.integer.value[0] = tdm_priv->low_jitter_en; > + > + return 0; > +} > + > +static int mt8186_tdm_hd_set(struct snd_kcontrol *kcontrol, > + struct snd_ctl_elem_value *ucontrol) > +{ > + struct snd_soc_component *cmpnt = snd_soc_kcontrol_component(kcontrol); > + struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt); > + struct mt8186_afe_private *afe_priv = afe->platform_priv; > + int dai_id = get_tdm_id_by_name(kcontrol->id.name); > + struct mtk_afe_tdm_priv *tdm_priv = afe_priv->dai_priv[dai_id]; > + struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; > + int hd_en; > + > + if (ucontrol->value.enumerated.item[0] >= e->items) > + return -EINVAL; > + > + hd_en = ucontrol->value.integer.value[0]; > + > + dev_dbg(afe->dev, "%s(), kcontrol name %s, hd_en %d\n", > + __func__, kcontrol->id.name, hd_en); > + > + if (!tdm_priv) { > + dev_err(afe->dev, "%s(), tdm_priv == NULL", __func__); > + return -EINVAL; > + } > + > + tdm_priv->low_jitter_en = hd_en; > + > + return 0; > +} > + > +static const struct snd_kcontrol_new mtk_dai_tdm_controls[] = { > + SOC_ENUM_EXT(MTK_AFE_TDM_KCONTROL_NAME, mt8186_tdm_enum[0], > + mt8186_tdm_hd_get, mt8186_tdm_hd_set), > +}; > + > +static const struct snd_soc_dapm_route mtk_dai_tdm_routes[] = { > + {"TDM IN", NULL, "aud_tdm_clk"}, > + {"TDM IN", NULL, "TDM_EN"}, > + {"TDM IN", NULL, TDM_HD_EN_W_NAME, mtk_afe_tdm_hd_connect}, > + {TDM_HD_EN_W_NAME, NULL, APLL1_W_NAME, mtk_afe_tdm_apll_connect}, > + {TDM_HD_EN_W_NAME, NULL, APLL2_W_NAME, mtk_afe_tdm_apll_connect}, > + > + {"TDM IN", NULL, TDM_MCLK_EN_W_NAME, mtk_afe_tdm_mclk_connect}, > + {TDM_MCLK_EN_W_NAME, NULL, APLL1_W_NAME, mtk_afe_tdm_mclk_apll_connect}, > + {TDM_MCLK_EN_W_NAME, NULL, APLL2_W_NAME, mtk_afe_tdm_mclk_apll_connect}, > + > + /* allow tdm on without codec on */ > + {"TDM IN", NULL, "TDM_In_Mux"}, > + {"TDM_In_Mux", "Dummy_Widget", "TDM_DUMMY_IN"}, > +}; > + > +/* dai ops */ > +static int mtk_dai_tdm_cal_mclk(struct mtk_base_afe *afe, > + struct mtk_afe_tdm_priv *tdm_priv, > + int freq) > +{ > + int apll; > + int apll_rate; > + > + apll = mt8186_get_apll_by_rate(afe, freq); > + apll_rate = mt8186_get_apll_rate(afe, apll); > + > + if (!freq || freq > apll_rate) { > + dev_err(afe->dev, > + "%s(), freq(%d Hz) invalid\n", __func__, freq); > + return -EINVAL; > + } > + > + if (apll_rate % freq != 0) { > + dev_err(afe->dev, > + "%s(), APLL cannot generate %d Hz", __func__, freq); > + return -EINVAL; > + } > + > + tdm_priv->mclk_rate = freq; > + tdm_priv->mclk_apll = apll; > + > + return 0; > +} > + > +static int mtk_dai_tdm_hw_params(struct snd_pcm_substream *substream, > + struct snd_pcm_hw_params *params, > + struct snd_soc_dai *dai) > +{ > + struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai); > + struct mt8186_afe_private *afe_priv = afe->platform_priv; > + int tdm_id = dai->id; > + struct mtk_afe_tdm_priv *tdm_priv = afe_priv->dai_priv[tdm_id]; > + unsigned int tdm_mode = tdm_priv->tdm_mode; > + unsigned int data_mode = tdm_priv->data_mode; > + unsigned int rate = params_rate(params); > + unsigned int channels = params_channels(params); > + snd_pcm_format_t format = params_format(params); > + unsigned int bit_width = > + snd_pcm_format_physical_width(format); > + unsigned int tdm_channels = (data_mode == TDM_DATA_ONE_PIN) ? > + get_tdm_ch_per_sdata(tdm_mode, channels) : 2; > + unsigned int lrck_width = > + get_tdm_lrck_width(format, tdm_mode); > + unsigned int tdm_con = 0; > + bool slave_mode = tdm_priv->slave_mode; > + bool lrck_inv = tdm_priv->lck_invert; > + bool bck_inv = tdm_priv->bck_invert; > + unsigned int tran_rate; > + unsigned int tran_relatch_rate; > + > + if (tdm_priv) > + tdm_priv->rate = rate; > + else { > + dev_err(afe->dev, "%s(), tdm_priv == NULL", __func__); > + return -EINVAL; > + } This can be simpler: if (!tdm_priv) { dev_err .... return -EINVAL; } tdm_priv->rate = rate; ...with that fixed: Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Il 13/03/22 16:10, Jiaxin Yu ha scritto: > Add support for mt8186 board with mt6366, da7219 and max98357. > > Signed-off-by: Jiaxin Yu <jiaxin.yu@mediatek.com> > --- > .../mt8186/mt8186-mt6366-da7219-max98357.c | 924 ++++++++++++++++++ > 1 file changed, 924 insertions(+) > create mode 100644 sound/soc/mediatek/mt8186/mt8186-mt6366-da7219-max98357.c > Hello Jiaxin, I see some duplication between this one and the mt6366-rt1019-rt5682s.... ....for this reason, I would propose to split out the MT6366 bits into a common file, something like mt8186-mt6366-common.c, as to reduce the duplication. If it is expected to see MT8186 machines with DA7219 or MAX98357, then it'd be a good idea to also do something about preventively commonizing these ones, like it is being done in ... MT8192, if I remember correctly. Regards, Angelo
On Mon, 2022-03-14 at 11:18 +0100, AngeloGioacchino Del Regno wrote: > Il 13/03/22 16:10, Jiaxin Yu ha scritto: > > This fixes the following build errors when mt6358 is configured as > > module: > > > > > > ERROR: modpost: "mt6358_set_mtkaif_protocol" > > > > [sound/soc/mediatek/mt8186/mt8186-mt6366-rt1019-rt5682s.ko] > > > > undefined! > > > > ERROR: modpost: "mt6358_set_mtkaif_protocol" > > > > [sound/soc/mediatek/mt8186/mt8186-mt6366-da7219-max98357.ko] > > > > undefined! > > > > Signed-off-by: Jiaxin Yu <jiaxin.yu@mediatek.com> > > Hello Jiaxin, > > Can you please add a Fixes tag to this patch and send it separately > from > the MT8186 series? > > After adding the Fixes tag: > Reviewed-by: AngeloGioacchino Del Regno < > angelogioacchino.delregno@collabora.com> > > Thanks, > Angelo > Hello Angelo, OK, I will send this patch with the Fixes tag separately from the MT8186 series. Thanks, Jiaxin.Yu > > --- > > sound/soc/codecs/mt6358.c | 4 ++++ > > 1 file changed, 4 insertions(+) > > > > diff --git a/sound/soc/codecs/mt6358.c b/sound/soc/codecs/mt6358.c > > index 1fdd2f8cf877..61f2a7632fd4 100644 > > --- a/sound/soc/codecs/mt6358.c > > +++ b/sound/soc/codecs/mt6358.c > > @@ -107,6 +107,7 @@ int mt6358_set_mtkaif_protocol(struct > > snd_soc_component *cmpnt, > > priv->mtkaif_protocol = mtkaif_protocol; > > return 0; > > } > > +EXPORT_SYMBOL_GPL(mt6358_set_mtkaif_protocol); > > > > static void playback_gpio_set(struct mt6358_priv *priv) > > { > > @@ -273,6 +274,7 @@ int mt6358_mtkaif_calibration_enable(struct > > snd_soc_component *cmpnt) > > 1 << RG_AUD_PAD_TOP_DAT_MISO_LOOPBACK_SFT); > > return 0; > > } > > +EXPORT_SYMBOL_GPL(mt6358_mtkaif_calibration_enable); > > > > int mt6358_mtkaif_calibration_disable(struct snd_soc_component > > *cmpnt) > > { > > @@ -296,6 +298,7 @@ int mt6358_mtkaif_calibration_disable(struct > > snd_soc_component *cmpnt) > > capture_gpio_reset(priv); > > return 0; > > } > > +EXPORT_SYMBOL_GPL(mt6358_mtkaif_calibration_disable); > > > > int mt6358_set_mtkaif_calibration_phase(struct snd_soc_component > > *cmpnt, > > int phase_1, int phase_2) > > @@ -310,6 +313,7 @@ int mt6358_set_mtkaif_calibration_phase(struct > > snd_soc_component *cmpnt, > > phase_2 << RG_AUD_PAD_TOP_PHASE_MODE2_SFT); > > return 0; > > } > > +EXPORT_SYMBOL_GPL(mt6358_set_mtkaif_calibration_phase); > > > > /* dl pga gain */ > > enum { > >
On Mon, Mar 14, 2022 at 11:39:11AM +0100, AngeloGioacchino Del Regno wrote: > Il 13/03/22 16:10, Jiaxin Yu ha scritto: > > Add mt8186 tdm dai driver. > > > > Signed-off-by: Jiaxin Yu <jiaxin.yu@mediatek.com> > > --- > > sound/soc/mediatek/mt8186/mt8186-dai-tdm.c | 695 +++++++++++++++++++++ > > 1 file changed, 695 insertions(+) > > create mode 100644 sound/soc/mediatek/mt8186/mt8186-dai-tdm.c > > > > diff --git a/sound/soc/mediatek/mt8186/mt8186-dai-tdm.c b/sound/soc/mediatek/mt8186/mt8186-dai-tdm.c Please delete unneeded context from mails when replying. Doing this makes it much easier to find your reply in the message, helping ensure it won't be missed by people scrolling through the irrelevant quoted material.
Il 15/03/22 14:15, Mark Brown ha scritto: > On Mon, Mar 14, 2022 at 11:39:11AM +0100, AngeloGioacchino Del Regno wrote: >> Il 13/03/22 16:10, Jiaxin Yu ha scritto: >>> Add mt8186 tdm dai driver. >>> >>> Signed-off-by: Jiaxin Yu <jiaxin.yu@mediatek.com> >>> --- >>> sound/soc/mediatek/mt8186/mt8186-dai-tdm.c | 695 +++++++++++++++++++++ >>> 1 file changed, 695 insertions(+) >>> create mode 100644 sound/soc/mediatek/mt8186/mt8186-dai-tdm.c >>> >>> diff --git a/sound/soc/mediatek/mt8186/mt8186-dai-tdm.c b/sound/soc/mediatek/mt8186/mt8186-dai-tdm.c > > Please delete unneeded context from mails when replying. Doing this > makes it much easier to find your reply in the message, helping ensure > it won't be missed by people scrolling through the irrelevant quoted > material. I'm sorry Mark, I usually do that, but this time it appears that for some reason I forgot to delete the context on top of my reply, and ended up deleting only the one on the bottom of it. I'll pay more attention to that next time. Sorry again.
On Mon, 2022-03-14 at 11:18 +0100, AngeloGioacchino Del Regno wrote: > Il 13/03/22 16:10, Jiaxin Yu ha scritto: > > This fixes the following build errors when mt6358 is configured as > > module: > > > > > > ERROR: modpost: "mt6358_set_mtkaif_protocol" > > > > [sound/soc/mediatek/mt8186/mt8186-mt6366-rt1019-rt5682s.ko] > > > > undefined! > > > > ERROR: modpost: "mt6358_set_mtkaif_protocol" > > > > [sound/soc/mediatek/mt8186/mt8186-mt6366-da7219-max98357.ko] > > > > undefined! > > > > Signed-off-by: Jiaxin Yu <jiaxin.yu@mediatek.com> > > Hello Jiaxin, > > Can you please add a Fixes tag to this patch and send it separately > from > the MT8186 series? > > After adding the Fixes tag: > Reviewed-by: AngeloGioacchino Del Regno < > angelogioacchino.delregno@collabora.com> > > Thanks, > Angelo > Hello, Angelo Sorry for the late reply. I've sent this out separately. Link: https://lore.kernel.org/lkml/20220319120325.11882-1-jiaxin.yu@mediatek.com/ > > --- > > sound/soc/codecs/mt6358.c | 4 ++++ > > 1 file changed, 4 insertions(+) > > > > diff --git a/sound/soc/codecs/mt6358.c b/sound/soc/codecs/mt6358.c > > index 1fdd2f8cf877..61f2a7632fd4 100644 > > --- a/sound/soc/codecs/mt6358.c > > +++ b/sound/soc/codecs/mt6358.c > > @@ -107,6 +107,7 @@ int mt6358_set_mtkaif_protocol(struct > > snd_soc_component *cmpnt, > > priv->mtkaif_protocol = mtkaif_protocol; > > return 0; > > } > > +EXPORT_SYMBOL_GPL(mt6358_set_mtkaif_protocol); > > > > static void playback_gpio_set(struct mt6358_priv *priv) > > { > > @@ -273,6 +274,7 @@ int mt6358_mtkaif_calibration_enable(struct > > snd_soc_component *cmpnt) > > 1 << RG_AUD_PAD_TOP_DAT_MISO_LOOPBACK_SFT); > > return 0; > > } > > +EXPORT_SYMBOL_GPL(mt6358_mtkaif_calibration_enable); > > > > int mt6358_mtkaif_calibration_disable(struct snd_soc_component > > *cmpnt) > > { > > @@ -296,6 +298,7 @@ int mt6358_mtkaif_calibration_disable(struct > > snd_soc_component *cmpnt) > > capture_gpio_reset(priv); > > return 0; > > } > > +EXPORT_SYMBOL_GPL(mt6358_mtkaif_calibration_disable); > > > > int mt6358_set_mtkaif_calibration_phase(struct snd_soc_component > > *cmpnt, > > int phase_1, int phase_2) > > @@ -310,6 +313,7 @@ int mt6358_set_mtkaif_calibration_phase(struct > > snd_soc_component *cmpnt, > > phase_2 << RG_AUD_PAD_TOP_PHASE_MODE2_SFT); > > return 0; > > } > > +EXPORT_SYMBOL_GPL(mt6358_set_mtkaif_calibration_phase); > > > > /* dl pga gain */ > > enum { > >
On Mon, 2022-03-14 at 11:44 +0100, AngeloGioacchino Del Regno wrote: > Il 13/03/22 16:10, Jiaxin Yu ha scritto: > > Add support for mt8186 board with mt6366, da7219 and max98357. > > > > Signed-off-by: Jiaxin Yu <jiaxin.yu@mediatek.com> > > --- > > .../mt8186/mt8186-mt6366-da7219-max98357.c | 924 > > ++++++++++++++++++ > > 1 file changed, 924 insertions(+) > > create mode 100644 sound/soc/mediatek/mt8186/mt8186-mt6366- > > da7219-max98357.c > > > > Hello Jiaxin, > > I see some duplication between this one and the mt6366-rt1019- > rt5682s.... > ....for this reason, I would propose to split out the MT6366 bits > into a > common file, something like mt8186-mt6366-common.c, as to reduce the > duplication. > Hello Angelo, I'm sorry to reply so later about this comment. I've been thinking about the repetition of these two machine driver recently. The biggest difference between them are the .init .ops and .be_hw_params_fixup callback functions of BE's dai_link. So I want break them down into rt1019-rt5682s.c and da7219-max98357.c, the rest becomes mt8186- mt6366.c. SND_SOC_MT8186_MT6366 ==> mt8186-mt6366.c SND_SOC_RT1019_RT5682S ==> rt1019-rt5682s.c SND_SOC_DA7219_MAX98357 ==> da7219-max98357.c Or put these three files in the same mt8186-mt6366.c, then distinguish by different compatible string. If it is expected to see MT8186 machines with DA7219 or MAX98357, > then it'd be a > good idea to also do something about preventively commonizing these > ones, like > it is being done in ... MT8192, if I remember correctly. > > Regards, > Angelo Yes, I will change this part that being done in MT8192 to simplify the code. But the part of mt8192 is being reviewed. I'm not sure if you have any comments about this series. Link: https://lore.kernel.org/linux-arm-kernel/20220402051754.17513-1-jiaxin.yu@mediatek.com/T/ Jiaxin.Yu Thanks.
From: Jiaxin Yu <jiaxin.yu@mediatek.corp-partner.google.com> This series of patches adds support for Mediatek AFE of MT8186 Soc. Patches are based on broonie tree "for-next" branch. Changes since v2: - add a new compatible string "mediatek,mt6366-sound" - modify the log level for simplicity - use dev_err_probe(...) instead of dev_err(...) in dev probe() - optimized the logic of some code - use BIT() and GENMASK() macros to descript the registers Thanks for AngeloGioacchino's careful reviews. Changes since v1: [v2 01/17] - add a new ID to the existing mt6358 codec driver [v2 03/17] - modify log level in DAPM events - use standard numeric control with name ending in Switch - return 1 when the value changed in mixer control's .get callback [v2 05/17] - ending in Switch to the standard on/off controls - change to "HW Gain 1 Volume" and "HW Gain 2 Volume" [v2 09/17] - return an error in the default case rather than just picking one of the behaviours when do .set_fmt - use the new defines that are _PROVIDER_MASK, _DAIFMT_CBP_CFP and _DAIFMT_CBC_CFC [v2 10/17] [v2 11/17] - the clock and gpio are aplit out into separate patches The source file's GPL comment use c++ style, and the header fils's GPL comment use c style. We have added "Switch" after the names of all the controls that just are simple on/off. Jiaxin Yu (19): ASoC: mediatek: mt6366: support for mt6366 codec dt-bindings: mediatek: mt6358: add new compatible for using mt6366 ASoC: mediatek: mt8186: support audsys clock control ASoC: mediatek: mt8186: support adda in platform driver ASoC: mediatek: mt8186: support hostless in platform driver ASoC: mediatek: mt8186: support hw gain in platform driver ASoC: mediatek: mt8186: support i2s in platform driver ASoC: mediatek: mt8186: support pcm in platform driver ASoC: mediatek: mt8186: support src in platform driver ASoC: mediatek: mt8186: support tdm in platform driver ASoC: mediatek: mt8186: support audio clock control in platform driver ASoC: mediatek: mt8186: support gpio control in platform driver ASoC: mediatek: mt8186: add platform driver dt-bindings: mediatek: mt8186: add audio afe document ASoC: mediatek: mt8186: add machine driver with mt6366, da7219 and max98357 dt-bindings: mediatek: mt8186: add mt8186-mt6366-da7219-max98357 document ASoC: mediatek: mt8186: add machine driver with mt6366, rt1019 and rt5682s dt-bindings: mediatek: mt8186: add mt8186-mt6366-rt1019-rt5682s document ASoC: mediatek: mt6358: add missing EXPORT_SYMBOLs .../devicetree/bindings/sound/mt6358.txt | 4 +- .../bindings/sound/mt8186-afe-pcm.yaml | 175 + .../sound/mt8186-mt6366-da7219-max98357.yaml | 47 + .../sound/mt8186-mt6366-rt1019-rt5682s.yaml | 47 + sound/soc/codecs/mt6358.c | 5 + sound/soc/mediatek/Kconfig | 44 + sound/soc/mediatek/Makefile | 1 + sound/soc/mediatek/mt8186/Makefile | 21 + sound/soc/mediatek/mt8186/mt8186-afe-clk.c | 651 ++++ sound/soc/mediatek/mt8186/mt8186-afe-clk.h | 106 + sound/soc/mediatek/mt8186/mt8186-afe-common.h | 235 ++ .../soc/mediatek/mt8186/mt8186-afe-control.c | 261 ++ sound/soc/mediatek/mt8186/mt8186-afe-gpio.c | 244 ++ sound/soc/mediatek/mt8186/mt8186-afe-gpio.h | 19 + sound/soc/mediatek/mt8186/mt8186-afe-pcm.c | 3001 +++++++++++++++++ sound/soc/mediatek/mt8186/mt8186-audsys-clk.c | 150 + sound/soc/mediatek/mt8186/mt8186-audsys-clk.h | 15 + .../soc/mediatek/mt8186/mt8186-audsys-clkid.h | 45 + sound/soc/mediatek/mt8186/mt8186-dai-adda.c | 878 +++++ .../soc/mediatek/mt8186/mt8186-dai-hostless.c | 298 ++ .../soc/mediatek/mt8186/mt8186-dai-hw-gain.c | 236 ++ sound/soc/mediatek/mt8186/mt8186-dai-i2s.c | 1355 ++++++++ sound/soc/mediatek/mt8186/mt8186-dai-pcm.c | 423 +++ sound/soc/mediatek/mt8186/mt8186-dai-src.c | 726 ++++ sound/soc/mediatek/mt8186/mt8186-dai-tdm.c | 695 ++++ .../mediatek/mt8186/mt8186-interconnection.h | 69 + .../soc/mediatek/mt8186/mt8186-misc-control.c | 295 ++ .../mt8186/mt8186-mt6366-da7219-max98357.c | 924 +++++ .../mt8186/mt8186-mt6366-rt1019-rt5682s.c | 900 +++++ sound/soc/mediatek/mt8186/mt8186-reg.h | 2913 ++++++++++++++++ 30 files changed, 14782 insertions(+), 1 deletion(-) create mode 100644 Documentation/devicetree/bindings/sound/mt8186-afe-pcm.yaml create mode 100644 Documentation/devicetree/bindings/sound/mt8186-mt6366-da7219-max98357.yaml create mode 100644 Documentation/devicetree/bindings/sound/mt8186-mt6366-rt1019-rt5682s.yaml create mode 100644 sound/soc/mediatek/mt8186/Makefile create mode 100644 sound/soc/mediatek/mt8186/mt8186-afe-clk.c create mode 100644 sound/soc/mediatek/mt8186/mt8186-afe-clk.h create mode 100644 sound/soc/mediatek/mt8186/mt8186-afe-common.h create mode 100644 sound/soc/mediatek/mt8186/mt8186-afe-control.c create mode 100644 sound/soc/mediatek/mt8186/mt8186-afe-gpio.c create mode 100644 sound/soc/mediatek/mt8186/mt8186-afe-gpio.h create mode 100644 sound/soc/mediatek/mt8186/mt8186-afe-pcm.c create mode 100644 sound/soc/mediatek/mt8186/mt8186-audsys-clk.c create mode 100644 sound/soc/mediatek/mt8186/mt8186-audsys-clk.h create mode 100644 sound/soc/mediatek/mt8186/mt8186-audsys-clkid.h create mode 100644 sound/soc/mediatek/mt8186/mt8186-dai-adda.c create mode 100644 sound/soc/mediatek/mt8186/mt8186-dai-hostless.c create mode 100644 sound/soc/mediatek/mt8186/mt8186-dai-hw-gain.c create mode 100644 sound/soc/mediatek/mt8186/mt8186-dai-i2s.c create mode 100644 sound/soc/mediatek/mt8186/mt8186-dai-pcm.c create mode 100644 sound/soc/mediatek/mt8186/mt8186-dai-src.c create mode 100644 sound/soc/mediatek/mt8186/mt8186-dai-tdm.c create mode 100644 sound/soc/mediatek/mt8186/mt8186-interconnection.h create mode 100644 sound/soc/mediatek/mt8186/mt8186-misc-control.c create mode 100644 sound/soc/mediatek/mt8186/mt8186-mt6366-da7219-max98357.c create mode 100644 sound/soc/mediatek/mt8186/mt8186-mt6366-rt1019-rt5682s.c create mode 100644 sound/soc/mediatek/mt8186/mt8186-reg.h