mbox series

[v2,0/2] Add support for ARTPEC-8 UART

Message ID 20220311094515.3223023-1-vincent.whitchurch@axis.com
Headers show
Series Add support for ARTPEC-8 UART | expand

Message

Vincent Whitchurch March 11, 2022, 9:45 a.m. UTC 
This series adds support for the UART hardware on the ARTPEC-8 chip.  This
block is already supported by an existing driver so only a small patch to
describe the properties of the variant is required.

v2:
- This version is based on top of Krzysztof's "minor fixes/cleanups" series
  since they will conflict otherwise.
- Expand commit messages
- Define required clocks in binding
- Fix FIFO size

Cc: linux-kernel@vger.kernel.org
Cc: devicetree@vger.kernel.org
Cc: linux-serial@vger.kernel.org
Cc: linux-samsung-soc@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: robh+dt@kernel.org
Cc: alim.akhtar@samsung.com

Vincent Whitchurch (2):
  dt-bindings: serial: samsung: Add ARTPEC-8 UART
  tty: serial: samsung: Add ARTPEC-8 support

 .../bindings/serial/samsung_uart.yaml         |  2 +
 drivers/tty/serial/Kconfig                    |  2 +-
 drivers/tty/serial/samsung_tty.c              | 37 +++++++++++++++++++
 3 files changed, 40 insertions(+), 1 deletion(-)

Comments

Krzysztof Kozlowski March 11, 2022, 10:42 a.m. UTC | #1 
On 11/03/2022 10:45, Vincent Whitchurch wrote:
> Add support for the UART block on the ARTPEC-8 SoC.  This is closely
> related to the variants used on the Exynos chips.  The register layout
> is identical to Exynos850 et al but the fifo size is different (64 bytes
> in each direction for all instances).
> 
> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
> Signed-off-by: Vincent Whitchurch <vincent.whitchurch@axis.com>
> ---
> 
> Notes:
>     v2:
>     - Added Krzysztof's Reviewed-by.
>     - Expanded commit message
>     - Fixed fifo size
>     - Rebased on top of Krzysztof's "minor fixes/cleanups" series.  This needed a
>       couple of fixes for build errors.
>     
>     (I'm always unsure if Reviewed-by should be carried over or not if the fixes
>     are minor.  I apologize in advance if carring it over was the wrong thing to do
>     in this case.)

For minor fixes, usually we carry Rb tag over. It's fine.

LGTM

Best regards,
Krzysztof
Krzysztof Kozlowski March 11, 2022, 10:44 a.m. UTC | #2 
On 11/03/2022 11:42, Krzysztof Kozlowski wrote:
> On 11/03/2022 10:45, Vincent Whitchurch wrote:
>> Add support for the UART block on the ARTPEC-8 SoC.  This is closely
>> related to the variants used on the Exynos chips.  The register layout
>> is identical to Exynos850 et al but the fifo size is different (64 bytes
>> in each direction for all instances).
>>
>> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
>> Signed-off-by: Vincent Whitchurch <vincent.whitchurch@axis.com>
>> ---
>>
>> Notes:
>>     v2:
>>     - Added Krzysztof's Reviewed-by.
>>     - Expanded commit message
>>     - Fixed fifo size
>>     - Rebased on top of Krzysztof's "minor fixes/cleanups" series.  This needed a
>>       couple of fixes for build errors.
>>     
>>     (I'm always unsure if Reviewed-by should be carried over or not if the fixes
>>     are minor.  I apologize in advance if carring it over was the wrong thing to do
>>     in this case.)
> 
> For minor fixes, usually we carry Rb tag over. It's fine.
> 

Hi Greg,

Just one note for you - this depends now on my v3 patchset here:
https://lore.kernel.org/all/20220308080919.152715-1-krzysztof.kozlowski@canonical.com/


Best regards,
Krzysztof