Message ID | 20220110122714.20744-2-gaurav.jain@nxp.com |
---|---|
State | Changes Requested |
Delegated to: | Stefano Babic |
Headers | show |
Series | Add CAAM driver model support | expand |
Hi Gaurav, rather I still have issues to run CI with this applied. The reason is that this adds an overhead to SPL and it breaks the board imx6dl_mamoj because SPL exceeds the maximum size for a DL SOC. See https://source.denx.de/u-boot/custodians/u-boot-imx/-/jobs/387370 I do not know if it is possible to drop some features from SPL for this board (Added Marek as board maintainer). Best regards, Stefano On 10.01.22 13:27, Gaurav Jain wrote: > added device tree support for job ring driver. > sec is initialized based on job ring information processed > from device tree. > > Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com> > Reviewed-by: Ye Li <ye.li@nxp.com> > --- > drivers/crypto/fsl/jr.c | 323 ++++++++++++++++++++++++++-------------- > drivers/crypto/fsl/jr.h | 31 +++- > 2 files changed, 240 insertions(+), 114 deletions(-) > > diff --git a/drivers/crypto/fsl/jr.c b/drivers/crypto/fsl/jr.c > index 22b649219e..8103987425 100644 > --- a/drivers/crypto/fsl/jr.c > +++ b/drivers/crypto/fsl/jr.c > @@ -1,7 +1,7 @@ > // SPDX-License-Identifier: GPL-2.0+ > /* > * Copyright 2008-2014 Freescale Semiconductor, Inc. > - * Copyright 2018 NXP > + * Copyright 2018, 2021 NXP > * > * Based on CAAM driver in drivers/crypto/caam in Linux > */ > @@ -11,7 +11,6 @@ > #include <linux/kernel.h> > #include <log.h> > #include <malloc.h> > -#include "fsl_sec.h" > #include "jr.h" > #include "jobdesc.h" > #include "desc_constr.h" > @@ -21,7 +20,10 @@ > #include <asm/cache.h> > #include <asm/fsl_pamu.h> > #endif > +#include <dm.h> > #include <dm/lists.h> > +#include <dm/root.h> > +#include <dm/device-internal.h> > #include <linux/delay.h> > > #define CIRC_CNT(head, tail, size) (((head) - (tail)) & (size - 1)) > @@ -35,20 +37,29 @@ uint32_t sec_offset[CONFIG_SYS_FSL_MAX_NUM_OF_SEC] = { > #endif > }; > > +#if CONFIG_IS_ENABLED(DM) > +struct udevice *caam_dev; > +#else > #define SEC_ADDR(idx) \ > (ulong)((CONFIG_SYS_FSL_SEC_ADDR + sec_offset[idx])) > > #define SEC_JR0_ADDR(idx) \ > (ulong)(SEC_ADDR(idx) + \ > (CONFIG_SYS_FSL_JR0_OFFSET - CONFIG_SYS_FSL_SEC_OFFSET)) > +struct caam_regs caam_st; > +#endif > > -struct jobring jr0[CONFIG_SYS_FSL_MAX_NUM_OF_SEC]; > +static inline u32 jr_start_reg(u8 jrid) > +{ > + return (1 << jrid); > +} > > -static inline void start_jr0(uint8_t sec_idx) > +static inline void start_jr(struct caam_regs *caam) > { > - ccsr_sec_t *sec = (void *)SEC_ADDR(sec_idx); > + ccsr_sec_t *sec = caam->sec; > u32 ctpr_ms = sec_in32(&sec->ctpr_ms); > u32 scfgr = sec_in32(&sec->scfgr); > + u32 jrstart = jr_start_reg(caam->jrid); > > if (ctpr_ms & SEC_CTPR_MS_VIRT_EN_INCL) { > /* VIRT_EN_INCL = 1 & VIRT_EN_POR = 1 or > @@ -56,23 +67,16 @@ static inline void start_jr0(uint8_t sec_idx) > */ > if ((ctpr_ms & SEC_CTPR_MS_VIRT_EN_POR) || > (scfgr & SEC_SCFGR_VIRT_EN)) > - sec_out32(&sec->jrstartr, CONFIG_JRSTARTR_JR0); > + sec_out32(&sec->jrstartr, jrstart); > } else { > /* VIRT_EN_INCL = 0 && VIRT_EN_POR_VALUE = 1 */ > if (ctpr_ms & SEC_CTPR_MS_VIRT_EN_POR) > - sec_out32(&sec->jrstartr, CONFIG_JRSTARTR_JR0); > + sec_out32(&sec->jrstartr, jrstart); > } > } > > -static inline void jr_reset_liodn(uint8_t sec_idx) > +static inline void jr_disable_irq(struct jr_regs *regs) > { > - ccsr_sec_t *sec = (void *)SEC_ADDR(sec_idx); > - sec_out32(&sec->jrliodnr[0].ls, 0); > -} > - > -static inline void jr_disable_irq(uint8_t sec_idx) > -{ > - struct jr_regs *regs = (struct jr_regs *)SEC_JR0_ADDR(sec_idx); > uint32_t jrcfg = sec_in32(®s->jrcfg1); > > jrcfg = jrcfg | JR_INTMASK; > @@ -80,10 +84,10 @@ static inline void jr_disable_irq(uint8_t sec_idx) > sec_out32(®s->jrcfg1, jrcfg); > } > > -static void jr_initregs(uint8_t sec_idx) > +static void jr_initregs(uint8_t sec_idx, struct caam_regs *caam) > { > - struct jr_regs *regs = (struct jr_regs *)SEC_JR0_ADDR(sec_idx); > - struct jobring *jr = &jr0[sec_idx]; > + struct jr_regs *regs = caam->regs; > + struct jobring *jr = &caam->jr[sec_idx]; > caam_dma_addr_t ip_base = virt_to_phys((void *)jr->input_ring); > caam_dma_addr_t op_base = virt_to_phys((void *)jr->output_ring); > > @@ -103,16 +107,16 @@ static void jr_initregs(uint8_t sec_idx) > sec_out32(®s->irs, JR_SIZE); > > if (!jr->irq) > - jr_disable_irq(sec_idx); > + jr_disable_irq(regs); > } > > -static int jr_init(uint8_t sec_idx) > +static int jr_init(uint8_t sec_idx, struct caam_regs *caam) > { > - struct jobring *jr = &jr0[sec_idx]; > + struct jobring *jr = &caam->jr[sec_idx]; > > memset(jr, 0, sizeof(struct jobring)); > > - jr->jq_id = DEFAULT_JR_ID; > + jr->jq_id = caam->jrid; > jr->irq = DEFAULT_IRQ; > > #ifdef CONFIG_FSL_CORENET > @@ -134,53 +138,8 @@ static int jr_init(uint8_t sec_idx) > memset(jr->input_ring, 0, JR_SIZE * sizeof(caam_dma_addr_t)); > memset(jr->output_ring, 0, jr->op_size); > > - start_jr0(sec_idx); > - > - jr_initregs(sec_idx); > - > - return 0; > -} > - > -static int jr_sw_cleanup(uint8_t sec_idx) > -{ > - struct jobring *jr = &jr0[sec_idx]; > - > - jr->head = 0; > - jr->tail = 0; > - jr->read_idx = 0; > - jr->write_idx = 0; > - memset(jr->info, 0, sizeof(jr->info)); > - memset(jr->input_ring, 0, jr->size * sizeof(caam_dma_addr_t)); > - memset(jr->output_ring, 0, jr->size * sizeof(struct op_ring)); > - > - return 0; > -} > - > -static int jr_hw_reset(uint8_t sec_idx) > -{ > - struct jr_regs *regs = (struct jr_regs *)SEC_JR0_ADDR(sec_idx); > - uint32_t timeout = 100000; > - uint32_t jrint, jrcr; > - > - sec_out32(®s->jrcr, JRCR_RESET); > - do { > - jrint = sec_in32(®s->jrint); > - } while (((jrint & JRINT_ERR_HALT_MASK) == > - JRINT_ERR_HALT_INPROGRESS) && --timeout); > - > - jrint = sec_in32(®s->jrint); > - if (((jrint & JRINT_ERR_HALT_MASK) != > - JRINT_ERR_HALT_INPROGRESS) && timeout == 0) > - return -1; > - > - timeout = 100000; > - sec_out32(®s->jrcr, JRCR_RESET); > - do { > - jrcr = sec_in32(®s->jrcr); > - } while ((jrcr & JRCR_RESET) && --timeout); > - > - if (timeout == 0) > - return -1; > + start_jr(caam); > + jr_initregs(sec_idx, caam); > > return 0; > } > @@ -188,10 +147,10 @@ static int jr_hw_reset(uint8_t sec_idx) > /* -1 --- error, can't enqueue -- no space available */ > static int jr_enqueue(uint32_t *desc_addr, > void (*callback)(uint32_t status, void *arg), > - void *arg, uint8_t sec_idx) > + void *arg, uint8_t sec_idx, struct caam_regs *caam) > { > - struct jr_regs *regs = (struct jr_regs *)SEC_JR0_ADDR(sec_idx); > - struct jobring *jr = &jr0[sec_idx]; > + struct jr_regs *regs = caam->regs; > + struct jobring *jr = &caam->jr[sec_idx]; > int head = jr->head; > uint32_t desc_word; > int length = desc_len(desc_addr); > @@ -263,10 +222,10 @@ static int jr_enqueue(uint32_t *desc_addr, > return 0; > } > > -static int jr_dequeue(int sec_idx) > +static int jr_dequeue(int sec_idx, struct caam_regs *caam) > { > - struct jr_regs *regs = (struct jr_regs *)SEC_JR0_ADDR(sec_idx); > - struct jobring *jr = &jr0[sec_idx]; > + struct jr_regs *regs = caam->regs; > + struct jobring *jr = &caam->jr[sec_idx]; > int head = jr->head; > int tail = jr->tail; > int idx, i, found; > @@ -349,14 +308,18 @@ static void desc_done(uint32_t status, void *arg) > { > struct result *x = arg; > x->status = status; > -#ifndef CONFIG_SPL_BUILD > caam_jr_strstatus(status); > -#endif > x->done = 1; > } > > static inline int run_descriptor_jr_idx(uint32_t *desc, uint8_t sec_idx) > { > + struct caam_regs *caam; > +#if CONFIG_IS_ENABLED(DM) > + caam = dev_get_priv(caam_dev); > +#else > + caam = &caam_st; > +#endif > unsigned long long timeval = 0; > unsigned long long timeout = CONFIG_USEC_DEQ_TIMEOUT; > struct result op; > @@ -364,7 +327,7 @@ static inline int run_descriptor_jr_idx(uint32_t *desc, uint8_t sec_idx) > > memset(&op, 0, sizeof(op)); > > - ret = jr_enqueue(desc, desc_done, &op, sec_idx); > + ret = jr_enqueue(desc, desc_done, &op, sec_idx, caam); > if (ret) { > debug("Error in SEC enq\n"); > ret = JQ_ENQ_ERR; > @@ -375,7 +338,7 @@ static inline int run_descriptor_jr_idx(uint32_t *desc, uint8_t sec_idx) > udelay(1); > timeval += 1; > > - ret = jr_dequeue(sec_idx); > + ret = jr_dequeue(sec_idx, caam); > if (ret) { > debug("Error in SEC deq\n"); > ret = JQ_DEQ_ERR; > @@ -402,13 +365,62 @@ int run_descriptor_jr(uint32_t *desc) > return run_descriptor_jr_idx(desc, 0); > } > > +static int jr_sw_cleanup(uint8_t sec_idx, struct caam_regs *caam) > +{ > + struct jobring *jr = &caam->jr[sec_idx]; > + > + jr->head = 0; > + jr->tail = 0; > + jr->read_idx = 0; > + jr->write_idx = 0; > + memset(jr->info, 0, sizeof(jr->info)); > + memset(jr->input_ring, 0, jr->size * sizeof(caam_dma_addr_t)); > + memset(jr->output_ring, 0, jr->size * sizeof(struct op_ring)); > + > + return 0; > +} > + > +static int jr_hw_reset(struct jr_regs *regs) > +{ > + uint32_t timeout = 100000; > + uint32_t jrint, jrcr; > + > + sec_out32(®s->jrcr, JRCR_RESET); > + do { > + jrint = sec_in32(®s->jrint); > + } while (((jrint & JRINT_ERR_HALT_MASK) == > + JRINT_ERR_HALT_INPROGRESS) && --timeout); > + > + jrint = sec_in32(®s->jrint); > + if (((jrint & JRINT_ERR_HALT_MASK) != > + JRINT_ERR_HALT_INPROGRESS) && timeout == 0) > + return -1; > + > + timeout = 100000; > + sec_out32(®s->jrcr, JRCR_RESET); > + do { > + jrcr = sec_in32(®s->jrcr); > + } while ((jrcr & JRCR_RESET) && --timeout); > + > + if (timeout == 0) > + return -1; > + > + return 0; > +} > + > static inline int jr_reset_sec(uint8_t sec_idx) > { > - if (jr_hw_reset(sec_idx) < 0) > + struct caam_regs *caam; > +#if CONFIG_IS_ENABLED(DM) > + caam = dev_get_priv(caam_dev); > +#else > + caam = &caam_st; > +#endif > + if (jr_hw_reset(caam->regs) < 0) > return -1; > > /* Clean up the jobring structure maintained by software */ > - jr_sw_cleanup(sec_idx); > + jr_sw_cleanup(sec_idx, caam); > > return 0; > } > @@ -418,9 +430,15 @@ int jr_reset(void) > return jr_reset_sec(0); > } > > -static inline int sec_reset_idx(uint8_t sec_idx) > +int sec_reset(void) > { > - ccsr_sec_t *sec = (void *)SEC_ADDR(sec_idx); > + struct caam_regs *caam; > +#if CONFIG_IS_ENABLED(DM) > + caam = dev_get_priv(caam_dev); > +#else > + caam = &caam_st; > +#endif > + ccsr_sec_t *sec = caam->sec; > uint32_t mcfgr = sec_in32(&sec->mcfgr); > uint32_t timeout = 100000; > > @@ -446,11 +464,7 @@ static inline int sec_reset_idx(uint8_t sec_idx) > > return 0; > } > -int sec_reset(void) > -{ > - return sec_reset_idx(0); > -} > -#ifndef CONFIG_SPL_BUILD > + > static int deinstantiate_rng(u8 sec_idx, int state_handle_mask) > { > u32 *desc; > @@ -496,12 +510,11 @@ static int deinstantiate_rng(u8 sec_idx, int state_handle_mask) > return ret; > } > > -static int instantiate_rng(u8 sec_idx, int gen_sk) > +static int instantiate_rng(uint8_t sec_idx, ccsr_sec_t *sec, int gen_sk) > { > u32 *desc; > u32 rdsta_val; > int ret = 0, sh_idx, size; > - ccsr_sec_t __iomem *sec = (ccsr_sec_t __iomem *)SEC_ADDR(sec_idx); > struct rng4tst __iomem *rng = > (struct rng4tst __iomem *)&sec->rng; > > @@ -554,9 +567,8 @@ static int instantiate_rng(u8 sec_idx, int gen_sk) > return ret; > } > > -static u8 get_rng_vid(uint8_t sec_idx) > +static u8 get_rng_vid(ccsr_sec_t *sec) > { > - ccsr_sec_t *sec = (void *)SEC_ADDR(sec_idx); > u8 vid; > > if (caam_get_era() < 10) { > @@ -574,9 +586,8 @@ static u8 get_rng_vid(uint8_t sec_idx) > * By default, the TRNG runs for 200 clocks per sample; > * 1200 clocks per sample generates better entropy. > */ > -static void kick_trng(int ent_delay, uint8_t sec_idx) > +static void kick_trng(int ent_delay, ccsr_sec_t *sec) > { > - ccsr_sec_t __iomem *sec = (ccsr_sec_t __iomem *)SEC_ADDR(sec_idx); > struct rng4tst __iomem *rng = > (struct rng4tst __iomem *)&sec->rng; > u32 val; > @@ -603,10 +614,9 @@ static void kick_trng(int ent_delay, uint8_t sec_idx) > sec_clrbits32(&rng->rtmctl, RTMCTL_PRGM); > } > > -static int rng_init(uint8_t sec_idx) > +static int rng_init(uint8_t sec_idx, ccsr_sec_t *sec) > { > int ret, gen_sk, ent_delay = RTSDCTL_ENT_DLY_MIN; > - ccsr_sec_t __iomem *sec = (ccsr_sec_t __iomem *)SEC_ADDR(sec_idx); > struct rng4tst __iomem *rng = > (struct rng4tst __iomem *)&sec->rng; > u32 inst_handles; > @@ -624,7 +634,7 @@ static int rng_init(uint8_t sec_idx) > * the TRNG parameters. > */ > if (!inst_handles) { > - kick_trng(ent_delay, sec_idx); > + kick_trng(ent_delay, sec); > ent_delay += 400; > } > /* > @@ -634,7 +644,7 @@ static int rng_init(uint8_t sec_idx) > * interval, leading to a sucessful initialization of > * the RNG. > */ > - ret = instantiate_rng(sec_idx, gen_sk); > + ret = instantiate_rng(sec_idx, sec, gen_sk); > } while ((ret == -1) && (ent_delay < RTSDCTL_ENT_DLY_MAX)); > if (ret) { > printf("SEC%u: Failed to instantiate RNG\n", sec_idx); > @@ -646,13 +656,28 @@ static int rng_init(uint8_t sec_idx) > > return ret; > } > -#endif > + > int sec_init_idx(uint8_t sec_idx) > { > - ccsr_sec_t *sec = (void *)SEC_ADDR(sec_idx); > - uint32_t mcr = sec_in32(&sec->mcfgr); > int ret = 0; > - > + struct caam_regs *caam; > +#if CONFIG_IS_ENABLED(DM) > + if (!caam_dev) { > + printf("caam_jr: caam not found\n"); > + return -1; > + } > + caam = dev_get_priv(caam_dev); > +#else > + caam_st.sec = (void *)SEC_ADDR(sec_idx); > + caam_st.regs = (struct jr_regs *)SEC_JR0_ADDR(sec_idx); > + caam_st.jrid = 0; > + caam = &caam_st; > +#endif > + ccsr_sec_t *sec = caam->sec; > + uint32_t mcr = sec_in32(&sec->mcfgr); > +#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_IMX8M) > + uint32_t jrdid_ms = 0; > +#endif > #ifdef CONFIG_FSL_CORENET > uint32_t liodnr; > uint32_t liodn_ns; > @@ -682,6 +707,11 @@ int sec_init_idx(uint8_t sec_idx) > mcr |= (1 << MCFGR_PS_SHIFT); > #endif > sec_out32(&sec->mcfgr, mcr); > +#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_IMX8M) > + jrdid_ms = JRDID_MS_TZ_OWN | JRDID_MS_PRIM_TZ | JRDID_MS_PRIM_DID; > + sec_out32(&sec->jrliodnr[caam->jrid].ms, jrdid_ms); > +#endif > + jr_reset(); > > #ifdef CONFIG_FSL_CORENET > #ifdef CONFIG_SPL_BUILD > @@ -693,20 +723,19 @@ int sec_init_idx(uint8_t sec_idx) > liodn_ns = CONFIG_SPL_JR0_LIODN_NS & JRNSLIODN_MASK; > liodn_s = CONFIG_SPL_JR0_LIODN_S & JRSLIODN_MASK; > > - liodnr = sec_in32(&sec->jrliodnr[0].ls) & > + liodnr = sec_in32(&sec->jrliodnr[caam->jrid].ls) & > ~(JRNSLIODN_MASK | JRSLIODN_MASK); > liodnr = liodnr | > (liodn_ns << JRNSLIODN_SHIFT) | > (liodn_s << JRSLIODN_SHIFT); > - sec_out32(&sec->jrliodnr[0].ls, liodnr); > + sec_out32(&sec->jrliodnr[caam->jrid].ls, liodnr); > #else > - liodnr = sec_in32(&sec->jrliodnr[0].ls); > + liodnr = sec_in32(&sec->jrliodnr[caam->jrid].ls); > liodn_ns = (liodnr & JRNSLIODN_MASK) >> JRNSLIODN_SHIFT; > liodn_s = (liodnr & JRSLIODN_MASK) >> JRSLIODN_SHIFT; > #endif > #endif > - > - ret = jr_init(sec_idx); > + ret = jr_init(sec_idx, caam); > if (ret < 0) { > printf("SEC%u: initialization failed\n", sec_idx); > return -1; > @@ -719,9 +748,9 @@ int sec_init_idx(uint8_t sec_idx) > > pamu_enable(); > #endif > -#ifndef CONFIG_SPL_BUILD > - if (get_rng_vid(sec_idx) >= 4) { > - if (rng_init(sec_idx) < 0) { > + > + if (get_rng_vid(caam->sec) >= 4) { > + if (rng_init(sec_idx, caam->sec) < 0) { > printf("SEC%u: RNG instantiation failed\n", sec_idx); > return -1; > } > @@ -735,7 +764,6 @@ int sec_init_idx(uint8_t sec_idx) > > printf("SEC%u: RNG instantiated\n", sec_idx); > } > -#endif > return ret; > } > > @@ -743,3 +771,76 @@ int sec_init(void) > { > return sec_init_idx(0); > } > + > +#if CONFIG_IS_ENABLED(DM) > +static int caam_jr_ioctl(struct udevice *dev, unsigned long request, void *buf) > +{ > + if (request != CAAM_JR_RUN_DESC) > + return -ENOSYS; > + > + return run_descriptor_jr(buf); > +} > + > +static int caam_jr_probe(struct udevice *dev) > +{ > + struct caam_regs *caam = dev_get_priv(dev); > + fdt_addr_t addr; > + ofnode node; > + unsigned int jr_node = 0; > + > + caam_dev = dev; > + > + addr = dev_read_addr(dev); > + if (addr == FDT_ADDR_T_NONE) { > + printf("caam_jr: crypto not found\n"); > + return -EINVAL; > + } > + caam->sec = (ccsr_sec_t *)(uintptr_t)addr; > + caam->regs = (struct jr_regs *)caam->sec; > + > + /* Check for enabled job ring node */ > + ofnode_for_each_subnode(node, dev_ofnode(dev)) { > + if (!ofnode_is_available(node)) > + continue; > + > + jr_node = ofnode_read_u32_default(node, "reg", -1); > + if (jr_node > 0) { > + caam->regs = (struct jr_regs *)((ulong)caam->sec + jr_node); > + while (!(jr_node & 0x0F)) > + jr_node = jr_node >> 4; > + > + caam->jrid = jr_node - 1; > + break; > + } > + } > + > + if (sec_init()) > + printf("\nsec_init failed!\n"); > + > + return 0; > +} > + > +static int caam_jr_bind(struct udevice *dev) > +{ > + return 0; > +} > + > +static const struct misc_ops caam_jr_ops = { > + .ioctl = caam_jr_ioctl, > +}; > + > +static const struct udevice_id caam_jr_match[] = { > + { .compatible = "fsl,sec-v4.0" }, > + { } > +}; > + > +U_BOOT_DRIVER(caam_jr) = { > + .name = "caam_jr", > + .id = UCLASS_MISC, > + .of_match = caam_jr_match, > + .ops = &caam_jr_ops, > + .bind = caam_jr_bind, > + .probe = caam_jr_probe, > + .priv_auto = sizeof(struct caam_regs), > +}; > +#endif > diff --git a/drivers/crypto/fsl/jr.h b/drivers/crypto/fsl/jr.h > index 1047aa772c..3eb7be79da 100644 > --- a/drivers/crypto/fsl/jr.h > +++ b/drivers/crypto/fsl/jr.h > @@ -1,6 +1,7 @@ > /* SPDX-License-Identifier: GPL-2.0+ */ > /* > * Copyright 2008-2014 Freescale Semiconductor, Inc. > + * Copyright 2021 NXP > * > */ > > @@ -8,7 +9,9 @@ > #define __JR_H > > #include <linux/compiler.h> > +#include "fsl_sec.h" > #include "type.h" > +#include <misc.h> > > #define JR_SIZE 4 > /* Timeout currently defined as 10 sec */ > @@ -35,12 +38,21 @@ > #define JRSLIODN_SHIFT 0 > #define JRSLIODN_MASK 0x00000fff > > -#define JQ_DEQ_ERR -1 > -#define JQ_DEQ_TO_ERR -2 > -#define JQ_ENQ_ERR -3 > +#define JRDID_MS_PRIM_DID BIT(0) > +#define JRDID_MS_PRIM_TZ BIT(4) > +#define JRDID_MS_TZ_OWN BIT(15) > + > +#define JQ_DEQ_ERR (-1) > +#define JQ_DEQ_TO_ERR (-2) > +#define JQ_ENQ_ERR (-3) > > #define RNG4_MAX_HANDLES 2 > > +enum { > + /* Run caam jobring descriptor(in buf) */ > + CAAM_JR_RUN_DESC, > +}; > + > struct op_ring { > caam_dma_addr_t desc; > uint32_t status; > @@ -102,6 +114,19 @@ struct result { > uint32_t status; > }; > > +/* > + * struct caam_regs - CAAM initialization register interface > + * > + * Interface to caam memory map, jobring register, jobring storage. > + */ > +struct caam_regs { > + ccsr_sec_t *sec; /*caam initialization registers*/ > + struct jr_regs *regs; /*jobring configuration registers*/ > + u8 jrid; /*id to identify a jobring*/ > + /*Private sub-storage for a single JobR*/ > + struct jobring jr[CONFIG_SYS_FSL_MAX_NUM_OF_SEC]; > +}; > + > void caam_jr_strstatus(u32 status); > int run_descriptor_jr(uint32_t *desc); >
Hello Marek > -----Original Message----- > From: Stefano Babic <sbabic@denx.de> > Sent: Saturday, February 5, 2022 7:46 PM > To: Gaurav Jain <gaurav.jain@nxp.com>; u-boot@lists.denx.de > Cc: Stefano Babic <sbabic@denx.de>; Fabio Estevam <festevam@gmail.com>; > Peng Fan <peng.fan@nxp.com>; Simon Glass <sjg@chromium.org>; Priyanka > Jain <priyanka.jain@nxp.com>; Ye Li <ye.li@nxp.com>; Horia Geanta > <horia.geanta@nxp.com>; Ji Luo <ji.luo@nxp.com>; Franck Lenormand > <franck.lenormand@nxp.com>; Silvano Di Ninno <silvano.dininno@nxp.com>; > Sahil Malhotra <sahil.malhotra@nxp.com>; Pankaj Gupta > <pankaj.gupta@nxp.com>; Varun Sethi <V.Sethi@nxp.com>; dl-uboot-imx > <uboot-imx@nxp.com>; Shengzhou Liu <shengzhou.liu@nxp.com>; Mingkai Hu > <mingkai.hu@nxp.com>; Rajesh Bhagat <rajesh.bhagat@nxp.com>; Meenakshi > Aggarwal <meenakshi.aggarwal@nxp.com>; Wasim Khan > <wasim.khan@nxp.com>; Alison Wang <alison.wang@nxp.com>; Pramod > Kumar <pramod.kumar_1@nxp.com>; Andy Tang <andy.tang@nxp.com>; > Adrian Alonso <adrian.alonso@nxp.com>; Vladimir Oltean > <olteanv@gmail.com>; Marek Vasut <marex@denx.de> > Subject: [EXT] Re: [PATCH v8 01/15] crypto/fsl: Add support for CAAM Job ring > driver model > > Caution: EXT Email > > Hi Gaurav, > > rather I still have issues to run CI with this applied. The reason is that this adds an > overhead to SPL and it breaks the board imx6dl_mamoj because SPL exceeds the > maximum size for a DL SOC. > > See > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fsource.d > enx.de%2Fu-boot%2Fcustodians%2Fu-boot-imx%2F- > %2Fjobs%2F387370&data=04%7C01%7Cgaurav.jain%40nxp.com%7C3a273 > 1dd27fc4bebcad308d9e8b21464%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C > 0%7C0%7C637796673834942697%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4 > wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000&am > p;sdata=pI%2F%2FlNtrdrGCa8sSvcr6uNu4jze7pzDqZtI52FIDj50%3D&reserve > d=0 > > I do not know if it is possible to drop some features from SPL for this board > (Added Marek as board maintainer). CONFIG_IMX_HAB is enabled for imx6dl_mamoj. So CAAM is built for SPL, results in increased size. However CAAM is not initialized in SPL. As Stefano suggested, Can you drop some features from SPL? Regards Gaurav Jain > > Best regards, > Stefano > > On 10.01.22 13:27, Gaurav Jain wrote: > > added device tree support for job ring driver. > > sec is initialized based on job ring information processed from device > > tree. > > > > Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com> > > Reviewed-by: Ye Li <ye.li@nxp.com> > > --- > > drivers/crypto/fsl/jr.c | 323 ++++++++++++++++++++++++++-------------- > > drivers/crypto/fsl/jr.h | 31 +++- > > 2 files changed, 240 insertions(+), 114 deletions(-) > > > > diff --git a/drivers/crypto/fsl/jr.c b/drivers/crypto/fsl/jr.c index > > 22b649219e..8103987425 100644 > > --- a/drivers/crypto/fsl/jr.c > > +++ b/drivers/crypto/fsl/jr.c > > @@ -1,7 +1,7 @@ > > // SPDX-License-Identifier: GPL-2.0+ > > /* > > * Copyright 2008-2014 Freescale Semiconductor, Inc. > > - * Copyright 2018 NXP > > + * Copyright 2018, 2021 NXP > > * > > * Based on CAAM driver in drivers/crypto/caam in Linux > > */ > > @@ -11,7 +11,6 @@ > > #include <linux/kernel.h> > > #include <log.h> > > #include <malloc.h> > > -#include "fsl_sec.h" > > #include "jr.h" > > #include "jobdesc.h" > > #include "desc_constr.h" > > @@ -21,7 +20,10 @@ > > #include <asm/cache.h> > > #include <asm/fsl_pamu.h> > > #endif > > +#include <dm.h> > > #include <dm/lists.h> > > +#include <dm/root.h> > > +#include <dm/device-internal.h> > > #include <linux/delay.h> > > > > #define CIRC_CNT(head, tail, size) (((head) - (tail)) & (size - 1)) > > @@ -35,20 +37,29 @@ uint32_t > sec_offset[CONFIG_SYS_FSL_MAX_NUM_OF_SEC] = { > > #endif > > }; > > > > +#if CONFIG_IS_ENABLED(DM) > > +struct udevice *caam_dev; > > +#else > > #define SEC_ADDR(idx) \ > > (ulong)((CONFIG_SYS_FSL_SEC_ADDR + sec_offset[idx])) > > > > #define SEC_JR0_ADDR(idx) \ > > (ulong)(SEC_ADDR(idx) + \ > > (CONFIG_SYS_FSL_JR0_OFFSET - CONFIG_SYS_FSL_SEC_OFFSET)) > > +struct caam_regs caam_st; > > +#endif > > > > -struct jobring jr0[CONFIG_SYS_FSL_MAX_NUM_OF_SEC]; > > +static inline u32 jr_start_reg(u8 jrid) { > > + return (1 << jrid); > > +} > > > > -static inline void start_jr0(uint8_t sec_idx) > > +static inline void start_jr(struct caam_regs *caam) > > { > > - ccsr_sec_t *sec = (void *)SEC_ADDR(sec_idx); > > + ccsr_sec_t *sec = caam->sec; > > u32 ctpr_ms = sec_in32(&sec->ctpr_ms); > > u32 scfgr = sec_in32(&sec->scfgr); > > + u32 jrstart = jr_start_reg(caam->jrid); > > > > if (ctpr_ms & SEC_CTPR_MS_VIRT_EN_INCL) { > > /* VIRT_EN_INCL = 1 & VIRT_EN_POR = 1 or @@ -56,23 > > +67,16 @@ static inline void start_jr0(uint8_t sec_idx) > > */ > > if ((ctpr_ms & SEC_CTPR_MS_VIRT_EN_POR) || > > (scfgr & SEC_SCFGR_VIRT_EN)) > > - sec_out32(&sec->jrstartr, CONFIG_JRSTARTR_JR0); > > + sec_out32(&sec->jrstartr, jrstart); > > } else { > > /* VIRT_EN_INCL = 0 && VIRT_EN_POR_VALUE = 1 */ > > if (ctpr_ms & SEC_CTPR_MS_VIRT_EN_POR) > > - sec_out32(&sec->jrstartr, CONFIG_JRSTARTR_JR0); > > + sec_out32(&sec->jrstartr, jrstart); > > } > > } > > > > -static inline void jr_reset_liodn(uint8_t sec_idx) > > +static inline void jr_disable_irq(struct jr_regs *regs) > > { > > - ccsr_sec_t *sec = (void *)SEC_ADDR(sec_idx); > > - sec_out32(&sec->jrliodnr[0].ls, 0); > > -} > > - > > -static inline void jr_disable_irq(uint8_t sec_idx) -{ > > - struct jr_regs *regs = (struct jr_regs *)SEC_JR0_ADDR(sec_idx); > > uint32_t jrcfg = sec_in32(®s->jrcfg1); > > > > jrcfg = jrcfg | JR_INTMASK; > > @@ -80,10 +84,10 @@ static inline void jr_disable_irq(uint8_t sec_idx) > > sec_out32(®s->jrcfg1, jrcfg); > > } > > > > -static void jr_initregs(uint8_t sec_idx) > > +static void jr_initregs(uint8_t sec_idx, struct caam_regs *caam) > > { > > - struct jr_regs *regs = (struct jr_regs *)SEC_JR0_ADDR(sec_idx); > > - struct jobring *jr = &jr0[sec_idx]; > > + struct jr_regs *regs = caam->regs; > > + struct jobring *jr = &caam->jr[sec_idx]; > > caam_dma_addr_t ip_base = virt_to_phys((void *)jr->input_ring); > > caam_dma_addr_t op_base = virt_to_phys((void *)jr->output_ring); > > > > @@ -103,16 +107,16 @@ static void jr_initregs(uint8_t sec_idx) > > sec_out32(®s->irs, JR_SIZE); > > > > if (!jr->irq) > > - jr_disable_irq(sec_idx); > > + jr_disable_irq(regs); > > } > > > > -static int jr_init(uint8_t sec_idx) > > +static int jr_init(uint8_t sec_idx, struct caam_regs *caam) > > { > > - struct jobring *jr = &jr0[sec_idx]; > > + struct jobring *jr = &caam->jr[sec_idx]; > > > > memset(jr, 0, sizeof(struct jobring)); > > > > - jr->jq_id = DEFAULT_JR_ID; > > + jr->jq_id = caam->jrid; > > jr->irq = DEFAULT_IRQ; > > > > #ifdef CONFIG_FSL_CORENET > > @@ -134,53 +138,8 @@ static int jr_init(uint8_t sec_idx) > > memset(jr->input_ring, 0, JR_SIZE * sizeof(caam_dma_addr_t)); > > memset(jr->output_ring, 0, jr->op_size); > > > > - start_jr0(sec_idx); > > - > > - jr_initregs(sec_idx); > > - > > - return 0; > > -} > > - > > -static int jr_sw_cleanup(uint8_t sec_idx) -{ > > - struct jobring *jr = &jr0[sec_idx]; > > - > > - jr->head = 0; > > - jr->tail = 0; > > - jr->read_idx = 0; > > - jr->write_idx = 0; > > - memset(jr->info, 0, sizeof(jr->info)); > > - memset(jr->input_ring, 0, jr->size * sizeof(caam_dma_addr_t)); > > - memset(jr->output_ring, 0, jr->size * sizeof(struct op_ring)); > > - > > - return 0; > > -} > > - > > -static int jr_hw_reset(uint8_t sec_idx) -{ > > - struct jr_regs *regs = (struct jr_regs *)SEC_JR0_ADDR(sec_idx); > > - uint32_t timeout = 100000; > > - uint32_t jrint, jrcr; > > - > > - sec_out32(®s->jrcr, JRCR_RESET); > > - do { > > - jrint = sec_in32(®s->jrint); > > - } while (((jrint & JRINT_ERR_HALT_MASK) == > > - JRINT_ERR_HALT_INPROGRESS) && --timeout); > > - > > - jrint = sec_in32(®s->jrint); > > - if (((jrint & JRINT_ERR_HALT_MASK) != > > - JRINT_ERR_HALT_INPROGRESS) && timeout == 0) > > - return -1; > > - > > - timeout = 100000; > > - sec_out32(®s->jrcr, JRCR_RESET); > > - do { > > - jrcr = sec_in32(®s->jrcr); > > - } while ((jrcr & JRCR_RESET) && --timeout); > > - > > - if (timeout == 0) > > - return -1; > > + start_jr(caam); > > + jr_initregs(sec_idx, caam); > > > > return 0; > > } > > @@ -188,10 +147,10 @@ static int jr_hw_reset(uint8_t sec_idx) > > /* -1 --- error, can't enqueue -- no space available */ > > static int jr_enqueue(uint32_t *desc_addr, > > void (*callback)(uint32_t status, void *arg), > > - void *arg, uint8_t sec_idx) > > + void *arg, uint8_t sec_idx, struct caam_regs *caam) > > { > > - struct jr_regs *regs = (struct jr_regs *)SEC_JR0_ADDR(sec_idx); > > - struct jobring *jr = &jr0[sec_idx]; > > + struct jr_regs *regs = caam->regs; > > + struct jobring *jr = &caam->jr[sec_idx]; > > int head = jr->head; > > uint32_t desc_word; > > int length = desc_len(desc_addr); @@ -263,10 +222,10 @@ static > > int jr_enqueue(uint32_t *desc_addr, > > return 0; > > } > > > > -static int jr_dequeue(int sec_idx) > > +static int jr_dequeue(int sec_idx, struct caam_regs *caam) > > { > > - struct jr_regs *regs = (struct jr_regs *)SEC_JR0_ADDR(sec_idx); > > - struct jobring *jr = &jr0[sec_idx]; > > + struct jr_regs *regs = caam->regs; > > + struct jobring *jr = &caam->jr[sec_idx]; > > int head = jr->head; > > int tail = jr->tail; > > int idx, i, found; > > @@ -349,14 +308,18 @@ static void desc_done(uint32_t status, void *arg) > > { > > struct result *x = arg; > > x->status = status; > > -#ifndef CONFIG_SPL_BUILD > > caam_jr_strstatus(status); > > -#endif > > x->done = 1; > > } > > > > static inline int run_descriptor_jr_idx(uint32_t *desc, uint8_t sec_idx) > > { > > + struct caam_regs *caam; > > +#if CONFIG_IS_ENABLED(DM) > > + caam = dev_get_priv(caam_dev); > > +#else > > + caam = &caam_st; > > +#endif > > unsigned long long timeval = 0; > > unsigned long long timeout = CONFIG_USEC_DEQ_TIMEOUT; > > struct result op; > > @@ -364,7 +327,7 @@ static inline int run_descriptor_jr_idx(uint32_t > > *desc, uint8_t sec_idx) > > > > memset(&op, 0, sizeof(op)); > > > > - ret = jr_enqueue(desc, desc_done, &op, sec_idx); > > + ret = jr_enqueue(desc, desc_done, &op, sec_idx, caam); > > if (ret) { > > debug("Error in SEC enq\n"); > > ret = JQ_ENQ_ERR; > > @@ -375,7 +338,7 @@ static inline int run_descriptor_jr_idx(uint32_t *desc, > uint8_t sec_idx) > > udelay(1); > > timeval += 1; > > > > - ret = jr_dequeue(sec_idx); > > + ret = jr_dequeue(sec_idx, caam); > > if (ret) { > > debug("Error in SEC deq\n"); > > ret = JQ_DEQ_ERR; @@ -402,13 +365,62 @@ int > > run_descriptor_jr(uint32_t *desc) > > return run_descriptor_jr_idx(desc, 0); > > } > > > > +static int jr_sw_cleanup(uint8_t sec_idx, struct caam_regs *caam) { > > + struct jobring *jr = &caam->jr[sec_idx]; > > + > > + jr->head = 0; > > + jr->tail = 0; > > + jr->read_idx = 0; > > + jr->write_idx = 0; > > + memset(jr->info, 0, sizeof(jr->info)); > > + memset(jr->input_ring, 0, jr->size * sizeof(caam_dma_addr_t)); > > + memset(jr->output_ring, 0, jr->size * sizeof(struct op_ring)); > > + > > + return 0; > > +} > > + > > +static int jr_hw_reset(struct jr_regs *regs) { > > + uint32_t timeout = 100000; > > + uint32_t jrint, jrcr; > > + > > + sec_out32(®s->jrcr, JRCR_RESET); > > + do { > > + jrint = sec_in32(®s->jrint); > > + } while (((jrint & JRINT_ERR_HALT_MASK) == > > + JRINT_ERR_HALT_INPROGRESS) && --timeout); > > + > > + jrint = sec_in32(®s->jrint); > > + if (((jrint & JRINT_ERR_HALT_MASK) != > > + JRINT_ERR_HALT_INPROGRESS) && timeout == 0) > > + return -1; > > + > > + timeout = 100000; > > + sec_out32(®s->jrcr, JRCR_RESET); > > + do { > > + jrcr = sec_in32(®s->jrcr); > > + } while ((jrcr & JRCR_RESET) && --timeout); > > + > > + if (timeout == 0) > > + return -1; > > + > > + return 0; > > +} > > + > > static inline int jr_reset_sec(uint8_t sec_idx) > > { > > - if (jr_hw_reset(sec_idx) < 0) > > + struct caam_regs *caam; > > +#if CONFIG_IS_ENABLED(DM) > > + caam = dev_get_priv(caam_dev); > > +#else > > + caam = &caam_st; > > +#endif > > + if (jr_hw_reset(caam->regs) < 0) > > return -1; > > > > /* Clean up the jobring structure maintained by software */ > > - jr_sw_cleanup(sec_idx); > > + jr_sw_cleanup(sec_idx, caam); > > > > return 0; > > } > > @@ -418,9 +430,15 @@ int jr_reset(void) > > return jr_reset_sec(0); > > } > > > > -static inline int sec_reset_idx(uint8_t sec_idx) > > +int sec_reset(void) > > { > > - ccsr_sec_t *sec = (void *)SEC_ADDR(sec_idx); > > + struct caam_regs *caam; > > +#if CONFIG_IS_ENABLED(DM) > > + caam = dev_get_priv(caam_dev); > > +#else > > + caam = &caam_st; > > +#endif > > + ccsr_sec_t *sec = caam->sec; > > uint32_t mcfgr = sec_in32(&sec->mcfgr); > > uint32_t timeout = 100000; > > > > @@ -446,11 +464,7 @@ static inline int sec_reset_idx(uint8_t sec_idx) > > > > return 0; > > } > > -int sec_reset(void) > > -{ > > - return sec_reset_idx(0); > > -} > > -#ifndef CONFIG_SPL_BUILD > > + > > static int deinstantiate_rng(u8 sec_idx, int state_handle_mask) > > { > > u32 *desc; > > @@ -496,12 +510,11 @@ static int deinstantiate_rng(u8 sec_idx, int > state_handle_mask) > > return ret; > > } > > > > -static int instantiate_rng(u8 sec_idx, int gen_sk) > > +static int instantiate_rng(uint8_t sec_idx, ccsr_sec_t *sec, int > > +gen_sk) > > { > > u32 *desc; > > u32 rdsta_val; > > int ret = 0, sh_idx, size; > > - ccsr_sec_t __iomem *sec = (ccsr_sec_t __iomem *)SEC_ADDR(sec_idx); > > struct rng4tst __iomem *rng = > > (struct rng4tst __iomem *)&sec->rng; > > > > @@ -554,9 +567,8 @@ static int instantiate_rng(u8 sec_idx, int gen_sk) > > return ret; > > } > > > > -static u8 get_rng_vid(uint8_t sec_idx) > > +static u8 get_rng_vid(ccsr_sec_t *sec) > > { > > - ccsr_sec_t *sec = (void *)SEC_ADDR(sec_idx); > > u8 vid; > > > > if (caam_get_era() < 10) { > > @@ -574,9 +586,8 @@ static u8 get_rng_vid(uint8_t sec_idx) > > * By default, the TRNG runs for 200 clocks per sample; > > * 1200 clocks per sample generates better entropy. > > */ > > -static void kick_trng(int ent_delay, uint8_t sec_idx) > > +static void kick_trng(int ent_delay, ccsr_sec_t *sec) > > { > > - ccsr_sec_t __iomem *sec = (ccsr_sec_t __iomem *)SEC_ADDR(sec_idx); > > struct rng4tst __iomem *rng = > > (struct rng4tst __iomem *)&sec->rng; > > u32 val; > > @@ -603,10 +614,9 @@ static void kick_trng(int ent_delay, uint8_t sec_idx) > > sec_clrbits32(&rng->rtmctl, RTMCTL_PRGM); > > } > > > > -static int rng_init(uint8_t sec_idx) > > +static int rng_init(uint8_t sec_idx, ccsr_sec_t *sec) > > { > > int ret, gen_sk, ent_delay = RTSDCTL_ENT_DLY_MIN; > > - ccsr_sec_t __iomem *sec = (ccsr_sec_t __iomem *)SEC_ADDR(sec_idx); > > struct rng4tst __iomem *rng = > > (struct rng4tst __iomem *)&sec->rng; > > u32 inst_handles; > > @@ -624,7 +634,7 @@ static int rng_init(uint8_t sec_idx) > > * the TRNG parameters. > > */ > > if (!inst_handles) { > > - kick_trng(ent_delay, sec_idx); > > + kick_trng(ent_delay, sec); > > ent_delay += 400; > > } > > /* > > @@ -634,7 +644,7 @@ static int rng_init(uint8_t sec_idx) > > * interval, leading to a sucessful initialization of > > * the RNG. > > */ > > - ret = instantiate_rng(sec_idx, gen_sk); > > + ret = instantiate_rng(sec_idx, sec, gen_sk); > > } while ((ret == -1) && (ent_delay < RTSDCTL_ENT_DLY_MAX)); > > if (ret) { > > printf("SEC%u: Failed to instantiate RNG\n", sec_idx); > > @@ -646,13 +656,28 @@ static int rng_init(uint8_t sec_idx) > > > > return ret; > > } > > -#endif > > + > > int sec_init_idx(uint8_t sec_idx) > > { > > - ccsr_sec_t *sec = (void *)SEC_ADDR(sec_idx); > > - uint32_t mcr = sec_in32(&sec->mcfgr); > > int ret = 0; > > - > > + struct caam_regs *caam; > > +#if CONFIG_IS_ENABLED(DM) > > + if (!caam_dev) { > > + printf("caam_jr: caam not found\n"); > > + return -1; > > + } > > + caam = dev_get_priv(caam_dev); > > +#else > > + caam_st.sec = (void *)SEC_ADDR(sec_idx); > > + caam_st.regs = (struct jr_regs *)SEC_JR0_ADDR(sec_idx); > > + caam_st.jrid = 0; > > + caam = &caam_st; > > +#endif > > + ccsr_sec_t *sec = caam->sec; > > + uint32_t mcr = sec_in32(&sec->mcfgr); #if > > +defined(CONFIG_SPL_BUILD) && defined(CONFIG_IMX8M) > > + uint32_t jrdid_ms = 0; > > +#endif > > #ifdef CONFIG_FSL_CORENET > > uint32_t liodnr; > > uint32_t liodn_ns; > > @@ -682,6 +707,11 @@ int sec_init_idx(uint8_t sec_idx) > > mcr |= (1 << MCFGR_PS_SHIFT); > > #endif > > sec_out32(&sec->mcfgr, mcr); > > +#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_IMX8M) > > + jrdid_ms = JRDID_MS_TZ_OWN | JRDID_MS_PRIM_TZ | > JRDID_MS_PRIM_DID; > > + sec_out32(&sec->jrliodnr[caam->jrid].ms, jrdid_ms); #endif > > + jr_reset(); > > > > #ifdef CONFIG_FSL_CORENET > > #ifdef CONFIG_SPL_BUILD > > @@ -693,20 +723,19 @@ int sec_init_idx(uint8_t sec_idx) > > liodn_ns = CONFIG_SPL_JR0_LIODN_NS & JRNSLIODN_MASK; > > liodn_s = CONFIG_SPL_JR0_LIODN_S & JRSLIODN_MASK; > > > > - liodnr = sec_in32(&sec->jrliodnr[0].ls) & > > + liodnr = sec_in32(&sec->jrliodnr[caam->jrid].ls) & > > ~(JRNSLIODN_MASK | JRSLIODN_MASK); > > liodnr = liodnr | > > (liodn_ns << JRNSLIODN_SHIFT) | > > (liodn_s << JRSLIODN_SHIFT); > > - sec_out32(&sec->jrliodnr[0].ls, liodnr); > > + sec_out32(&sec->jrliodnr[caam->jrid].ls, liodnr); > > #else > > - liodnr = sec_in32(&sec->jrliodnr[0].ls); > > + liodnr = sec_in32(&sec->jrliodnr[caam->jrid].ls); > > liodn_ns = (liodnr & JRNSLIODN_MASK) >> JRNSLIODN_SHIFT; > > liodn_s = (liodnr & JRSLIODN_MASK) >> JRSLIODN_SHIFT; > > #endif > > #endif > > - > > - ret = jr_init(sec_idx); > > + ret = jr_init(sec_idx, caam); > > if (ret < 0) { > > printf("SEC%u: initialization failed\n", sec_idx); > > return -1; > > @@ -719,9 +748,9 @@ int sec_init_idx(uint8_t sec_idx) > > > > pamu_enable(); > > #endif > > -#ifndef CONFIG_SPL_BUILD > > - if (get_rng_vid(sec_idx) >= 4) { > > - if (rng_init(sec_idx) < 0) { > > + > > + if (get_rng_vid(caam->sec) >= 4) { > > + if (rng_init(sec_idx, caam->sec) < 0) { > > printf("SEC%u: RNG instantiation failed\n", sec_idx); > > return -1; > > } > > @@ -735,7 +764,6 @@ int sec_init_idx(uint8_t sec_idx) > > > > printf("SEC%u: RNG instantiated\n", sec_idx); > > } > > -#endif > > return ret; > > } > > > > @@ -743,3 +771,76 @@ int sec_init(void) > > { > > return sec_init_idx(0); > > } > > + > > +#if CONFIG_IS_ENABLED(DM) > > +static int caam_jr_ioctl(struct udevice *dev, unsigned long request, > > +void *buf) { > > + if (request != CAAM_JR_RUN_DESC) > > + return -ENOSYS; > > + > > + return run_descriptor_jr(buf); > > +} > > + > > +static int caam_jr_probe(struct udevice *dev) { > > + struct caam_regs *caam = dev_get_priv(dev); > > + fdt_addr_t addr; > > + ofnode node; > > + unsigned int jr_node = 0; > > + > > + caam_dev = dev; > > + > > + addr = dev_read_addr(dev); > > + if (addr == FDT_ADDR_T_NONE) { > > + printf("caam_jr: crypto not found\n"); > > + return -EINVAL; > > + } > > + caam->sec = (ccsr_sec_t *)(uintptr_t)addr; > > + caam->regs = (struct jr_regs *)caam->sec; > > + > > + /* Check for enabled job ring node */ > > + ofnode_for_each_subnode(node, dev_ofnode(dev)) { > > + if (!ofnode_is_available(node)) > > + continue; > > + > > + jr_node = ofnode_read_u32_default(node, "reg", -1); > > + if (jr_node > 0) { > > + caam->regs = (struct jr_regs *)((ulong)caam->sec + jr_node); > > + while (!(jr_node & 0x0F)) > > + jr_node = jr_node >> 4; > > + > > + caam->jrid = jr_node - 1; > > + break; > > + } > > + } > > + > > + if (sec_init()) > > + printf("\nsec_init failed!\n"); > > + > > + return 0; > > +} > > + > > +static int caam_jr_bind(struct udevice *dev) { > > + return 0; > > +} > > + > > +static const struct misc_ops caam_jr_ops = { > > + .ioctl = caam_jr_ioctl, > > +}; > > + > > +static const struct udevice_id caam_jr_match[] = { > > + { .compatible = "fsl,sec-v4.0" }, > > + { } > > +}; > > + > > +U_BOOT_DRIVER(caam_jr) = { > > + .name = "caam_jr", > > + .id = UCLASS_MISC, > > + .of_match = caam_jr_match, > > + .ops = &caam_jr_ops, > > + .bind = caam_jr_bind, > > + .probe = caam_jr_probe, > > + .priv_auto = sizeof(struct caam_regs), > > +}; > > +#endif > > diff --git a/drivers/crypto/fsl/jr.h b/drivers/crypto/fsl/jr.h index > > 1047aa772c..3eb7be79da 100644 > > --- a/drivers/crypto/fsl/jr.h > > +++ b/drivers/crypto/fsl/jr.h > > @@ -1,6 +1,7 @@ > > /* SPDX-License-Identifier: GPL-2.0+ */ > > /* > > * Copyright 2008-2014 Freescale Semiconductor, Inc. > > + * Copyright 2021 NXP > > * > > */ > > > > @@ -8,7 +9,9 @@ > > #define __JR_H > > > > #include <linux/compiler.h> > > +#include "fsl_sec.h" > > #include "type.h" > > +#include <misc.h> > > > > #define JR_SIZE 4 > > /* Timeout currently defined as 10 sec */ @@ -35,12 +38,21 @@ > > #define JRSLIODN_SHIFT 0 > > #define JRSLIODN_MASK 0x00000fff > > > > -#define JQ_DEQ_ERR -1 > > -#define JQ_DEQ_TO_ERR -2 > > -#define JQ_ENQ_ERR -3 > > +#define JRDID_MS_PRIM_DID BIT(0) > > +#define JRDID_MS_PRIM_TZ BIT(4) > > +#define JRDID_MS_TZ_OWN BIT(15) > > + > > +#define JQ_DEQ_ERR (-1) > > +#define JQ_DEQ_TO_ERR (-2) > > +#define JQ_ENQ_ERR (-3) > > > > #define RNG4_MAX_HANDLES 2 > > > > +enum { > > + /* Run caam jobring descriptor(in buf) */ > > + CAAM_JR_RUN_DESC, > > +}; > > + > > struct op_ring { > > caam_dma_addr_t desc; > > uint32_t status; > > @@ -102,6 +114,19 @@ struct result { > > uint32_t status; > > }; > > > > +/* > > + * struct caam_regs - CAAM initialization register interface > > + * > > + * Interface to caam memory map, jobring register, jobring storage. > > + */ > > +struct caam_regs { > > + ccsr_sec_t *sec; /*caam initialization registers*/ > > + struct jr_regs *regs; /*jobring configuration registers*/ > > + u8 jrid; /*id to identify a jobring*/ > > + /*Private sub-storage for a single JobR*/ > > + struct jobring jr[CONFIG_SYS_FSL_MAX_NUM_OF_SEC]; > > +}; > > + > > void caam_jr_strstatus(u32 status); > > int run_descriptor_jr(uint32_t *desc); > > > > -- > ================================================================= > ==== > DENX Software Engineering GmbH, Managing Director: Wolfgang Denk > HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany > Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic@denx.de > ================================================================= > ====
Hello Marek A gentle reminder!! Please help to check if some feature can be dropped in SPL from imx6dl_mamoj board so that CAAM driver model patches can be accepted. Regards Gaurav Jain > -----Original Message----- > From: Gaurav Jain > Sent: Monday, February 7, 2022 12:43 PM > To: Stefano Babic <sbabic@denx.de>; u-boot@lists.denx.de; Marek Vasut > <marex@denx.de> > Cc: Fabio Estevam <festevam@gmail.com>; Peng Fan <peng.fan@nxp.com>; > Simon Glass <sjg@chromium.org>; Priyanka Jain <priyanka.jain@nxp.com>; Ye > Li <ye.li@nxp.com>; Horia Geanta <horia.geanta@nxp.com>; Ji Luo > <ji.luo@nxp.com>; Franck Lenormand <franck.lenormand@nxp.com>; Silvano Di > Ninno <silvano.dininno@nxp.com>; Sahil Malhotra <sahil.malhotra@nxp.com>; > Pankaj Gupta <pankaj.gupta@nxp.com>; Varun Sethi <V.Sethi@nxp.com>; dl- > uboot-imx <uboot-imx@nxp.com>; Shengzhou Liu <shengzhou.liu@nxp.com>; > Mingkai Hu <mingkai.hu@nxp.com>; Rajesh Bhagat <rajesh.bhagat@nxp.com>; > Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>; Wasim Khan > <wasim.khan@nxp.com>; Alison Wang <alison.wang@nxp.com>; Pramod > Kumar <pramod.kumar_1@nxp.com>; Andy Tang <andy.tang@nxp.com>; > Adrian Alonso <adrian.alonso@nxp.com>; Vladimir Oltean <olteanv@gmail.com> > Subject: RE: [EXT] Re: [PATCH v8 01/15] crypto/fsl: Add support for CAAM Job > ring driver model > > Hello Marek > > > -----Original Message----- > > From: Stefano Babic <sbabic@denx.de> > > Sent: Saturday, February 5, 2022 7:46 PM > > To: Gaurav Jain <gaurav.jain@nxp.com>; u-boot@lists.denx.de > > Cc: Stefano Babic <sbabic@denx.de>; Fabio Estevam > > <festevam@gmail.com>; Peng Fan <peng.fan@nxp.com>; Simon Glass > > <sjg@chromium.org>; Priyanka Jain <priyanka.jain@nxp.com>; Ye Li > > <ye.li@nxp.com>; Horia Geanta <horia.geanta@nxp.com>; Ji Luo > > <ji.luo@nxp.com>; Franck Lenormand <franck.lenormand@nxp.com>; Silvano > > Di Ninno <silvano.dininno@nxp.com>; Sahil Malhotra > > <sahil.malhotra@nxp.com>; Pankaj Gupta <pankaj.gupta@nxp.com>; Varun > > Sethi <V.Sethi@nxp.com>; dl-uboot-imx <uboot-imx@nxp.com>; Shengzhou > > Liu <shengzhou.liu@nxp.com>; Mingkai Hu <mingkai.hu@nxp.com>; Rajesh > > Bhagat <rajesh.bhagat@nxp.com>; Meenakshi Aggarwal > > <meenakshi.aggarwal@nxp.com>; Wasim Khan <wasim.khan@nxp.com>; > Alison > > Wang <alison.wang@nxp.com>; Pramod Kumar > <pramod.kumar_1@nxp.com>; > > Andy Tang <andy.tang@nxp.com>; Adrian Alonso <adrian.alonso@nxp.com>; > > Vladimir Oltean <olteanv@gmail.com>; Marek Vasut <marex@denx.de> > > Subject: [EXT] Re: [PATCH v8 01/15] crypto/fsl: Add support for CAAM > > Job ring driver model > > > > Caution: EXT Email > > > > Hi Gaurav, > > > > rather I still have issues to run CI with this applied. The reason is > > that this adds an overhead to SPL and it breaks the board imx6dl_mamoj > > because SPL exceeds the maximum size for a DL SOC. > > > > See > > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fsour > > ce.d > > enx.de%2Fu-boot%2Fcustodians%2Fu-boot-imx%2F- > > %2Fjobs%2F387370&data=04%7C01%7Cgaurav.jain%40nxp.com%7C3a2 > 73 > > > 1dd27fc4bebcad308d9e8b21464%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C > > > 0%7C0%7C637796673834942697%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4 > > > wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000&am > > > p;sdata=pI%2F%2FlNtrdrGCa8sSvcr6uNu4jze7pzDqZtI52FIDj50%3D&reserve > > d=0 > > > > I do not know if it is possible to drop some features from SPL for > > this board (Added Marek as board maintainer). > > CONFIG_IMX_HAB is enabled for imx6dl_mamoj. So CAAM is built for SPL, > results in increased size. > However CAAM is not initialized in SPL. As Stefano suggested, Can you drop > some features from SPL? > > Regards > Gaurav Jain > > > > Best regards, > > Stefano > > > > On 10.01.22 13:27, Gaurav Jain wrote: > > > added device tree support for job ring driver. > > > sec is initialized based on job ring information processed from > > > device tree. > > > > > > Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com> > > > Reviewed-by: Ye Li <ye.li@nxp.com> > > > --- > > > drivers/crypto/fsl/jr.c | 323 ++++++++++++++++++++++++++-------------- > > > drivers/crypto/fsl/jr.h | 31 +++- > > > 2 files changed, 240 insertions(+), 114 deletions(-) > > > > > > diff --git a/drivers/crypto/fsl/jr.c b/drivers/crypto/fsl/jr.c index > > > 22b649219e..8103987425 100644 > > > --- a/drivers/crypto/fsl/jr.c > > > +++ b/drivers/crypto/fsl/jr.c > > > @@ -1,7 +1,7 @@ > > > // SPDX-License-Identifier: GPL-2.0+ > > > /* > > > * Copyright 2008-2014 Freescale Semiconductor, Inc. > > > - * Copyright 2018 NXP > > > + * Copyright 2018, 2021 NXP > > > * > > > * Based on CAAM driver in drivers/crypto/caam in Linux > > > */ > > > @@ -11,7 +11,6 @@ > > > #include <linux/kernel.h> > > > #include <log.h> > > > #include <malloc.h> > > > -#include "fsl_sec.h" > > > #include "jr.h" > > > #include "jobdesc.h" > > > #include "desc_constr.h" > > > @@ -21,7 +20,10 @@ > > > #include <asm/cache.h> > > > #include <asm/fsl_pamu.h> > > > #endif > > > +#include <dm.h> > > > #include <dm/lists.h> > > > +#include <dm/root.h> > > > +#include <dm/device-internal.h> > > > #include <linux/delay.h> > > > > > > #define CIRC_CNT(head, tail, size) (((head) - (tail)) & (size - > > > 1)) @@ -35,20 +37,29 @@ uint32_t > > sec_offset[CONFIG_SYS_FSL_MAX_NUM_OF_SEC] = { > > > #endif > > > }; > > > > > > +#if CONFIG_IS_ENABLED(DM) > > > +struct udevice *caam_dev; > > > +#else > > > #define SEC_ADDR(idx) \ > > > (ulong)((CONFIG_SYS_FSL_SEC_ADDR + sec_offset[idx])) > > > > > > #define SEC_JR0_ADDR(idx) \ > > > (ulong)(SEC_ADDR(idx) + \ > > > (CONFIG_SYS_FSL_JR0_OFFSET - CONFIG_SYS_FSL_SEC_OFFSET)) > > > +struct caam_regs caam_st; > > > +#endif > > > > > > -struct jobring jr0[CONFIG_SYS_FSL_MAX_NUM_OF_SEC]; > > > +static inline u32 jr_start_reg(u8 jrid) { > > > + return (1 << jrid); > > > +} > > > > > > -static inline void start_jr0(uint8_t sec_idx) > > > +static inline void start_jr(struct caam_regs *caam) > > > { > > > - ccsr_sec_t *sec = (void *)SEC_ADDR(sec_idx); > > > + ccsr_sec_t *sec = caam->sec; > > > u32 ctpr_ms = sec_in32(&sec->ctpr_ms); > > > u32 scfgr = sec_in32(&sec->scfgr); > > > + u32 jrstart = jr_start_reg(caam->jrid); > > > > > > if (ctpr_ms & SEC_CTPR_MS_VIRT_EN_INCL) { > > > /* VIRT_EN_INCL = 1 & VIRT_EN_POR = 1 or @@ -56,23 > > > +67,16 @@ static inline void start_jr0(uint8_t sec_idx) > > > */ > > > if ((ctpr_ms & SEC_CTPR_MS_VIRT_EN_POR) || > > > (scfgr & SEC_SCFGR_VIRT_EN)) > > > - sec_out32(&sec->jrstartr, CONFIG_JRSTARTR_JR0); > > > + sec_out32(&sec->jrstartr, jrstart); > > > } else { > > > /* VIRT_EN_INCL = 0 && VIRT_EN_POR_VALUE = 1 */ > > > if (ctpr_ms & SEC_CTPR_MS_VIRT_EN_POR) > > > - sec_out32(&sec->jrstartr, CONFIG_JRSTARTR_JR0); > > > + sec_out32(&sec->jrstartr, jrstart); > > > } > > > } > > > > > > -static inline void jr_reset_liodn(uint8_t sec_idx) > > > +static inline void jr_disable_irq(struct jr_regs *regs) > > > { > > > - ccsr_sec_t *sec = (void *)SEC_ADDR(sec_idx); > > > - sec_out32(&sec->jrliodnr[0].ls, 0); > > > -} > > > - > > > -static inline void jr_disable_irq(uint8_t sec_idx) -{ > > > - struct jr_regs *regs = (struct jr_regs *)SEC_JR0_ADDR(sec_idx); > > > uint32_t jrcfg = sec_in32(®s->jrcfg1); > > > > > > jrcfg = jrcfg | JR_INTMASK; > > > @@ -80,10 +84,10 @@ static inline void jr_disable_irq(uint8_t sec_idx) > > > sec_out32(®s->jrcfg1, jrcfg); > > > } > > > > > > -static void jr_initregs(uint8_t sec_idx) > > > +static void jr_initregs(uint8_t sec_idx, struct caam_regs *caam) > > > { > > > - struct jr_regs *regs = (struct jr_regs *)SEC_JR0_ADDR(sec_idx); > > > - struct jobring *jr = &jr0[sec_idx]; > > > + struct jr_regs *regs = caam->regs; > > > + struct jobring *jr = &caam->jr[sec_idx]; > > > caam_dma_addr_t ip_base = virt_to_phys((void *)jr->input_ring); > > > caam_dma_addr_t op_base = virt_to_phys((void > > > *)jr->output_ring); > > > > > > @@ -103,16 +107,16 @@ static void jr_initregs(uint8_t sec_idx) > > > sec_out32(®s->irs, JR_SIZE); > > > > > > if (!jr->irq) > > > - jr_disable_irq(sec_idx); > > > + jr_disable_irq(regs); > > > } > > > > > > -static int jr_init(uint8_t sec_idx) > > > +static int jr_init(uint8_t sec_idx, struct caam_regs *caam) > > > { > > > - struct jobring *jr = &jr0[sec_idx]; > > > + struct jobring *jr = &caam->jr[sec_idx]; > > > > > > memset(jr, 0, sizeof(struct jobring)); > > > > > > - jr->jq_id = DEFAULT_JR_ID; > > > + jr->jq_id = caam->jrid; > > > jr->irq = DEFAULT_IRQ; > > > > > > #ifdef CONFIG_FSL_CORENET > > > @@ -134,53 +138,8 @@ static int jr_init(uint8_t sec_idx) > > > memset(jr->input_ring, 0, JR_SIZE * sizeof(caam_dma_addr_t)); > > > memset(jr->output_ring, 0, jr->op_size); > > > > > > - start_jr0(sec_idx); > > > - > > > - jr_initregs(sec_idx); > > > - > > > - return 0; > > > -} > > > - > > > -static int jr_sw_cleanup(uint8_t sec_idx) -{ > > > - struct jobring *jr = &jr0[sec_idx]; > > > - > > > - jr->head = 0; > > > - jr->tail = 0; > > > - jr->read_idx = 0; > > > - jr->write_idx = 0; > > > - memset(jr->info, 0, sizeof(jr->info)); > > > - memset(jr->input_ring, 0, jr->size * sizeof(caam_dma_addr_t)); > > > - memset(jr->output_ring, 0, jr->size * sizeof(struct op_ring)); > > > - > > > - return 0; > > > -} > > > - > > > -static int jr_hw_reset(uint8_t sec_idx) -{ > > > - struct jr_regs *regs = (struct jr_regs *)SEC_JR0_ADDR(sec_idx); > > > - uint32_t timeout = 100000; > > > - uint32_t jrint, jrcr; > > > - > > > - sec_out32(®s->jrcr, JRCR_RESET); > > > - do { > > > - jrint = sec_in32(®s->jrint); > > > - } while (((jrint & JRINT_ERR_HALT_MASK) == > > > - JRINT_ERR_HALT_INPROGRESS) && --timeout); > > > - > > > - jrint = sec_in32(®s->jrint); > > > - if (((jrint & JRINT_ERR_HALT_MASK) != > > > - JRINT_ERR_HALT_INPROGRESS) && timeout == 0) > > > - return -1; > > > - > > > - timeout = 100000; > > > - sec_out32(®s->jrcr, JRCR_RESET); > > > - do { > > > - jrcr = sec_in32(®s->jrcr); > > > - } while ((jrcr & JRCR_RESET) && --timeout); > > > - > > > - if (timeout == 0) > > > - return -1; > > > + start_jr(caam); > > > + jr_initregs(sec_idx, caam); > > > > > > return 0; > > > } > > > @@ -188,10 +147,10 @@ static int jr_hw_reset(uint8_t sec_idx) > > > /* -1 --- error, can't enqueue -- no space available */ > > > static int jr_enqueue(uint32_t *desc_addr, > > > void (*callback)(uint32_t status, void *arg), > > > - void *arg, uint8_t sec_idx) > > > + void *arg, uint8_t sec_idx, struct caam_regs *caam) > > > { > > > - struct jr_regs *regs = (struct jr_regs *)SEC_JR0_ADDR(sec_idx); > > > - struct jobring *jr = &jr0[sec_idx]; > > > + struct jr_regs *regs = caam->regs; > > > + struct jobring *jr = &caam->jr[sec_idx]; > > > int head = jr->head; > > > uint32_t desc_word; > > > int length = desc_len(desc_addr); @@ -263,10 +222,10 @@ static > > > int jr_enqueue(uint32_t *desc_addr, > > > return 0; > > > } > > > > > > -static int jr_dequeue(int sec_idx) > > > +static int jr_dequeue(int sec_idx, struct caam_regs *caam) > > > { > > > - struct jr_regs *regs = (struct jr_regs *)SEC_JR0_ADDR(sec_idx); > > > - struct jobring *jr = &jr0[sec_idx]; > > > + struct jr_regs *regs = caam->regs; > > > + struct jobring *jr = &caam->jr[sec_idx]; > > > int head = jr->head; > > > int tail = jr->tail; > > > int idx, i, found; > > > @@ -349,14 +308,18 @@ static void desc_done(uint32_t status, void *arg) > > > { > > > struct result *x = arg; > > > x->status = status; > > > -#ifndef CONFIG_SPL_BUILD > > > caam_jr_strstatus(status); > > > -#endif > > > x->done = 1; > > > } > > > > > > static inline int run_descriptor_jr_idx(uint32_t *desc, uint8_t sec_idx) > > > { > > > + struct caam_regs *caam; > > > +#if CONFIG_IS_ENABLED(DM) > > > + caam = dev_get_priv(caam_dev); #else > > > + caam = &caam_st; > > > +#endif > > > unsigned long long timeval = 0; > > > unsigned long long timeout = CONFIG_USEC_DEQ_TIMEOUT; > > > struct result op; > > > @@ -364,7 +327,7 @@ static inline int run_descriptor_jr_idx(uint32_t > > > *desc, uint8_t sec_idx) > > > > > > memset(&op, 0, sizeof(op)); > > > > > > - ret = jr_enqueue(desc, desc_done, &op, sec_idx); > > > + ret = jr_enqueue(desc, desc_done, &op, sec_idx, caam); > > > if (ret) { > > > debug("Error in SEC enq\n"); > > > ret = JQ_ENQ_ERR; > > > @@ -375,7 +338,7 @@ static inline int run_descriptor_jr_idx(uint32_t > > > *desc, > > uint8_t sec_idx) > > > udelay(1); > > > timeval += 1; > > > > > > - ret = jr_dequeue(sec_idx); > > > + ret = jr_dequeue(sec_idx, caam); > > > if (ret) { > > > debug("Error in SEC deq\n"); > > > ret = JQ_DEQ_ERR; @@ -402,13 +365,62 @@ int > > > run_descriptor_jr(uint32_t *desc) > > > return run_descriptor_jr_idx(desc, 0); > > > } > > > > > > +static int jr_sw_cleanup(uint8_t sec_idx, struct caam_regs *caam) { > > > + struct jobring *jr = &caam->jr[sec_idx]; > > > + > > > + jr->head = 0; > > > + jr->tail = 0; > > > + jr->read_idx = 0; > > > + jr->write_idx = 0; > > > + memset(jr->info, 0, sizeof(jr->info)); > > > + memset(jr->input_ring, 0, jr->size * sizeof(caam_dma_addr_t)); > > > + memset(jr->output_ring, 0, jr->size * sizeof(struct op_ring)); > > > + > > > + return 0; > > > +} > > > + > > > +static int jr_hw_reset(struct jr_regs *regs) { > > > + uint32_t timeout = 100000; > > > + uint32_t jrint, jrcr; > > > + > > > + sec_out32(®s->jrcr, JRCR_RESET); > > > + do { > > > + jrint = sec_in32(®s->jrint); > > > + } while (((jrint & JRINT_ERR_HALT_MASK) == > > > + JRINT_ERR_HALT_INPROGRESS) && --timeout); > > > + > > > + jrint = sec_in32(®s->jrint); > > > + if (((jrint & JRINT_ERR_HALT_MASK) != > > > + JRINT_ERR_HALT_INPROGRESS) && timeout == 0) > > > + return -1; > > > + > > > + timeout = 100000; > > > + sec_out32(®s->jrcr, JRCR_RESET); > > > + do { > > > + jrcr = sec_in32(®s->jrcr); > > > + } while ((jrcr & JRCR_RESET) && --timeout); > > > + > > > + if (timeout == 0) > > > + return -1; > > > + > > > + return 0; > > > +} > > > + > > > static inline int jr_reset_sec(uint8_t sec_idx) > > > { > > > - if (jr_hw_reset(sec_idx) < 0) > > > + struct caam_regs *caam; > > > +#if CONFIG_IS_ENABLED(DM) > > > + caam = dev_get_priv(caam_dev); #else > > > + caam = &caam_st; > > > +#endif > > > + if (jr_hw_reset(caam->regs) < 0) > > > return -1; > > > > > > /* Clean up the jobring structure maintained by software */ > > > - jr_sw_cleanup(sec_idx); > > > + jr_sw_cleanup(sec_idx, caam); > > > > > > return 0; > > > } > > > @@ -418,9 +430,15 @@ int jr_reset(void) > > > return jr_reset_sec(0); > > > } > > > > > > -static inline int sec_reset_idx(uint8_t sec_idx) > > > +int sec_reset(void) > > > { > > > - ccsr_sec_t *sec = (void *)SEC_ADDR(sec_idx); > > > + struct caam_regs *caam; > > > +#if CONFIG_IS_ENABLED(DM) > > > + caam = dev_get_priv(caam_dev); #else > > > + caam = &caam_st; > > > +#endif > > > + ccsr_sec_t *sec = caam->sec; > > > uint32_t mcfgr = sec_in32(&sec->mcfgr); > > > uint32_t timeout = 100000; > > > > > > @@ -446,11 +464,7 @@ static inline int sec_reset_idx(uint8_t > > > sec_idx) > > > > > > return 0; > > > } > > > -int sec_reset(void) > > > -{ > > > - return sec_reset_idx(0); > > > -} > > > -#ifndef CONFIG_SPL_BUILD > > > + > > > static int deinstantiate_rng(u8 sec_idx, int state_handle_mask) > > > { > > > u32 *desc; > > > @@ -496,12 +510,11 @@ static int deinstantiate_rng(u8 sec_idx, int > > state_handle_mask) > > > return ret; > > > } > > > > > > -static int instantiate_rng(u8 sec_idx, int gen_sk) > > > +static int instantiate_rng(uint8_t sec_idx, ccsr_sec_t *sec, int > > > +gen_sk) > > > { > > > u32 *desc; > > > u32 rdsta_val; > > > int ret = 0, sh_idx, size; > > > - ccsr_sec_t __iomem *sec = (ccsr_sec_t __iomem *)SEC_ADDR(sec_idx); > > > struct rng4tst __iomem *rng = > > > (struct rng4tst __iomem *)&sec->rng; > > > > > > @@ -554,9 +567,8 @@ static int instantiate_rng(u8 sec_idx, int gen_sk) > > > return ret; > > > } > > > > > > -static u8 get_rng_vid(uint8_t sec_idx) > > > +static u8 get_rng_vid(ccsr_sec_t *sec) > > > { > > > - ccsr_sec_t *sec = (void *)SEC_ADDR(sec_idx); > > > u8 vid; > > > > > > if (caam_get_era() < 10) { > > > @@ -574,9 +586,8 @@ static u8 get_rng_vid(uint8_t sec_idx) > > > * By default, the TRNG runs for 200 clocks per sample; > > > * 1200 clocks per sample generates better entropy. > > > */ > > > -static void kick_trng(int ent_delay, uint8_t sec_idx) > > > +static void kick_trng(int ent_delay, ccsr_sec_t *sec) > > > { > > > - ccsr_sec_t __iomem *sec = (ccsr_sec_t __iomem *)SEC_ADDR(sec_idx); > > > struct rng4tst __iomem *rng = > > > (struct rng4tst __iomem *)&sec->rng; > > > u32 val; > > > @@ -603,10 +614,9 @@ static void kick_trng(int ent_delay, uint8_t sec_idx) > > > sec_clrbits32(&rng->rtmctl, RTMCTL_PRGM); > > > } > > > > > > -static int rng_init(uint8_t sec_idx) > > > +static int rng_init(uint8_t sec_idx, ccsr_sec_t *sec) > > > { > > > int ret, gen_sk, ent_delay = RTSDCTL_ENT_DLY_MIN; > > > - ccsr_sec_t __iomem *sec = (ccsr_sec_t __iomem *)SEC_ADDR(sec_idx); > > > struct rng4tst __iomem *rng = > > > (struct rng4tst __iomem *)&sec->rng; > > > u32 inst_handles; > > > @@ -624,7 +634,7 @@ static int rng_init(uint8_t sec_idx) > > > * the TRNG parameters. > > > */ > > > if (!inst_handles) { > > > - kick_trng(ent_delay, sec_idx); > > > + kick_trng(ent_delay, sec); > > > ent_delay += 400; > > > } > > > /* > > > @@ -634,7 +644,7 @@ static int rng_init(uint8_t sec_idx) > > > * interval, leading to a sucessful initialization of > > > * the RNG. > > > */ > > > - ret = instantiate_rng(sec_idx, gen_sk); > > > + ret = instantiate_rng(sec_idx, sec, gen_sk); > > > } while ((ret == -1) && (ent_delay < RTSDCTL_ENT_DLY_MAX)); > > > if (ret) { > > > printf("SEC%u: Failed to instantiate RNG\n", > > > sec_idx); @@ -646,13 +656,28 @@ static int rng_init(uint8_t sec_idx) > > > > > > return ret; > > > } > > > -#endif > > > + > > > int sec_init_idx(uint8_t sec_idx) > > > { > > > - ccsr_sec_t *sec = (void *)SEC_ADDR(sec_idx); > > > - uint32_t mcr = sec_in32(&sec->mcfgr); > > > int ret = 0; > > > - > > > + struct caam_regs *caam; > > > +#if CONFIG_IS_ENABLED(DM) > > > + if (!caam_dev) { > > > + printf("caam_jr: caam not found\n"); > > > + return -1; > > > + } > > > + caam = dev_get_priv(caam_dev); #else > > > + caam_st.sec = (void *)SEC_ADDR(sec_idx); > > > + caam_st.regs = (struct jr_regs *)SEC_JR0_ADDR(sec_idx); > > > + caam_st.jrid = 0; > > > + caam = &caam_st; > > > +#endif > > > + ccsr_sec_t *sec = caam->sec; > > > + uint32_t mcr = sec_in32(&sec->mcfgr); #if > > > +defined(CONFIG_SPL_BUILD) && defined(CONFIG_IMX8M) > > > + uint32_t jrdid_ms = 0; > > > +#endif > > > #ifdef CONFIG_FSL_CORENET > > > uint32_t liodnr; > > > uint32_t liodn_ns; > > > @@ -682,6 +707,11 @@ int sec_init_idx(uint8_t sec_idx) > > > mcr |= (1 << MCFGR_PS_SHIFT); > > > #endif > > > sec_out32(&sec->mcfgr, mcr); > > > +#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_IMX8M) > > > + jrdid_ms = JRDID_MS_TZ_OWN | JRDID_MS_PRIM_TZ | > > JRDID_MS_PRIM_DID; > > > + sec_out32(&sec->jrliodnr[caam->jrid].ms, jrdid_ms); #endif > > > + jr_reset(); > > > > > > #ifdef CONFIG_FSL_CORENET > > > #ifdef CONFIG_SPL_BUILD > > > @@ -693,20 +723,19 @@ int sec_init_idx(uint8_t sec_idx) > > > liodn_ns = CONFIG_SPL_JR0_LIODN_NS & JRNSLIODN_MASK; > > > liodn_s = CONFIG_SPL_JR0_LIODN_S & JRSLIODN_MASK; > > > > > > - liodnr = sec_in32(&sec->jrliodnr[0].ls) & > > > + liodnr = sec_in32(&sec->jrliodnr[caam->jrid].ls) & > > > ~(JRNSLIODN_MASK | JRSLIODN_MASK); > > > liodnr = liodnr | > > > (liodn_ns << JRNSLIODN_SHIFT) | > > > (liodn_s << JRSLIODN_SHIFT); > > > - sec_out32(&sec->jrliodnr[0].ls, liodnr); > > > + sec_out32(&sec->jrliodnr[caam->jrid].ls, liodnr); > > > #else > > > - liodnr = sec_in32(&sec->jrliodnr[0].ls); > > > + liodnr = sec_in32(&sec->jrliodnr[caam->jrid].ls); > > > liodn_ns = (liodnr & JRNSLIODN_MASK) >> JRNSLIODN_SHIFT; > > > liodn_s = (liodnr & JRSLIODN_MASK) >> JRSLIODN_SHIFT; > > > #endif > > > #endif > > > - > > > - ret = jr_init(sec_idx); > > > + ret = jr_init(sec_idx, caam); > > > if (ret < 0) { > > > printf("SEC%u: initialization failed\n", sec_idx); > > > return -1; > > > @@ -719,9 +748,9 @@ int sec_init_idx(uint8_t sec_idx) > > > > > > pamu_enable(); > > > #endif > > > -#ifndef CONFIG_SPL_BUILD > > > - if (get_rng_vid(sec_idx) >= 4) { > > > - if (rng_init(sec_idx) < 0) { > > > + > > > + if (get_rng_vid(caam->sec) >= 4) { > > > + if (rng_init(sec_idx, caam->sec) < 0) { > > > printf("SEC%u: RNG instantiation failed\n", sec_idx); > > > return -1; > > > } > > > @@ -735,7 +764,6 @@ int sec_init_idx(uint8_t sec_idx) > > > > > > printf("SEC%u: RNG instantiated\n", sec_idx); > > > } > > > -#endif > > > return ret; > > > } > > > > > > @@ -743,3 +771,76 @@ int sec_init(void) > > > { > > > return sec_init_idx(0); > > > } > > > + > > > +#if CONFIG_IS_ENABLED(DM) > > > +static int caam_jr_ioctl(struct udevice *dev, unsigned long > > > +request, void *buf) { > > > + if (request != CAAM_JR_RUN_DESC) > > > + return -ENOSYS; > > > + > > > + return run_descriptor_jr(buf); } > > > + > > > +static int caam_jr_probe(struct udevice *dev) { > > > + struct caam_regs *caam = dev_get_priv(dev); > > > + fdt_addr_t addr; > > > + ofnode node; > > > + unsigned int jr_node = 0; > > > + > > > + caam_dev = dev; > > > + > > > + addr = dev_read_addr(dev); > > > + if (addr == FDT_ADDR_T_NONE) { > > > + printf("caam_jr: crypto not found\n"); > > > + return -EINVAL; > > > + } > > > + caam->sec = (ccsr_sec_t *)(uintptr_t)addr; > > > + caam->regs = (struct jr_regs *)caam->sec; > > > + > > > + /* Check for enabled job ring node */ > > > + ofnode_for_each_subnode(node, dev_ofnode(dev)) { > > > + if (!ofnode_is_available(node)) > > > + continue; > > > + > > > + jr_node = ofnode_read_u32_default(node, "reg", -1); > > > + if (jr_node > 0) { > > > + caam->regs = (struct jr_regs *)((ulong)caam->sec + jr_node); > > > + while (!(jr_node & 0x0F)) > > > + jr_node = jr_node >> 4; > > > + > > > + caam->jrid = jr_node - 1; > > > + break; > > > + } > > > + } > > > + > > > + if (sec_init()) > > > + printf("\nsec_init failed!\n"); > > > + > > > + return 0; > > > +} > > > + > > > +static int caam_jr_bind(struct udevice *dev) { > > > + return 0; > > > +} > > > + > > > +static const struct misc_ops caam_jr_ops = { > > > + .ioctl = caam_jr_ioctl, > > > +}; > > > + > > > +static const struct udevice_id caam_jr_match[] = { > > > + { .compatible = "fsl,sec-v4.0" }, > > > + { } > > > +}; > > > + > > > +U_BOOT_DRIVER(caam_jr) = { > > > + .name = "caam_jr", > > > + .id = UCLASS_MISC, > > > + .of_match = caam_jr_match, > > > + .ops = &caam_jr_ops, > > > + .bind = caam_jr_bind, > > > + .probe = caam_jr_probe, > > > + .priv_auto = sizeof(struct caam_regs), > > > +}; > > > +#endif > > > diff --git a/drivers/crypto/fsl/jr.h b/drivers/crypto/fsl/jr.h index > > > 1047aa772c..3eb7be79da 100644 > > > --- a/drivers/crypto/fsl/jr.h > > > +++ b/drivers/crypto/fsl/jr.h > > > @@ -1,6 +1,7 @@ > > > /* SPDX-License-Identifier: GPL-2.0+ */ > > > /* > > > * Copyright 2008-2014 Freescale Semiconductor, Inc. > > > + * Copyright 2021 NXP > > > * > > > */ > > > > > > @@ -8,7 +9,9 @@ > > > #define __JR_H > > > > > > #include <linux/compiler.h> > > > +#include "fsl_sec.h" > > > #include "type.h" > > > +#include <misc.h> > > > > > > #define JR_SIZE 4 > > > /* Timeout currently defined as 10 sec */ @@ -35,12 +38,21 @@ > > > #define JRSLIODN_SHIFT 0 > > > #define JRSLIODN_MASK 0x00000fff > > > > > > -#define JQ_DEQ_ERR -1 > > > -#define JQ_DEQ_TO_ERR -2 > > > -#define JQ_ENQ_ERR -3 > > > +#define JRDID_MS_PRIM_DID BIT(0) > > > +#define JRDID_MS_PRIM_TZ BIT(4) > > > +#define JRDID_MS_TZ_OWN BIT(15) > > > + > > > +#define JQ_DEQ_ERR (-1) > > > +#define JQ_DEQ_TO_ERR (-2) > > > +#define JQ_ENQ_ERR (-3) > > > > > > #define RNG4_MAX_HANDLES 2 > > > > > > +enum { > > > + /* Run caam jobring descriptor(in buf) */ > > > + CAAM_JR_RUN_DESC, > > > +}; > > > + > > > struct op_ring { > > > caam_dma_addr_t desc; > > > uint32_t status; > > > @@ -102,6 +114,19 @@ struct result { > > > uint32_t status; > > > }; > > > > > > +/* > > > + * struct caam_regs - CAAM initialization register interface > > > + * > > > + * Interface to caam memory map, jobring register, jobring storage. > > > + */ > > > +struct caam_regs { > > > + ccsr_sec_t *sec; /*caam initialization registers*/ > > > + struct jr_regs *regs; /*jobring configuration registers*/ > > > + u8 jrid; /*id to identify a jobring*/ > > > + /*Private sub-storage for a single JobR*/ > > > + struct jobring jr[CONFIG_SYS_FSL_MAX_NUM_OF_SEC]; > > > +}; > > > + > > > void caam_jr_strstatus(u32 status); > > > int run_descriptor_jr(uint32_t *desc); > > > > > > > -- > > > ================================================================= > > ==== > > DENX Software Engineering GmbH, Managing Director: Wolfgang Denk > > HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany > > Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic@denx.de > > > ================================================================= > > ====
Hello Stefano > -----Original Message----- > From: Gaurav Jain > Sent: Friday, February 11, 2022 3:09 PM > To: Stefano Babic <sbabic@denx.de>; u-boot@lists.denx.de; Marek Vasut > <marex@denx.de> > Cc: Fabio Estevam <festevam@gmail.com>; Peng Fan <peng.fan@nxp.com>; > Simon Glass <sjg@chromium.org>; Priyanka Jain <priyanka.jain@nxp.com>; Ye > Li <ye.li@nxp.com>; Horia Geanta <horia.geanta@nxp.com>; Ji Luo > <ji.luo@nxp.com>; Franck Lenormand <franck.lenormand@nxp.com>; Silvano Di > Ninno <silvano.dininno@nxp.com>; Sahil Malhotra <sahil.malhotra@nxp.com>; > Pankaj Gupta <pankaj.gupta@nxp.com>; Varun Sethi <V.Sethi@nxp.com>; dl- > uboot-imx <uboot-imx@nxp.com>; Shengzhou Liu <shengzhou.liu@nxp.com>; > Mingkai Hu <mingkai.hu@nxp.com>; Rajesh Bhagat <rajesh.bhagat@nxp.com>; > Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>; Wasim Khan > <wasim.khan@nxp.com>; Alison Wang <alison.wang@nxp.com>; Pramod > Kumar <pramod.kumar_1@nxp.com>; Andy Tang <andy.tang@nxp.com>; > Adrian Alonso <adrian.alonso@nxp.com>; Vladimir Oltean <olteanv@gmail.com> > Subject: RE: [EXT] Re: [PATCH v8 01/15] crypto/fsl: Add support for CAAM Job > ring driver model > > Hello Marek > > A gentle reminder!! > Please help to check if some feature can be dropped in SPL from imx6dl_mamoj > board so that CAAM driver model patches can be accepted. > > Regards > Gaurav Jain > > > -----Original Message----- > > From: Gaurav Jain > > Sent: Monday, February 7, 2022 12:43 PM > > To: Stefano Babic <sbabic@denx.de>; u-boot@lists.denx.de; Marek Vasut > > <marex@denx.de> > > Cc: Fabio Estevam <festevam@gmail.com>; Peng Fan <peng.fan@nxp.com>; > > Simon Glass <sjg@chromium.org>; Priyanka Jain <priyanka.jain@nxp.com>; > > Ye Li <ye.li@nxp.com>; Horia Geanta <horia.geanta@nxp.com>; Ji Luo > > <ji.luo@nxp.com>; Franck Lenormand <franck.lenormand@nxp.com>; Silvano > > Di Ninno <silvano.dininno@nxp.com>; Sahil Malhotra > > <sahil.malhotra@nxp.com>; Pankaj Gupta <pankaj.gupta@nxp.com>; Varun > > Sethi <V.Sethi@nxp.com>; dl- uboot-imx <uboot-imx@nxp.com>; Shengzhou > > Liu <shengzhou.liu@nxp.com>; Mingkai Hu <mingkai.hu@nxp.com>; Rajesh > > Bhagat <rajesh.bhagat@nxp.com>; Meenakshi Aggarwal > > <meenakshi.aggarwal@nxp.com>; Wasim Khan <wasim.khan@nxp.com>; > Alison > > Wang <alison.wang@nxp.com>; Pramod Kumar > <pramod.kumar_1@nxp.com>; > > Andy Tang <andy.tang@nxp.com>; Adrian Alonso <adrian.alonso@nxp.com>; > > Vladimir Oltean <olteanv@gmail.com> > > Subject: RE: [EXT] Re: [PATCH v8 01/15] crypto/fsl: Add support for > > CAAM Job ring driver model > > > > Hello Marek > > > > > -----Original Message----- > > > From: Stefano Babic <sbabic@denx.de> > > > Sent: Saturday, February 5, 2022 7:46 PM > > > To: Gaurav Jain <gaurav.jain@nxp.com>; u-boot@lists.denx.de > > > Cc: Stefano Babic <sbabic@denx.de>; Fabio Estevam > > > <festevam@gmail.com>; Peng Fan <peng.fan@nxp.com>; Simon Glass > > > <sjg@chromium.org>; Priyanka Jain <priyanka.jain@nxp.com>; Ye Li > > > <ye.li@nxp.com>; Horia Geanta <horia.geanta@nxp.com>; Ji Luo > > > <ji.luo@nxp.com>; Franck Lenormand <franck.lenormand@nxp.com>; > > > Silvano Di Ninno <silvano.dininno@nxp.com>; Sahil Malhotra > > > <sahil.malhotra@nxp.com>; Pankaj Gupta <pankaj.gupta@nxp.com>; Varun > > > Sethi <V.Sethi@nxp.com>; dl-uboot-imx <uboot-imx@nxp.com>; Shengzhou > > > Liu <shengzhou.liu@nxp.com>; Mingkai Hu <mingkai.hu@nxp.com>; Rajesh > > > Bhagat <rajesh.bhagat@nxp.com>; Meenakshi Aggarwal > > > <meenakshi.aggarwal@nxp.com>; Wasim Khan <wasim.khan@nxp.com>; > > Alison > > > Wang <alison.wang@nxp.com>; Pramod Kumar > > <pramod.kumar_1@nxp.com>; > > > Andy Tang <andy.tang@nxp.com>; Adrian Alonso > > > <adrian.alonso@nxp.com>; Vladimir Oltean <olteanv@gmail.com>; Marek > > > Vasut <marex@denx.de> > > > Subject: [EXT] Re: [PATCH v8 01/15] crypto/fsl: Add support for CAAM > > > Job ring driver model > > > > > > Caution: EXT Email > > > > > > Hi Gaurav, > > > > > > rather I still have issues to run CI with this applied. The reason > > > is that this adds an overhead to SPL and it breaks the board > > > imx6dl_mamoj because SPL exceeds the maximum size for a DL SOC. > > > > > > See > > > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fso > > > ur > > > ce.d > > > enx.de%2Fu-boot%2Fcustodians%2Fu-boot-imx%2F- > > > %2Fjobs%2F387370&data=04%7C01%7Cgaurav.jain%40nxp.com%7C3a > 2 > > 73 > > > > > > 1dd27fc4bebcad308d9e8b21464%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C > > > > > > 0%7C0%7C637796673834942697%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4 > > > > > > wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000&am > > > > > > p;sdata=pI%2F%2FlNtrdrGCa8sSvcr6uNu4jze7pzDqZtI52FIDj50%3D&reserve > > > d=0 > > > > > > I do not know if it is possible to drop some features from SPL for > > > this board (Added Marek as board maintainer). As we have not received any response from imx6dl_mamoj board maintainer. I propose the below solution --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -49,8 +49,8 @@ config USE_IMXIMG_PLUGIN config IMX_HAB - select FSL_CAAM if HAS_CAAM - imply CMD_DEKBLOB if HAS_CAAM + imply FSL_CAAM if HAS_CAAM + imply CMD_DEKBLOB if FSL_CAAM Help --- a/configs/imx6dl_mamoj_defconfig +++ b/configs/imx6dl_mamoj_defconfig @@ -59,3 +59,4 @@ CONFIG_USB_GADGET_MANUFACTURER="FSL" +CONFIG_FSL_CAAM=n Need your help to review this or suggest any other solution. Regards Gaurav Jain > > > > CONFIG_IMX_HAB is enabled for imx6dl_mamoj. So CAAM is built for SPL, > > results in increased size. > > However CAAM is not initialized in SPL. As Stefano suggested, Can you > > drop some features from SPL? > > > > Regards > > Gaurav Jain > > > > > > Best regards, > > > Stefano > > > > > > On 10.01.22 13:27, Gaurav Jain wrote: > > > > added device tree support for job ring driver. > > > > sec is initialized based on job ring information processed from > > > > device tree. > > > > > > > > Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com> > > > > Reviewed-by: Ye Li <ye.li@nxp.com> > > > > --- > > > > drivers/crypto/fsl/jr.c | 323 ++++++++++++++++++++++++++-------------- > > > > drivers/crypto/fsl/jr.h | 31 +++- > > > > 2 files changed, 240 insertions(+), 114 deletions(-) > > > > > > > > diff --git a/drivers/crypto/fsl/jr.c b/drivers/crypto/fsl/jr.c > > > > index > > > > 22b649219e..8103987425 100644 > > > > --- a/drivers/crypto/fsl/jr.c > > > > +++ b/drivers/crypto/fsl/jr.c > > > > @@ -1,7 +1,7 @@ > > > > // SPDX-License-Identifier: GPL-2.0+ > > > > /* > > > > * Copyright 2008-2014 Freescale Semiconductor, Inc. > > > > - * Copyright 2018 NXP > > > > + * Copyright 2018, 2021 NXP > > > > * > > > > * Based on CAAM driver in drivers/crypto/caam in Linux > > > > */ > > > > @@ -11,7 +11,6 @@ > > > > #include <linux/kernel.h> > > > > #include <log.h> > > > > #include <malloc.h> > > > > -#include "fsl_sec.h" > > > > #include "jr.h" > > > > #include "jobdesc.h" > > > > #include "desc_constr.h" > > > > @@ -21,7 +20,10 @@ > > > > #include <asm/cache.h> > > > > #include <asm/fsl_pamu.h> > > > > #endif > > > > +#include <dm.h> > > > > #include <dm/lists.h> > > > > +#include <dm/root.h> > > > > +#include <dm/device-internal.h> > > > > #include <linux/delay.h> > > > > > > > > #define CIRC_CNT(head, tail, size) (((head) - (tail)) & (size - > > > > 1)) @@ -35,20 +37,29 @@ uint32_t > > > sec_offset[CONFIG_SYS_FSL_MAX_NUM_OF_SEC] = { > > > > #endif > > > > }; > > > > > > > > +#if CONFIG_IS_ENABLED(DM) > > > > +struct udevice *caam_dev; > > > > +#else > > > > #define SEC_ADDR(idx) \ > > > > (ulong)((CONFIG_SYS_FSL_SEC_ADDR + sec_offset[idx])) > > > > > > > > #define SEC_JR0_ADDR(idx) \ > > > > (ulong)(SEC_ADDR(idx) + \ > > > > (CONFIG_SYS_FSL_JR0_OFFSET - CONFIG_SYS_FSL_SEC_OFFSET)) > > > > +struct caam_regs caam_st; > > > > +#endif > > > > > > > > -struct jobring jr0[CONFIG_SYS_FSL_MAX_NUM_OF_SEC]; > > > > +static inline u32 jr_start_reg(u8 jrid) { > > > > + return (1 << jrid); > > > > +} > > > > > > > > -static inline void start_jr0(uint8_t sec_idx) > > > > +static inline void start_jr(struct caam_regs *caam) > > > > { > > > > - ccsr_sec_t *sec = (void *)SEC_ADDR(sec_idx); > > > > + ccsr_sec_t *sec = caam->sec; > > > > u32 ctpr_ms = sec_in32(&sec->ctpr_ms); > > > > u32 scfgr = sec_in32(&sec->scfgr); > > > > + u32 jrstart = jr_start_reg(caam->jrid); > > > > > > > > if (ctpr_ms & SEC_CTPR_MS_VIRT_EN_INCL) { > > > > /* VIRT_EN_INCL = 1 & VIRT_EN_POR = 1 or @@ -56,23 > > > > +67,16 @@ static inline void start_jr0(uint8_t sec_idx) > > > > */ > > > > if ((ctpr_ms & SEC_CTPR_MS_VIRT_EN_POR) || > > > > (scfgr & SEC_SCFGR_VIRT_EN)) > > > > - sec_out32(&sec->jrstartr, CONFIG_JRSTARTR_JR0); > > > > + sec_out32(&sec->jrstartr, jrstart); > > > > } else { > > > > /* VIRT_EN_INCL = 0 && VIRT_EN_POR_VALUE = 1 */ > > > > if (ctpr_ms & SEC_CTPR_MS_VIRT_EN_POR) > > > > - sec_out32(&sec->jrstartr, CONFIG_JRSTARTR_JR0); > > > > + sec_out32(&sec->jrstartr, jrstart); > > > > } > > > > } > > > > > > > > -static inline void jr_reset_liodn(uint8_t sec_idx) > > > > +static inline void jr_disable_irq(struct jr_regs *regs) > > > > { > > > > - ccsr_sec_t *sec = (void *)SEC_ADDR(sec_idx); > > > > - sec_out32(&sec->jrliodnr[0].ls, 0); > > > > -} > > > > - > > > > -static inline void jr_disable_irq(uint8_t sec_idx) -{ > > > > - struct jr_regs *regs = (struct jr_regs *)SEC_JR0_ADDR(sec_idx); > > > > uint32_t jrcfg = sec_in32(®s->jrcfg1); > > > > > > > > jrcfg = jrcfg | JR_INTMASK; > > > > @@ -80,10 +84,10 @@ static inline void jr_disable_irq(uint8_t sec_idx) > > > > sec_out32(®s->jrcfg1, jrcfg); > > > > } > > > > > > > > -static void jr_initregs(uint8_t sec_idx) > > > > +static void jr_initregs(uint8_t sec_idx, struct caam_regs *caam) > > > > { > > > > - struct jr_regs *regs = (struct jr_regs *)SEC_JR0_ADDR(sec_idx); > > > > - struct jobring *jr = &jr0[sec_idx]; > > > > + struct jr_regs *regs = caam->regs; > > > > + struct jobring *jr = &caam->jr[sec_idx]; > > > > caam_dma_addr_t ip_base = virt_to_phys((void *)jr->input_ring); > > > > caam_dma_addr_t op_base = virt_to_phys((void > > > > *)jr->output_ring); > > > > > > > > @@ -103,16 +107,16 @@ static void jr_initregs(uint8_t sec_idx) > > > > sec_out32(®s->irs, JR_SIZE); > > > > > > > > if (!jr->irq) > > > > - jr_disable_irq(sec_idx); > > > > + jr_disable_irq(regs); > > > > } > > > > > > > > -static int jr_init(uint8_t sec_idx) > > > > +static int jr_init(uint8_t sec_idx, struct caam_regs *caam) > > > > { > > > > - struct jobring *jr = &jr0[sec_idx]; > > > > + struct jobring *jr = &caam->jr[sec_idx]; > > > > > > > > memset(jr, 0, sizeof(struct jobring)); > > > > > > > > - jr->jq_id = DEFAULT_JR_ID; > > > > + jr->jq_id = caam->jrid; > > > > jr->irq = DEFAULT_IRQ; > > > > > > > > #ifdef CONFIG_FSL_CORENET > > > > @@ -134,53 +138,8 @@ static int jr_init(uint8_t sec_idx) > > > > memset(jr->input_ring, 0, JR_SIZE * sizeof(caam_dma_addr_t)); > > > > memset(jr->output_ring, 0, jr->op_size); > > > > > > > > - start_jr0(sec_idx); > > > > - > > > > - jr_initregs(sec_idx); > > > > - > > > > - return 0; > > > > -} > > > > - > > > > -static int jr_sw_cleanup(uint8_t sec_idx) -{ > > > > - struct jobring *jr = &jr0[sec_idx]; > > > > - > > > > - jr->head = 0; > > > > - jr->tail = 0; > > > > - jr->read_idx = 0; > > > > - jr->write_idx = 0; > > > > - memset(jr->info, 0, sizeof(jr->info)); > > > > - memset(jr->input_ring, 0, jr->size * sizeof(caam_dma_addr_t)); > > > > - memset(jr->output_ring, 0, jr->size * sizeof(struct op_ring)); > > > > - > > > > - return 0; > > > > -} > > > > - > > > > -static int jr_hw_reset(uint8_t sec_idx) -{ > > > > - struct jr_regs *regs = (struct jr_regs *)SEC_JR0_ADDR(sec_idx); > > > > - uint32_t timeout = 100000; > > > > - uint32_t jrint, jrcr; > > > > - > > > > - sec_out32(®s->jrcr, JRCR_RESET); > > > > - do { > > > > - jrint = sec_in32(®s->jrint); > > > > - } while (((jrint & JRINT_ERR_HALT_MASK) == > > > > - JRINT_ERR_HALT_INPROGRESS) && --timeout); > > > > - > > > > - jrint = sec_in32(®s->jrint); > > > > - if (((jrint & JRINT_ERR_HALT_MASK) != > > > > - JRINT_ERR_HALT_INPROGRESS) && timeout == 0) > > > > - return -1; > > > > - > > > > - timeout = 100000; > > > > - sec_out32(®s->jrcr, JRCR_RESET); > > > > - do { > > > > - jrcr = sec_in32(®s->jrcr); > > > > - } while ((jrcr & JRCR_RESET) && --timeout); > > > > - > > > > - if (timeout == 0) > > > > - return -1; > > > > + start_jr(caam); > > > > + jr_initregs(sec_idx, caam); > > > > > > > > return 0; > > > > } > > > > @@ -188,10 +147,10 @@ static int jr_hw_reset(uint8_t sec_idx) > > > > /* -1 --- error, can't enqueue -- no space available */ > > > > static int jr_enqueue(uint32_t *desc_addr, > > > > void (*callback)(uint32_t status, void *arg), > > > > - void *arg, uint8_t sec_idx) > > > > + void *arg, uint8_t sec_idx, struct caam_regs *caam) > > > > { > > > > - struct jr_regs *regs = (struct jr_regs *)SEC_JR0_ADDR(sec_idx); > > > > - struct jobring *jr = &jr0[sec_idx]; > > > > + struct jr_regs *regs = caam->regs; > > > > + struct jobring *jr = &caam->jr[sec_idx]; > > > > int head = jr->head; > > > > uint32_t desc_word; > > > > int length = desc_len(desc_addr); @@ -263,10 +222,10 @@ > > > > static int jr_enqueue(uint32_t *desc_addr, > > > > return 0; > > > > } > > > > > > > > -static int jr_dequeue(int sec_idx) > > > > +static int jr_dequeue(int sec_idx, struct caam_regs *caam) > > > > { > > > > - struct jr_regs *regs = (struct jr_regs *)SEC_JR0_ADDR(sec_idx); > > > > - struct jobring *jr = &jr0[sec_idx]; > > > > + struct jr_regs *regs = caam->regs; > > > > + struct jobring *jr = &caam->jr[sec_idx]; > > > > int head = jr->head; > > > > int tail = jr->tail; > > > > int idx, i, found; > > > > @@ -349,14 +308,18 @@ static void desc_done(uint32_t status, void *arg) > > > > { > > > > struct result *x = arg; > > > > x->status = status; > > > > -#ifndef CONFIG_SPL_BUILD > > > > caam_jr_strstatus(status); > > > > -#endif > > > > x->done = 1; > > > > } > > > > > > > > static inline int run_descriptor_jr_idx(uint32_t *desc, uint8_t sec_idx) > > > > { > > > > + struct caam_regs *caam; > > > > +#if CONFIG_IS_ENABLED(DM) > > > > + caam = dev_get_priv(caam_dev); #else > > > > + caam = &caam_st; > > > > +#endif > > > > unsigned long long timeval = 0; > > > > unsigned long long timeout = CONFIG_USEC_DEQ_TIMEOUT; > > > > struct result op; > > > > @@ -364,7 +327,7 @@ static inline int > > > > run_descriptor_jr_idx(uint32_t *desc, uint8_t sec_idx) > > > > > > > > memset(&op, 0, sizeof(op)); > > > > > > > > - ret = jr_enqueue(desc, desc_done, &op, sec_idx); > > > > + ret = jr_enqueue(desc, desc_done, &op, sec_idx, caam); > > > > if (ret) { > > > > debug("Error in SEC enq\n"); > > > > ret = JQ_ENQ_ERR; > > > > @@ -375,7 +338,7 @@ static inline int > > > > run_descriptor_jr_idx(uint32_t *desc, > > > uint8_t sec_idx) > > > > udelay(1); > > > > timeval += 1; > > > > > > > > - ret = jr_dequeue(sec_idx); > > > > + ret = jr_dequeue(sec_idx, caam); > > > > if (ret) { > > > > debug("Error in SEC deq\n"); > > > > ret = JQ_DEQ_ERR; @@ -402,13 +365,62 @@ int > > > > run_descriptor_jr(uint32_t *desc) > > > > return run_descriptor_jr_idx(desc, 0); > > > > } > > > > > > > > +static int jr_sw_cleanup(uint8_t sec_idx, struct caam_regs *caam) { > > > > + struct jobring *jr = &caam->jr[sec_idx]; > > > > + > > > > + jr->head = 0; > > > > + jr->tail = 0; > > > > + jr->read_idx = 0; > > > > + jr->write_idx = 0; > > > > + memset(jr->info, 0, sizeof(jr->info)); > > > > + memset(jr->input_ring, 0, jr->size * sizeof(caam_dma_addr_t)); > > > > + memset(jr->output_ring, 0, jr->size * sizeof(struct > > > > + op_ring)); > > > > + > > > > + return 0; > > > > +} > > > > + > > > > +static int jr_hw_reset(struct jr_regs *regs) { > > > > + uint32_t timeout = 100000; > > > > + uint32_t jrint, jrcr; > > > > + > > > > + sec_out32(®s->jrcr, JRCR_RESET); > > > > + do { > > > > + jrint = sec_in32(®s->jrint); > > > > + } while (((jrint & JRINT_ERR_HALT_MASK) == > > > > + JRINT_ERR_HALT_INPROGRESS) && --timeout); > > > > + > > > > + jrint = sec_in32(®s->jrint); > > > > + if (((jrint & JRINT_ERR_HALT_MASK) != > > > > + JRINT_ERR_HALT_INPROGRESS) && timeout == 0) > > > > + return -1; > > > > + > > > > + timeout = 100000; > > > > + sec_out32(®s->jrcr, JRCR_RESET); > > > > + do { > > > > + jrcr = sec_in32(®s->jrcr); > > > > + } while ((jrcr & JRCR_RESET) && --timeout); > > > > + > > > > + if (timeout == 0) > > > > + return -1; > > > > + > > > > + return 0; > > > > +} > > > > + > > > > static inline int jr_reset_sec(uint8_t sec_idx) > > > > { > > > > - if (jr_hw_reset(sec_idx) < 0) > > > > + struct caam_regs *caam; > > > > +#if CONFIG_IS_ENABLED(DM) > > > > + caam = dev_get_priv(caam_dev); #else > > > > + caam = &caam_st; > > > > +#endif > > > > + if (jr_hw_reset(caam->regs) < 0) > > > > return -1; > > > > > > > > /* Clean up the jobring structure maintained by software */ > > > > - jr_sw_cleanup(sec_idx); > > > > + jr_sw_cleanup(sec_idx, caam); > > > > > > > > return 0; > > > > } > > > > @@ -418,9 +430,15 @@ int jr_reset(void) > > > > return jr_reset_sec(0); > > > > } > > > > > > > > -static inline int sec_reset_idx(uint8_t sec_idx) > > > > +int sec_reset(void) > > > > { > > > > - ccsr_sec_t *sec = (void *)SEC_ADDR(sec_idx); > > > > + struct caam_regs *caam; > > > > +#if CONFIG_IS_ENABLED(DM) > > > > + caam = dev_get_priv(caam_dev); #else > > > > + caam = &caam_st; > > > > +#endif > > > > + ccsr_sec_t *sec = caam->sec; > > > > uint32_t mcfgr = sec_in32(&sec->mcfgr); > > > > uint32_t timeout = 100000; > > > > > > > > @@ -446,11 +464,7 @@ static inline int sec_reset_idx(uint8_t > > > > sec_idx) > > > > > > > > return 0; > > > > } > > > > -int sec_reset(void) > > > > -{ > > > > - return sec_reset_idx(0); > > > > -} > > > > -#ifndef CONFIG_SPL_BUILD > > > > + > > > > static int deinstantiate_rng(u8 sec_idx, int state_handle_mask) > > > > { > > > > u32 *desc; > > > > @@ -496,12 +510,11 @@ static int deinstantiate_rng(u8 sec_idx, int > > > state_handle_mask) > > > > return ret; > > > > } > > > > > > > > -static int instantiate_rng(u8 sec_idx, int gen_sk) > > > > +static int instantiate_rng(uint8_t sec_idx, ccsr_sec_t *sec, int > > > > +gen_sk) > > > > { > > > > u32 *desc; > > > > u32 rdsta_val; > > > > int ret = 0, sh_idx, size; > > > > - ccsr_sec_t __iomem *sec = (ccsr_sec_t __iomem *)SEC_ADDR(sec_idx); > > > > struct rng4tst __iomem *rng = > > > > (struct rng4tst __iomem *)&sec->rng; > > > > > > > > @@ -554,9 +567,8 @@ static int instantiate_rng(u8 sec_idx, int gen_sk) > > > > return ret; > > > > } > > > > > > > > -static u8 get_rng_vid(uint8_t sec_idx) > > > > +static u8 get_rng_vid(ccsr_sec_t *sec) > > > > { > > > > - ccsr_sec_t *sec = (void *)SEC_ADDR(sec_idx); > > > > u8 vid; > > > > > > > > if (caam_get_era() < 10) { > > > > @@ -574,9 +586,8 @@ static u8 get_rng_vid(uint8_t sec_idx) > > > > * By default, the TRNG runs for 200 clocks per sample; > > > > * 1200 clocks per sample generates better entropy. > > > > */ > > > > -static void kick_trng(int ent_delay, uint8_t sec_idx) > > > > +static void kick_trng(int ent_delay, ccsr_sec_t *sec) > > > > { > > > > - ccsr_sec_t __iomem *sec = (ccsr_sec_t __iomem *)SEC_ADDR(sec_idx); > > > > struct rng4tst __iomem *rng = > > > > (struct rng4tst __iomem *)&sec->rng; > > > > u32 val; > > > > @@ -603,10 +614,9 @@ static void kick_trng(int ent_delay, uint8_t > sec_idx) > > > > sec_clrbits32(&rng->rtmctl, RTMCTL_PRGM); > > > > } > > > > > > > > -static int rng_init(uint8_t sec_idx) > > > > +static int rng_init(uint8_t sec_idx, ccsr_sec_t *sec) > > > > { > > > > int ret, gen_sk, ent_delay = RTSDCTL_ENT_DLY_MIN; > > > > - ccsr_sec_t __iomem *sec = (ccsr_sec_t __iomem *)SEC_ADDR(sec_idx); > > > > struct rng4tst __iomem *rng = > > > > (struct rng4tst __iomem *)&sec->rng; > > > > u32 inst_handles; > > > > @@ -624,7 +634,7 @@ static int rng_init(uint8_t sec_idx) > > > > * the TRNG parameters. > > > > */ > > > > if (!inst_handles) { > > > > - kick_trng(ent_delay, sec_idx); > > > > + kick_trng(ent_delay, sec); > > > > ent_delay += 400; > > > > } > > > > /* > > > > @@ -634,7 +644,7 @@ static int rng_init(uint8_t sec_idx) > > > > * interval, leading to a sucessful initialization of > > > > * the RNG. > > > > */ > > > > - ret = instantiate_rng(sec_idx, gen_sk); > > > > + ret = instantiate_rng(sec_idx, sec, gen_sk); > > > > } while ((ret == -1) && (ent_delay < RTSDCTL_ENT_DLY_MAX)); > > > > if (ret) { > > > > printf("SEC%u: Failed to instantiate RNG\n", > > > > sec_idx); @@ -646,13 +656,28 @@ static int rng_init(uint8_t > > > > sec_idx) > > > > > > > > return ret; > > > > } > > > > -#endif > > > > + > > > > int sec_init_idx(uint8_t sec_idx) > > > > { > > > > - ccsr_sec_t *sec = (void *)SEC_ADDR(sec_idx); > > > > - uint32_t mcr = sec_in32(&sec->mcfgr); > > > > int ret = 0; > > > > - > > > > + struct caam_regs *caam; > > > > +#if CONFIG_IS_ENABLED(DM) > > > > + if (!caam_dev) { > > > > + printf("caam_jr: caam not found\n"); > > > > + return -1; > > > > + } > > > > + caam = dev_get_priv(caam_dev); #else > > > > + caam_st.sec = (void *)SEC_ADDR(sec_idx); > > > > + caam_st.regs = (struct jr_regs *)SEC_JR0_ADDR(sec_idx); > > > > + caam_st.jrid = 0; > > > > + caam = &caam_st; > > > > +#endif > > > > + ccsr_sec_t *sec = caam->sec; > > > > + uint32_t mcr = sec_in32(&sec->mcfgr); #if > > > > +defined(CONFIG_SPL_BUILD) && defined(CONFIG_IMX8M) > > > > + uint32_t jrdid_ms = 0; > > > > +#endif > > > > #ifdef CONFIG_FSL_CORENET > > > > uint32_t liodnr; > > > > uint32_t liodn_ns; > > > > @@ -682,6 +707,11 @@ int sec_init_idx(uint8_t sec_idx) > > > > mcr |= (1 << MCFGR_PS_SHIFT); > > > > #endif > > > > sec_out32(&sec->mcfgr, mcr); > > > > +#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_IMX8M) > > > > + jrdid_ms = JRDID_MS_TZ_OWN | JRDID_MS_PRIM_TZ | > > > JRDID_MS_PRIM_DID; > > > > + sec_out32(&sec->jrliodnr[caam->jrid].ms, jrdid_ms); #endif > > > > + jr_reset(); > > > > > > > > #ifdef CONFIG_FSL_CORENET > > > > #ifdef CONFIG_SPL_BUILD > > > > @@ -693,20 +723,19 @@ int sec_init_idx(uint8_t sec_idx) > > > > liodn_ns = CONFIG_SPL_JR0_LIODN_NS & JRNSLIODN_MASK; > > > > liodn_s = CONFIG_SPL_JR0_LIODN_S & JRSLIODN_MASK; > > > > > > > > - liodnr = sec_in32(&sec->jrliodnr[0].ls) & > > > > + liodnr = sec_in32(&sec->jrliodnr[caam->jrid].ls) & > > > > ~(JRNSLIODN_MASK | JRSLIODN_MASK); > > > > liodnr = liodnr | > > > > (liodn_ns << JRNSLIODN_SHIFT) | > > > > (liodn_s << JRSLIODN_SHIFT); > > > > - sec_out32(&sec->jrliodnr[0].ls, liodnr); > > > > + sec_out32(&sec->jrliodnr[caam->jrid].ls, liodnr); > > > > #else > > > > - liodnr = sec_in32(&sec->jrliodnr[0].ls); > > > > + liodnr = sec_in32(&sec->jrliodnr[caam->jrid].ls); > > > > liodn_ns = (liodnr & JRNSLIODN_MASK) >> JRNSLIODN_SHIFT; > > > > liodn_s = (liodnr & JRSLIODN_MASK) >> JRSLIODN_SHIFT; > > > > #endif > > > > #endif > > > > - > > > > - ret = jr_init(sec_idx); > > > > + ret = jr_init(sec_idx, caam); > > > > if (ret < 0) { > > > > printf("SEC%u: initialization failed\n", sec_idx); > > > > return -1; > > > > @@ -719,9 +748,9 @@ int sec_init_idx(uint8_t sec_idx) > > > > > > > > pamu_enable(); > > > > #endif > > > > -#ifndef CONFIG_SPL_BUILD > > > > - if (get_rng_vid(sec_idx) >= 4) { > > > > - if (rng_init(sec_idx) < 0) { > > > > + > > > > + if (get_rng_vid(caam->sec) >= 4) { > > > > + if (rng_init(sec_idx, caam->sec) < 0) { > > > > printf("SEC%u: RNG instantiation failed\n", sec_idx); > > > > return -1; > > > > } > > > > @@ -735,7 +764,6 @@ int sec_init_idx(uint8_t sec_idx) > > > > > > > > printf("SEC%u: RNG instantiated\n", sec_idx); > > > > } > > > > -#endif > > > > return ret; > > > > } > > > > > > > > @@ -743,3 +771,76 @@ int sec_init(void) > > > > { > > > > return sec_init_idx(0); > > > > } > > > > + > > > > +#if CONFIG_IS_ENABLED(DM) > > > > +static int caam_jr_ioctl(struct udevice *dev, unsigned long > > > > +request, void *buf) { > > > > + if (request != CAAM_JR_RUN_DESC) > > > > + return -ENOSYS; > > > > + > > > > + return run_descriptor_jr(buf); } > > > > + > > > > +static int caam_jr_probe(struct udevice *dev) { > > > > + struct caam_regs *caam = dev_get_priv(dev); > > > > + fdt_addr_t addr; > > > > + ofnode node; > > > > + unsigned int jr_node = 0; > > > > + > > > > + caam_dev = dev; > > > > + > > > > + addr = dev_read_addr(dev); > > > > + if (addr == FDT_ADDR_T_NONE) { > > > > + printf("caam_jr: crypto not found\n"); > > > > + return -EINVAL; > > > > + } > > > > + caam->sec = (ccsr_sec_t *)(uintptr_t)addr; > > > > + caam->regs = (struct jr_regs *)caam->sec; > > > > + > > > > + /* Check for enabled job ring node */ > > > > + ofnode_for_each_subnode(node, dev_ofnode(dev)) { > > > > + if (!ofnode_is_available(node)) > > > > + continue; > > > > + > > > > + jr_node = ofnode_read_u32_default(node, "reg", -1); > > > > + if (jr_node > 0) { > > > > + caam->regs = (struct jr_regs *)((ulong)caam->sec + jr_node); > > > > + while (!(jr_node & 0x0F)) > > > > + jr_node = jr_node >> 4; > > > > + > > > > + caam->jrid = jr_node - 1; > > > > + break; > > > > + } > > > > + } > > > > + > > > > + if (sec_init()) > > > > + printf("\nsec_init failed!\n"); > > > > + > > > > + return 0; > > > > +} > > > > + > > > > +static int caam_jr_bind(struct udevice *dev) { > > > > + return 0; > > > > +} > > > > + > > > > +static const struct misc_ops caam_jr_ops = { > > > > + .ioctl = caam_jr_ioctl, > > > > +}; > > > > + > > > > +static const struct udevice_id caam_jr_match[] = { > > > > + { .compatible = "fsl,sec-v4.0" }, > > > > + { } > > > > +}; > > > > + > > > > +U_BOOT_DRIVER(caam_jr) = { > > > > + .name = "caam_jr", > > > > + .id = UCLASS_MISC, > > > > + .of_match = caam_jr_match, > > > > + .ops = &caam_jr_ops, > > > > + .bind = caam_jr_bind, > > > > + .probe = caam_jr_probe, > > > > + .priv_auto = sizeof(struct caam_regs), > > > > +}; > > > > +#endif > > > > diff --git a/drivers/crypto/fsl/jr.h b/drivers/crypto/fsl/jr.h > > > > index 1047aa772c..3eb7be79da 100644 > > > > --- a/drivers/crypto/fsl/jr.h > > > > +++ b/drivers/crypto/fsl/jr.h > > > > @@ -1,6 +1,7 @@ > > > > /* SPDX-License-Identifier: GPL-2.0+ */ > > > > /* > > > > * Copyright 2008-2014 Freescale Semiconductor, Inc. > > > > + * Copyright 2021 NXP > > > > * > > > > */ > > > > > > > > @@ -8,7 +9,9 @@ > > > > #define __JR_H > > > > > > > > #include <linux/compiler.h> > > > > +#include "fsl_sec.h" > > > > #include "type.h" > > > > +#include <misc.h> > > > > > > > > #define JR_SIZE 4 > > > > /* Timeout currently defined as 10 sec */ @@ -35,12 +38,21 @@ > > > > #define JRSLIODN_SHIFT 0 > > > > #define JRSLIODN_MASK 0x00000fff > > > > > > > > -#define JQ_DEQ_ERR -1 > > > > -#define JQ_DEQ_TO_ERR -2 > > > > -#define JQ_ENQ_ERR -3 > > > > +#define JRDID_MS_PRIM_DID BIT(0) > > > > +#define JRDID_MS_PRIM_TZ BIT(4) > > > > +#define JRDID_MS_TZ_OWN BIT(15) > > > > + > > > > +#define JQ_DEQ_ERR (-1) > > > > +#define JQ_DEQ_TO_ERR (-2) > > > > +#define JQ_ENQ_ERR (-3) > > > > > > > > #define RNG4_MAX_HANDLES 2 > > > > > > > > +enum { > > > > + /* Run caam jobring descriptor(in buf) */ > > > > + CAAM_JR_RUN_DESC, > > > > +}; > > > > + > > > > struct op_ring { > > > > caam_dma_addr_t desc; > > > > uint32_t status; > > > > @@ -102,6 +114,19 @@ struct result { > > > > uint32_t status; > > > > }; > > > > > > > > +/* > > > > + * struct caam_regs - CAAM initialization register interface > > > > + * > > > > + * Interface to caam memory map, jobring register, jobring storage. > > > > + */ > > > > +struct caam_regs { > > > > + ccsr_sec_t *sec; /*caam initialization registers*/ > > > > + struct jr_regs *regs; /*jobring configuration registers*/ > > > > + u8 jrid; /*id to identify a jobring*/ > > > > + /*Private sub-storage for a single JobR*/ > > > > + struct jobring jr[CONFIG_SYS_FSL_MAX_NUM_OF_SEC]; > > > > +}; > > > > + > > > > void caam_jr_strstatus(u32 status); > > > > int run_descriptor_jr(uint32_t *desc); > > > > > > > > > > -- > > > > > > ================================================================= > > > ==== > > > DENX Software Engineering GmbH, Managing Director: Wolfgang Denk > > > HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, > > > Germany > > > Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: > > > sbabic@denx.de > > > > > > ================================================================= > > > ====
Hello Stefano A gentle reminder!! Need your help to check the proposed solution to fix imx6dl_mamoj SPL size issue shared in last mail. Regards Gaurav Jain > -----Original Message----- > From: Gaurav Jain > Sent: Friday, February 25, 2022 12:33 PM > To: Stefano Babic <sbabic@denx.de>; u-boot@lists.denx.de; Marek Vasut > <marex@denx.de> > Cc: Fabio Estevam <festevam@gmail.com>; Peng Fan <peng.fan@nxp.com>; > Simon Glass <sjg@chromium.org>; Priyanka Jain <priyanka.jain@nxp.com>; Ye > Li <ye.li@nxp.com>; Horia Geanta <horia.geanta@nxp.com>; Ji Luo > <ji.luo@nxp.com>; Franck Lenormand <franck.lenormand@nxp.com>; Silvano Di > Ninno <silvano.dininno@nxp.com>; Sahil Malhotra <sahil.malhotra@nxp.com>; > Pankaj Gupta <pankaj.gupta@nxp.com>; Varun Sethi <V.Sethi@nxp.com>; dl- > uboot-imx <uboot-imx@nxp.com>; Shengzhou Liu <shengzhou.liu@nxp.com>; > Mingkai Hu <mingkai.hu@nxp.com>; Rajesh Bhagat <rajesh.bhagat@nxp.com>; > Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>; Wasim Khan > <wasim.khan@nxp.com>; Alison Wang <alison.wang@nxp.com>; Pramod > Kumar <pramod.kumar_1@nxp.com>; Andy Tang <andy.tang@nxp.com>; > Adrian Alonso <adrian.alonso@nxp.com>; Vladimir Oltean <olteanv@gmail.com> > Subject: RE: [EXT] Re: [PATCH v8 01/15] crypto/fsl: Add support for CAAM Job > ring driver model > > Hello Stefano > > > -----Original Message----- > > From: Gaurav Jain > > Sent: Friday, February 11, 2022 3:09 PM > > To: Stefano Babic <sbabic@denx.de>; u-boot@lists.denx.de; Marek Vasut > > <marex@denx.de> > > Cc: Fabio Estevam <festevam@gmail.com>; Peng Fan <peng.fan@nxp.com>; > > Simon Glass <sjg@chromium.org>; Priyanka Jain <priyanka.jain@nxp.com>; > > Ye Li <ye.li@nxp.com>; Horia Geanta <horia.geanta@nxp.com>; Ji Luo > > <ji.luo@nxp.com>; Franck Lenormand <franck.lenormand@nxp.com>; Silvano > > Di Ninno <silvano.dininno@nxp.com>; Sahil Malhotra > > <sahil.malhotra@nxp.com>; Pankaj Gupta <pankaj.gupta@nxp.com>; Varun > > Sethi <V.Sethi@nxp.com>; dl- uboot-imx <uboot-imx@nxp.com>; Shengzhou > > Liu <shengzhou.liu@nxp.com>; Mingkai Hu <mingkai.hu@nxp.com>; Rajesh > > Bhagat <rajesh.bhagat@nxp.com>; Meenakshi Aggarwal > > <meenakshi.aggarwal@nxp.com>; Wasim Khan <wasim.khan@nxp.com>; > Alison > > Wang <alison.wang@nxp.com>; Pramod Kumar > <pramod.kumar_1@nxp.com>; > > Andy Tang <andy.tang@nxp.com>; Adrian Alonso <adrian.alonso@nxp.com>; > > Vladimir Oltean <olteanv@gmail.com> > > Subject: RE: [EXT] Re: [PATCH v8 01/15] crypto/fsl: Add support for > > CAAM Job ring driver model > > > > Hello Marek > > > > A gentle reminder!! > > Please help to check if some feature can be dropped in SPL from > > imx6dl_mamoj board so that CAAM driver model patches can be accepted. > > > > Regards > > Gaurav Jain > > > > > -----Original Message----- > > > From: Gaurav Jain > > > Sent: Monday, February 7, 2022 12:43 PM > > > To: Stefano Babic <sbabic@denx.de>; u-boot@lists.denx.de; Marek > > > Vasut <marex@denx.de> > > > Cc: Fabio Estevam <festevam@gmail.com>; Peng Fan <peng.fan@nxp.com>; > > > Simon Glass <sjg@chromium.org>; Priyanka Jain > > > <priyanka.jain@nxp.com>; Ye Li <ye.li@nxp.com>; Horia Geanta > > > <horia.geanta@nxp.com>; Ji Luo <ji.luo@nxp.com>; Franck Lenormand > > > <franck.lenormand@nxp.com>; Silvano Di Ninno > > > <silvano.dininno@nxp.com>; Sahil Malhotra <sahil.malhotra@nxp.com>; > > > Pankaj Gupta <pankaj.gupta@nxp.com>; Varun Sethi <V.Sethi@nxp.com>; > > > dl- uboot-imx <uboot-imx@nxp.com>; Shengzhou Liu > > > <shengzhou.liu@nxp.com>; Mingkai Hu <mingkai.hu@nxp.com>; Rajesh > > > Bhagat <rajesh.bhagat@nxp.com>; Meenakshi Aggarwal > > > <meenakshi.aggarwal@nxp.com>; Wasim Khan <wasim.khan@nxp.com>; > > Alison > > > Wang <alison.wang@nxp.com>; Pramod Kumar > > <pramod.kumar_1@nxp.com>; > > > Andy Tang <andy.tang@nxp.com>; Adrian Alonso > > > <adrian.alonso@nxp.com>; Vladimir Oltean <olteanv@gmail.com> > > > Subject: RE: [EXT] Re: [PATCH v8 01/15] crypto/fsl: Add support for > > > CAAM Job ring driver model > > > > > > Hello Marek > > > > > > > -----Original Message----- > > > > From: Stefano Babic <sbabic@denx.de> > > > > Sent: Saturday, February 5, 2022 7:46 PM > > > > To: Gaurav Jain <gaurav.jain@nxp.com>; u-boot@lists.denx.de > > > > Cc: Stefano Babic <sbabic@denx.de>; Fabio Estevam > > > > <festevam@gmail.com>; Peng Fan <peng.fan@nxp.com>; Simon Glass > > > > <sjg@chromium.org>; Priyanka Jain <priyanka.jain@nxp.com>; Ye Li > > > > <ye.li@nxp.com>; Horia Geanta <horia.geanta@nxp.com>; Ji Luo > > > > <ji.luo@nxp.com>; Franck Lenormand <franck.lenormand@nxp.com>; > > > > Silvano Di Ninno <silvano.dininno@nxp.com>; Sahil Malhotra > > > > <sahil.malhotra@nxp.com>; Pankaj Gupta <pankaj.gupta@nxp.com>; > > > > Varun Sethi <V.Sethi@nxp.com>; dl-uboot-imx <uboot-imx@nxp.com>; > > > > Shengzhou Liu <shengzhou.liu@nxp.com>; Mingkai Hu > > > > <mingkai.hu@nxp.com>; Rajesh Bhagat <rajesh.bhagat@nxp.com>; > > > > Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>; Wasim Khan > > > > <wasim.khan@nxp.com>; > > > Alison > > > > Wang <alison.wang@nxp.com>; Pramod Kumar > > > <pramod.kumar_1@nxp.com>; > > > > Andy Tang <andy.tang@nxp.com>; Adrian Alonso > > > > <adrian.alonso@nxp.com>; Vladimir Oltean <olteanv@gmail.com>; > > > > Marek Vasut <marex@denx.de> > > > > Subject: [EXT] Re: [PATCH v8 01/15] crypto/fsl: Add support for > > > > CAAM Job ring driver model > > > > > > > > Caution: EXT Email > > > > > > > > Hi Gaurav, > > > > > > > > rather I still have issues to run CI with this applied. The reason > > > > is that this adds an overhead to SPL and it breaks the board > > > > imx6dl_mamoj because SPL exceeds the maximum size for a DL SOC. > > > > > > > > See > > > > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2F > > > > so > > > > ur > > > > ce.d > > > > enx.de%2Fu-boot%2Fcustodians%2Fu-boot-imx%2F- > > > > %2Fjobs%2F387370&data=04%7C01%7Cgaurav.jain%40nxp.com%7C > 3a > > 2 > > > 73 > > > > > > > > > > 1dd27fc4bebcad308d9e8b21464%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C > > > > > > > > > > 0%7C0%7C637796673834942697%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4 > > > > > > > > > > wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000&am > > > > > > > > > > p;sdata=pI%2F%2FlNtrdrGCa8sSvcr6uNu4jze7pzDqZtI52FIDj50%3D&reserve > > > > d=0 > > > > > > > > I do not know if it is possible to drop some features from SPL for > > > > this board (Added Marek as board maintainer). > > As we have not received any response from imx6dl_mamoj board maintainer. > I propose the below solution > > --- a/arch/arm/mach-imx/Kconfig > +++ b/arch/arm/mach-imx/Kconfig > @@ -49,8 +49,8 @@ config USE_IMXIMG_PLUGIN config IMX_HAB > - select FSL_CAAM if HAS_CAAM > - imply CMD_DEKBLOB if HAS_CAAM > + imply FSL_CAAM if HAS_CAAM > + imply CMD_DEKBLOB if FSL_CAAM > Help > > --- a/configs/imx6dl_mamoj_defconfig > +++ b/configs/imx6dl_mamoj_defconfig > @@ -59,3 +59,4 @@ CONFIG_USB_GADGET_MANUFACTURER="FSL" > +CONFIG_FSL_CAAM=n > > Need your help to review this or suggest any other solution. > > Regards > Gaurav Jain > > > > > > > CONFIG_IMX_HAB is enabled for imx6dl_mamoj. So CAAM is built for > > > SPL, results in increased size. > > > However CAAM is not initialized in SPL. As Stefano suggested, Can > > > you drop some features from SPL? > > > > > > Regards > > > Gaurav Jain > > > > > > > > Best regards, > > > > Stefano > > > > > > > > On 10.01.22 13:27, Gaurav Jain wrote: > > > > > added device tree support for job ring driver. > > > > > sec is initialized based on job ring information processed from > > > > > device tree. > > > > > > > > > > Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com> > > > > > Reviewed-by: Ye Li <ye.li@nxp.com> > > > > > --- > > > > > drivers/crypto/fsl/jr.c | 323 ++++++++++++++++++++++++++-------------- > > > > > drivers/crypto/fsl/jr.h | 31 +++- > > > > > 2 files changed, 240 insertions(+), 114 deletions(-) > > > > > > > > > > diff --git a/drivers/crypto/fsl/jr.c b/drivers/crypto/fsl/jr.c > > > > > index > > > > > 22b649219e..8103987425 100644 > > > > > --- a/drivers/crypto/fsl/jr.c > > > > > +++ b/drivers/crypto/fsl/jr.c > > > > > @@ -1,7 +1,7 @@ > > > > > // SPDX-License-Identifier: GPL-2.0+ > > > > > /* > > > > > * Copyright 2008-2014 Freescale Semiconductor, Inc. > > > > > - * Copyright 2018 NXP > > > > > + * Copyright 2018, 2021 NXP > > > > > * > > > > > * Based on CAAM driver in drivers/crypto/caam in Linux > > > > > */ > > > > > @@ -11,7 +11,6 @@ > > > > > #include <linux/kernel.h> > > > > > #include <log.h> > > > > > #include <malloc.h> > > > > > -#include "fsl_sec.h" > > > > > #include "jr.h" > > > > > #include "jobdesc.h" > > > > > #include "desc_constr.h" > > > > > @@ -21,7 +20,10 @@ > > > > > #include <asm/cache.h> > > > > > #include <asm/fsl_pamu.h> > > > > > #endif > > > > > +#include <dm.h> > > > > > #include <dm/lists.h> > > > > > +#include <dm/root.h> > > > > > +#include <dm/device-internal.h> > > > > > #include <linux/delay.h> > > > > > > > > > > #define CIRC_CNT(head, tail, size) (((head) - (tail)) & (size > > > > > - > > > > > 1)) @@ -35,20 +37,29 @@ uint32_t > > > > sec_offset[CONFIG_SYS_FSL_MAX_NUM_OF_SEC] = { > > > > > #endif > > > > > }; > > > > > > > > > > +#if CONFIG_IS_ENABLED(DM) > > > > > +struct udevice *caam_dev; > > > > > +#else > > > > > #define SEC_ADDR(idx) \ > > > > > (ulong)((CONFIG_SYS_FSL_SEC_ADDR + sec_offset[idx])) > > > > > > > > > > #define SEC_JR0_ADDR(idx) \ > > > > > (ulong)(SEC_ADDR(idx) + \ > > > > > (CONFIG_SYS_FSL_JR0_OFFSET - CONFIG_SYS_FSL_SEC_OFFSET)) > > > > > +struct caam_regs caam_st; > > > > > +#endif > > > > > > > > > > -struct jobring jr0[CONFIG_SYS_FSL_MAX_NUM_OF_SEC]; > > > > > +static inline u32 jr_start_reg(u8 jrid) { > > > > > + return (1 << jrid); > > > > > +} > > > > > > > > > > -static inline void start_jr0(uint8_t sec_idx) > > > > > +static inline void start_jr(struct caam_regs *caam) > > > > > { > > > > > - ccsr_sec_t *sec = (void *)SEC_ADDR(sec_idx); > > > > > + ccsr_sec_t *sec = caam->sec; > > > > > u32 ctpr_ms = sec_in32(&sec->ctpr_ms); > > > > > u32 scfgr = sec_in32(&sec->scfgr); > > > > > + u32 jrstart = jr_start_reg(caam->jrid); > > > > > > > > > > if (ctpr_ms & SEC_CTPR_MS_VIRT_EN_INCL) { > > > > > /* VIRT_EN_INCL = 1 & VIRT_EN_POR = 1 or @@ -56,23 > > > > > +67,16 @@ static inline void start_jr0(uint8_t sec_idx) > > > > > */ > > > > > if ((ctpr_ms & SEC_CTPR_MS_VIRT_EN_POR) || > > > > > (scfgr & SEC_SCFGR_VIRT_EN)) > > > > > - sec_out32(&sec->jrstartr, CONFIG_JRSTARTR_JR0); > > > > > + sec_out32(&sec->jrstartr, jrstart); > > > > > } else { > > > > > /* VIRT_EN_INCL = 0 && VIRT_EN_POR_VALUE = 1 */ > > > > > if (ctpr_ms & SEC_CTPR_MS_VIRT_EN_POR) > > > > > - sec_out32(&sec->jrstartr, CONFIG_JRSTARTR_JR0); > > > > > + sec_out32(&sec->jrstartr, jrstart); > > > > > } > > > > > } > > > > > > > > > > -static inline void jr_reset_liodn(uint8_t sec_idx) > > > > > +static inline void jr_disable_irq(struct jr_regs *regs) > > > > > { > > > > > - ccsr_sec_t *sec = (void *)SEC_ADDR(sec_idx); > > > > > - sec_out32(&sec->jrliodnr[0].ls, 0); > > > > > -} > > > > > - > > > > > -static inline void jr_disable_irq(uint8_t sec_idx) -{ > > > > > - struct jr_regs *regs = (struct jr_regs *)SEC_JR0_ADDR(sec_idx); > > > > > uint32_t jrcfg = sec_in32(®s->jrcfg1); > > > > > > > > > > jrcfg = jrcfg | JR_INTMASK; @@ -80,10 +84,10 @@ static > > > > > inline void jr_disable_irq(uint8_t sec_idx) > > > > > sec_out32(®s->jrcfg1, jrcfg); > > > > > } > > > > > > > > > > -static void jr_initregs(uint8_t sec_idx) > > > > > +static void jr_initregs(uint8_t sec_idx, struct caam_regs > > > > > +*caam) > > > > > { > > > > > - struct jr_regs *regs = (struct jr_regs *)SEC_JR0_ADDR(sec_idx); > > > > > - struct jobring *jr = &jr0[sec_idx]; > > > > > + struct jr_regs *regs = caam->regs; > > > > > + struct jobring *jr = &caam->jr[sec_idx]; > > > > > caam_dma_addr_t ip_base = virt_to_phys((void *)jr->input_ring); > > > > > caam_dma_addr_t op_base = virt_to_phys((void > > > > > *)jr->output_ring); > > > > > > > > > > @@ -103,16 +107,16 @@ static void jr_initregs(uint8_t sec_idx) > > > > > sec_out32(®s->irs, JR_SIZE); > > > > > > > > > > if (!jr->irq) > > > > > - jr_disable_irq(sec_idx); > > > > > + jr_disable_irq(regs); > > > > > } > > > > > > > > > > -static int jr_init(uint8_t sec_idx) > > > > > +static int jr_init(uint8_t sec_idx, struct caam_regs *caam) > > > > > { > > > > > - struct jobring *jr = &jr0[sec_idx]; > > > > > + struct jobring *jr = &caam->jr[sec_idx]; > > > > > > > > > > memset(jr, 0, sizeof(struct jobring)); > > > > > > > > > > - jr->jq_id = DEFAULT_JR_ID; > > > > > + jr->jq_id = caam->jrid; > > > > > jr->irq = DEFAULT_IRQ; > > > > > > > > > > #ifdef CONFIG_FSL_CORENET > > > > > @@ -134,53 +138,8 @@ static int jr_init(uint8_t sec_idx) > > > > > memset(jr->input_ring, 0, JR_SIZE * sizeof(caam_dma_addr_t)); > > > > > memset(jr->output_ring, 0, jr->op_size); > > > > > > > > > > - start_jr0(sec_idx); > > > > > - > > > > > - jr_initregs(sec_idx); > > > > > - > > > > > - return 0; > > > > > -} > > > > > - > > > > > -static int jr_sw_cleanup(uint8_t sec_idx) -{ > > > > > - struct jobring *jr = &jr0[sec_idx]; > > > > > - > > > > > - jr->head = 0; > > > > > - jr->tail = 0; > > > > > - jr->read_idx = 0; > > > > > - jr->write_idx = 0; > > > > > - memset(jr->info, 0, sizeof(jr->info)); > > > > > - memset(jr->input_ring, 0, jr->size * sizeof(caam_dma_addr_t)); > > > > > - memset(jr->output_ring, 0, jr->size * sizeof(struct op_ring)); > > > > > - > > > > > - return 0; > > > > > -} > > > > > - > > > > > -static int jr_hw_reset(uint8_t sec_idx) -{ > > > > > - struct jr_regs *regs = (struct jr_regs *)SEC_JR0_ADDR(sec_idx); > > > > > - uint32_t timeout = 100000; > > > > > - uint32_t jrint, jrcr; > > > > > - > > > > > - sec_out32(®s->jrcr, JRCR_RESET); > > > > > - do { > > > > > - jrint = sec_in32(®s->jrint); > > > > > - } while (((jrint & JRINT_ERR_HALT_MASK) == > > > > > - JRINT_ERR_HALT_INPROGRESS) && --timeout); > > > > > - > > > > > - jrint = sec_in32(®s->jrint); > > > > > - if (((jrint & JRINT_ERR_HALT_MASK) != > > > > > - JRINT_ERR_HALT_INPROGRESS) && timeout == 0) > > > > > - return -1; > > > > > - > > > > > - timeout = 100000; > > > > > - sec_out32(®s->jrcr, JRCR_RESET); > > > > > - do { > > > > > - jrcr = sec_in32(®s->jrcr); > > > > > - } while ((jrcr & JRCR_RESET) && --timeout); > > > > > - > > > > > - if (timeout == 0) > > > > > - return -1; > > > > > + start_jr(caam); > > > > > + jr_initregs(sec_idx, caam); > > > > > > > > > > return 0; > > > > > } > > > > > @@ -188,10 +147,10 @@ static int jr_hw_reset(uint8_t sec_idx) > > > > > /* -1 --- error, can't enqueue -- no space available */ > > > > > static int jr_enqueue(uint32_t *desc_addr, > > > > > void (*callback)(uint32_t status, void *arg), > > > > > - void *arg, uint8_t sec_idx) > > > > > + void *arg, uint8_t sec_idx, struct caam_regs *caam) > > > > > { > > > > > - struct jr_regs *regs = (struct jr_regs *)SEC_JR0_ADDR(sec_idx); > > > > > - struct jobring *jr = &jr0[sec_idx]; > > > > > + struct jr_regs *regs = caam->regs; > > > > > + struct jobring *jr = &caam->jr[sec_idx]; > > > > > int head = jr->head; > > > > > uint32_t desc_word; > > > > > int length = desc_len(desc_addr); @@ -263,10 +222,10 @@ > > > > > static int jr_enqueue(uint32_t *desc_addr, > > > > > return 0; > > > > > } > > > > > > > > > > -static int jr_dequeue(int sec_idx) > > > > > +static int jr_dequeue(int sec_idx, struct caam_regs *caam) > > > > > { > > > > > - struct jr_regs *regs = (struct jr_regs *)SEC_JR0_ADDR(sec_idx); > > > > > - struct jobring *jr = &jr0[sec_idx]; > > > > > + struct jr_regs *regs = caam->regs; > > > > > + struct jobring *jr = &caam->jr[sec_idx]; > > > > > int head = jr->head; > > > > > int tail = jr->tail; > > > > > int idx, i, found; > > > > > @@ -349,14 +308,18 @@ static void desc_done(uint32_t status, void > *arg) > > > > > { > > > > > struct result *x = arg; > > > > > x->status = status; > > > > > -#ifndef CONFIG_SPL_BUILD > > > > > caam_jr_strstatus(status); -#endif > > > > > x->done = 1; > > > > > } > > > > > > > > > > static inline int run_descriptor_jr_idx(uint32_t *desc, uint8_t sec_idx) > > > > > { > > > > > + struct caam_regs *caam; > > > > > +#if CONFIG_IS_ENABLED(DM) > > > > > + caam = dev_get_priv(caam_dev); #else > > > > > + caam = &caam_st; > > > > > +#endif > > > > > unsigned long long timeval = 0; > > > > > unsigned long long timeout = CONFIG_USEC_DEQ_TIMEOUT; > > > > > struct result op; > > > > > @@ -364,7 +327,7 @@ static inline int > > > > > run_descriptor_jr_idx(uint32_t *desc, uint8_t sec_idx) > > > > > > > > > > memset(&op, 0, sizeof(op)); > > > > > > > > > > - ret = jr_enqueue(desc, desc_done, &op, sec_idx); > > > > > + ret = jr_enqueue(desc, desc_done, &op, sec_idx, caam); > > > > > if (ret) { > > > > > debug("Error in SEC enq\n"); > > > > > ret = JQ_ENQ_ERR; > > > > > @@ -375,7 +338,7 @@ static inline int > > > > > run_descriptor_jr_idx(uint32_t *desc, > > > > uint8_t sec_idx) > > > > > udelay(1); > > > > > timeval += 1; > > > > > > > > > > - ret = jr_dequeue(sec_idx); > > > > > + ret = jr_dequeue(sec_idx, caam); > > > > > if (ret) { > > > > > debug("Error in SEC deq\n"); > > > > > ret = JQ_DEQ_ERR; @@ -402,13 +365,62 @@ > > > > > int run_descriptor_jr(uint32_t *desc) > > > > > return run_descriptor_jr_idx(desc, 0); > > > > > } > > > > > > > > > > +static int jr_sw_cleanup(uint8_t sec_idx, struct caam_regs *caam) { > > > > > + struct jobring *jr = &caam->jr[sec_idx]; > > > > > + > > > > > + jr->head = 0; > > > > > + jr->tail = 0; > > > > > + jr->read_idx = 0; > > > > > + jr->write_idx = 0; > > > > > + memset(jr->info, 0, sizeof(jr->info)); > > > > > + memset(jr->input_ring, 0, jr->size * sizeof(caam_dma_addr_t)); > > > > > + memset(jr->output_ring, 0, jr->size * sizeof(struct > > > > > + op_ring)); > > > > > + > > > > > + return 0; > > > > > +} > > > > > + > > > > > +static int jr_hw_reset(struct jr_regs *regs) { > > > > > + uint32_t timeout = 100000; > > > > > + uint32_t jrint, jrcr; > > > > > + > > > > > + sec_out32(®s->jrcr, JRCR_RESET); > > > > > + do { > > > > > + jrint = sec_in32(®s->jrint); > > > > > + } while (((jrint & JRINT_ERR_HALT_MASK) == > > > > > + JRINT_ERR_HALT_INPROGRESS) && --timeout); > > > > > + > > > > > + jrint = sec_in32(®s->jrint); > > > > > + if (((jrint & JRINT_ERR_HALT_MASK) != > > > > > + JRINT_ERR_HALT_INPROGRESS) && timeout == 0) > > > > > + return -1; > > > > > + > > > > > + timeout = 100000; > > > > > + sec_out32(®s->jrcr, JRCR_RESET); > > > > > + do { > > > > > + jrcr = sec_in32(®s->jrcr); > > > > > + } while ((jrcr & JRCR_RESET) && --timeout); > > > > > + > > > > > + if (timeout == 0) > > > > > + return -1; > > > > > + > > > > > + return 0; > > > > > +} > > > > > + > > > > > static inline int jr_reset_sec(uint8_t sec_idx) > > > > > { > > > > > - if (jr_hw_reset(sec_idx) < 0) > > > > > + struct caam_regs *caam; > > > > > +#if CONFIG_IS_ENABLED(DM) > > > > > + caam = dev_get_priv(caam_dev); #else > > > > > + caam = &caam_st; > > > > > +#endif > > > > > + if (jr_hw_reset(caam->regs) < 0) > > > > > return -1; > > > > > > > > > > /* Clean up the jobring structure maintained by software */ > > > > > - jr_sw_cleanup(sec_idx); > > > > > + jr_sw_cleanup(sec_idx, caam); > > > > > > > > > > return 0; > > > > > } > > > > > @@ -418,9 +430,15 @@ int jr_reset(void) > > > > > return jr_reset_sec(0); > > > > > } > > > > > > > > > > -static inline int sec_reset_idx(uint8_t sec_idx) > > > > > +int sec_reset(void) > > > > > { > > > > > - ccsr_sec_t *sec = (void *)SEC_ADDR(sec_idx); > > > > > + struct caam_regs *caam; > > > > > +#if CONFIG_IS_ENABLED(DM) > > > > > + caam = dev_get_priv(caam_dev); #else > > > > > + caam = &caam_st; > > > > > +#endif > > > > > + ccsr_sec_t *sec = caam->sec; > > > > > uint32_t mcfgr = sec_in32(&sec->mcfgr); > > > > > uint32_t timeout = 100000; > > > > > > > > > > @@ -446,11 +464,7 @@ static inline int sec_reset_idx(uint8_t > > > > > sec_idx) > > > > > > > > > > return 0; > > > > > } > > > > > -int sec_reset(void) > > > > > -{ > > > > > - return sec_reset_idx(0); > > > > > -} > > > > > -#ifndef CONFIG_SPL_BUILD > > > > > + > > > > > static int deinstantiate_rng(u8 sec_idx, int state_handle_mask) > > > > > { > > > > > u32 *desc; > > > > > @@ -496,12 +510,11 @@ static int deinstantiate_rng(u8 sec_idx, > > > > > int > > > > state_handle_mask) > > > > > return ret; > > > > > } > > > > > > > > > > -static int instantiate_rng(u8 sec_idx, int gen_sk) > > > > > +static int instantiate_rng(uint8_t sec_idx, ccsr_sec_t *sec, > > > > > +int > > > > > +gen_sk) > > > > > { > > > > > u32 *desc; > > > > > u32 rdsta_val; > > > > > int ret = 0, sh_idx, size; > > > > > - ccsr_sec_t __iomem *sec = (ccsr_sec_t __iomem > *)SEC_ADDR(sec_idx); > > > > > struct rng4tst __iomem *rng = > > > > > (struct rng4tst __iomem *)&sec->rng; > > > > > > > > > > @@ -554,9 +567,8 @@ static int instantiate_rng(u8 sec_idx, int gen_sk) > > > > > return ret; > > > > > } > > > > > > > > > > -static u8 get_rng_vid(uint8_t sec_idx) > > > > > +static u8 get_rng_vid(ccsr_sec_t *sec) > > > > > { > > > > > - ccsr_sec_t *sec = (void *)SEC_ADDR(sec_idx); > > > > > u8 vid; > > > > > > > > > > if (caam_get_era() < 10) { @@ -574,9 +586,8 @@ static u8 > > > > > get_rng_vid(uint8_t sec_idx) > > > > > * By default, the TRNG runs for 200 clocks per sample; > > > > > * 1200 clocks per sample generates better entropy. > > > > > */ > > > > > -static void kick_trng(int ent_delay, uint8_t sec_idx) > > > > > +static void kick_trng(int ent_delay, ccsr_sec_t *sec) > > > > > { > > > > > - ccsr_sec_t __iomem *sec = (ccsr_sec_t __iomem > *)SEC_ADDR(sec_idx); > > > > > struct rng4tst __iomem *rng = > > > > > (struct rng4tst __iomem *)&sec->rng; > > > > > u32 val; > > > > > @@ -603,10 +614,9 @@ static void kick_trng(int ent_delay, > > > > > uint8_t > > sec_idx) > > > > > sec_clrbits32(&rng->rtmctl, RTMCTL_PRGM); > > > > > } > > > > > > > > > > -static int rng_init(uint8_t sec_idx) > > > > > +static int rng_init(uint8_t sec_idx, ccsr_sec_t *sec) > > > > > { > > > > > int ret, gen_sk, ent_delay = RTSDCTL_ENT_DLY_MIN; > > > > > - ccsr_sec_t __iomem *sec = (ccsr_sec_t __iomem > *)SEC_ADDR(sec_idx); > > > > > struct rng4tst __iomem *rng = > > > > > (struct rng4tst __iomem *)&sec->rng; > > > > > u32 inst_handles; > > > > > @@ -624,7 +634,7 @@ static int rng_init(uint8_t sec_idx) > > > > > * the TRNG parameters. > > > > > */ > > > > > if (!inst_handles) { > > > > > - kick_trng(ent_delay, sec_idx); > > > > > + kick_trng(ent_delay, sec); > > > > > ent_delay += 400; > > > > > } > > > > > /* > > > > > @@ -634,7 +644,7 @@ static int rng_init(uint8_t sec_idx) > > > > > * interval, leading to a sucessful initialization of > > > > > * the RNG. > > > > > */ > > > > > - ret = instantiate_rng(sec_idx, gen_sk); > > > > > + ret = instantiate_rng(sec_idx, sec, gen_sk); > > > > > } while ((ret == -1) && (ent_delay < RTSDCTL_ENT_DLY_MAX)); > > > > > if (ret) { > > > > > printf("SEC%u: Failed to instantiate RNG\n", > > > > > sec_idx); @@ -646,13 +656,28 @@ static int rng_init(uint8_t > > > > > sec_idx) > > > > > > > > > > return ret; > > > > > } > > > > > -#endif > > > > > + > > > > > int sec_init_idx(uint8_t sec_idx) > > > > > { > > > > > - ccsr_sec_t *sec = (void *)SEC_ADDR(sec_idx); > > > > > - uint32_t mcr = sec_in32(&sec->mcfgr); > > > > > int ret = 0; > > > > > - > > > > > + struct caam_regs *caam; > > > > > +#if CONFIG_IS_ENABLED(DM) > > > > > + if (!caam_dev) { > > > > > + printf("caam_jr: caam not found\n"); > > > > > + return -1; > > > > > + } > > > > > + caam = dev_get_priv(caam_dev); #else > > > > > + caam_st.sec = (void *)SEC_ADDR(sec_idx); > > > > > + caam_st.regs = (struct jr_regs *)SEC_JR0_ADDR(sec_idx); > > > > > + caam_st.jrid = 0; > > > > > + caam = &caam_st; > > > > > +#endif > > > > > + ccsr_sec_t *sec = caam->sec; > > > > > + uint32_t mcr = sec_in32(&sec->mcfgr); #if > > > > > +defined(CONFIG_SPL_BUILD) && defined(CONFIG_IMX8M) > > > > > + uint32_t jrdid_ms = 0; > > > > > +#endif > > > > > #ifdef CONFIG_FSL_CORENET > > > > > uint32_t liodnr; > > > > > uint32_t liodn_ns; > > > > > @@ -682,6 +707,11 @@ int sec_init_idx(uint8_t sec_idx) > > > > > mcr |= (1 << MCFGR_PS_SHIFT); > > > > > #endif > > > > > sec_out32(&sec->mcfgr, mcr); > > > > > +#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_IMX8M) > > > > > + jrdid_ms = JRDID_MS_TZ_OWN | JRDID_MS_PRIM_TZ | > > > > JRDID_MS_PRIM_DID; > > > > > + sec_out32(&sec->jrliodnr[caam->jrid].ms, jrdid_ms); #endif > > > > > + jr_reset(); > > > > > > > > > > #ifdef CONFIG_FSL_CORENET > > > > > #ifdef CONFIG_SPL_BUILD > > > > > @@ -693,20 +723,19 @@ int sec_init_idx(uint8_t sec_idx) > > > > > liodn_ns = CONFIG_SPL_JR0_LIODN_NS & JRNSLIODN_MASK; > > > > > liodn_s = CONFIG_SPL_JR0_LIODN_S & JRSLIODN_MASK; > > > > > > > > > > - liodnr = sec_in32(&sec->jrliodnr[0].ls) & > > > > > + liodnr = sec_in32(&sec->jrliodnr[caam->jrid].ls) & > > > > > ~(JRNSLIODN_MASK | JRSLIODN_MASK); > > > > > liodnr = liodnr | > > > > > (liodn_ns << JRNSLIODN_SHIFT) | > > > > > (liodn_s << JRSLIODN_SHIFT); > > > > > - sec_out32(&sec->jrliodnr[0].ls, liodnr); > > > > > + sec_out32(&sec->jrliodnr[caam->jrid].ls, liodnr); > > > > > #else > > > > > - liodnr = sec_in32(&sec->jrliodnr[0].ls); > > > > > + liodnr = sec_in32(&sec->jrliodnr[caam->jrid].ls); > > > > > liodn_ns = (liodnr & JRNSLIODN_MASK) >> JRNSLIODN_SHIFT; > > > > > liodn_s = (liodnr & JRSLIODN_MASK) >> JRSLIODN_SHIFT; > > > > > #endif > > > > > #endif > > > > > - > > > > > - ret = jr_init(sec_idx); > > > > > + ret = jr_init(sec_idx, caam); > > > > > if (ret < 0) { > > > > > printf("SEC%u: initialization failed\n", sec_idx); > > > > > return -1; > > > > > @@ -719,9 +748,9 @@ int sec_init_idx(uint8_t sec_idx) > > > > > > > > > > pamu_enable(); > > > > > #endif > > > > > -#ifndef CONFIG_SPL_BUILD > > > > > - if (get_rng_vid(sec_idx) >= 4) { > > > > > - if (rng_init(sec_idx) < 0) { > > > > > + > > > > > + if (get_rng_vid(caam->sec) >= 4) { > > > > > + if (rng_init(sec_idx, caam->sec) < 0) { > > > > > printf("SEC%u: RNG instantiation failed\n", sec_idx); > > > > > return -1; > > > > > } > > > > > @@ -735,7 +764,6 @@ int sec_init_idx(uint8_t sec_idx) > > > > > > > > > > printf("SEC%u: RNG instantiated\n", sec_idx); > > > > > } > > > > > -#endif > > > > > return ret; > > > > > } > > > > > > > > > > @@ -743,3 +771,76 @@ int sec_init(void) > > > > > { > > > > > return sec_init_idx(0); > > > > > } > > > > > + > > > > > +#if CONFIG_IS_ENABLED(DM) > > > > > +static int caam_jr_ioctl(struct udevice *dev, unsigned long > > > > > +request, void *buf) { > > > > > + if (request != CAAM_JR_RUN_DESC) > > > > > + return -ENOSYS; > > > > > + > > > > > + return run_descriptor_jr(buf); } > > > > > + > > > > > +static int caam_jr_probe(struct udevice *dev) { > > > > > + struct caam_regs *caam = dev_get_priv(dev); > > > > > + fdt_addr_t addr; > > > > > + ofnode node; > > > > > + unsigned int jr_node = 0; > > > > > + > > > > > + caam_dev = dev; > > > > > + > > > > > + addr = dev_read_addr(dev); > > > > > + if (addr == FDT_ADDR_T_NONE) { > > > > > + printf("caam_jr: crypto not found\n"); > > > > > + return -EINVAL; > > > > > + } > > > > > + caam->sec = (ccsr_sec_t *)(uintptr_t)addr; > > > > > + caam->regs = (struct jr_regs *)caam->sec; > > > > > + > > > > > + /* Check for enabled job ring node */ > > > > > + ofnode_for_each_subnode(node, dev_ofnode(dev)) { > > > > > + if (!ofnode_is_available(node)) > > > > > + continue; > > > > > + > > > > > + jr_node = ofnode_read_u32_default(node, "reg", -1); > > > > > + if (jr_node > 0) { > > > > > + caam->regs = (struct jr_regs *)((ulong)caam->sec + jr_node); > > > > > + while (!(jr_node & 0x0F)) > > > > > + jr_node = jr_node >> 4; > > > > > + > > > > > + caam->jrid = jr_node - 1; > > > > > + break; > > > > > + } > > > > > + } > > > > > + > > > > > + if (sec_init()) > > > > > + printf("\nsec_init failed!\n"); > > > > > + > > > > > + return 0; > > > > > +} > > > > > + > > > > > +static int caam_jr_bind(struct udevice *dev) { > > > > > + return 0; > > > > > +} > > > > > + > > > > > +static const struct misc_ops caam_jr_ops = { > > > > > + .ioctl = caam_jr_ioctl, > > > > > +}; > > > > > + > > > > > +static const struct udevice_id caam_jr_match[] = { > > > > > + { .compatible = "fsl,sec-v4.0" }, > > > > > + { } > > > > > +}; > > > > > + > > > > > +U_BOOT_DRIVER(caam_jr) = { > > > > > + .name = "caam_jr", > > > > > + .id = UCLASS_MISC, > > > > > + .of_match = caam_jr_match, > > > > > + .ops = &caam_jr_ops, > > > > > + .bind = caam_jr_bind, > > > > > + .probe = caam_jr_probe, > > > > > + .priv_auto = sizeof(struct caam_regs), > > > > > +}; > > > > > +#endif > > > > > diff --git a/drivers/crypto/fsl/jr.h b/drivers/crypto/fsl/jr.h > > > > > index 1047aa772c..3eb7be79da 100644 > > > > > --- a/drivers/crypto/fsl/jr.h > > > > > +++ b/drivers/crypto/fsl/jr.h > > > > > @@ -1,6 +1,7 @@ > > > > > /* SPDX-License-Identifier: GPL-2.0+ */ > > > > > /* > > > > > * Copyright 2008-2014 Freescale Semiconductor, Inc. > > > > > + * Copyright 2021 NXP > > > > > * > > > > > */ > > > > > > > > > > @@ -8,7 +9,9 @@ > > > > > #define __JR_H > > > > > > > > > > #include <linux/compiler.h> > > > > > +#include "fsl_sec.h" > > > > > #include "type.h" > > > > > +#include <misc.h> > > > > > > > > > > #define JR_SIZE 4 > > > > > /* Timeout currently defined as 10 sec */ @@ -35,12 +38,21 @@ > > > > > #define JRSLIODN_SHIFT 0 > > > > > #define JRSLIODN_MASK 0x00000fff > > > > > > > > > > -#define JQ_DEQ_ERR -1 > > > > > -#define JQ_DEQ_TO_ERR -2 > > > > > -#define JQ_ENQ_ERR -3 > > > > > +#define JRDID_MS_PRIM_DID BIT(0) > > > > > +#define JRDID_MS_PRIM_TZ BIT(4) > > > > > +#define JRDID_MS_TZ_OWN BIT(15) > > > > > + > > > > > +#define JQ_DEQ_ERR (-1) > > > > > +#define JQ_DEQ_TO_ERR (-2) > > > > > +#define JQ_ENQ_ERR (-3) > > > > > > > > > > #define RNG4_MAX_HANDLES 2 > > > > > > > > > > +enum { > > > > > + /* Run caam jobring descriptor(in buf) */ > > > > > + CAAM_JR_RUN_DESC, > > > > > +}; > > > > > + > > > > > struct op_ring { > > > > > caam_dma_addr_t desc; > > > > > uint32_t status; > > > > > @@ -102,6 +114,19 @@ struct result { > > > > > uint32_t status; > > > > > }; > > > > > > > > > > +/* > > > > > + * struct caam_regs - CAAM initialization register interface > > > > > + * > > > > > + * Interface to caam memory map, jobring register, jobring storage. > > > > > + */ > > > > > +struct caam_regs { > > > > > + ccsr_sec_t *sec; /*caam initialization registers*/ > > > > > + struct jr_regs *regs; /*jobring configuration registers*/ > > > > > + u8 jrid; /*id to identify a jobring*/ > > > > > + /*Private sub-storage for a single JobR*/ > > > > > + struct jobring jr[CONFIG_SYS_FSL_MAX_NUM_OF_SEC]; > > > > > +}; > > > > > + > > > > > void caam_jr_strstatus(u32 status); > > > > > int run_descriptor_jr(uint32_t *desc); > > > > > > > > > > > > > -- > > > > > > > > > > ================================================================= > > > > ==== > > > > DENX Software Engineering GmbH, Managing Director: Wolfgang Denk > > > > HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, > > > > Germany > > > > Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: > > > > sbabic@denx.de > > > > > > > > > > ================================================================= > > > > ====
On 03.03.22 13:44, Gaurav Jain wrote: > Hello Stefano > > A gentle reminder!! > Need your help to check the proposed solution to fix imx6dl_mamoj SPL size issue shared in last mail. Ouch...is there a solution ? I confess I have not seen, is there an answer by Marek ? Regards, Stefano > > Regards > Gaurav Jain > >> -----Original Message----- >> From: Gaurav Jain >> Sent: Friday, February 25, 2022 12:33 PM >> To: Stefano Babic <sbabic@denx.de>; u-boot@lists.denx.de; Marek Vasut >> <marex@denx.de> >> Cc: Fabio Estevam <festevam@gmail.com>; Peng Fan <peng.fan@nxp.com>; >> Simon Glass <sjg@chromium.org>; Priyanka Jain <priyanka.jain@nxp.com>; Ye >> Li <ye.li@nxp.com>; Horia Geanta <horia.geanta@nxp.com>; Ji Luo >> <ji.luo@nxp.com>; Franck Lenormand <franck.lenormand@nxp.com>; Silvano Di >> Ninno <silvano.dininno@nxp.com>; Sahil Malhotra <sahil.malhotra@nxp.com>; >> Pankaj Gupta <pankaj.gupta@nxp.com>; Varun Sethi <V.Sethi@nxp.com>; dl- >> uboot-imx <uboot-imx@nxp.com>; Shengzhou Liu <shengzhou.liu@nxp.com>; >> Mingkai Hu <mingkai.hu@nxp.com>; Rajesh Bhagat <rajesh.bhagat@nxp.com>; >> Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>; Wasim Khan >> <wasim.khan@nxp.com>; Alison Wang <alison.wang@nxp.com>; Pramod >> Kumar <pramod.kumar_1@nxp.com>; Andy Tang <andy.tang@nxp.com>; >> Adrian Alonso <adrian.alonso@nxp.com>; Vladimir Oltean <olteanv@gmail.com> >> Subject: RE: [EXT] Re: [PATCH v8 01/15] crypto/fsl: Add support for CAAM Job >> ring driver model >> >> Hello Stefano >> >>> -----Original Message----- >>> From: Gaurav Jain >>> Sent: Friday, February 11, 2022 3:09 PM >>> To: Stefano Babic <sbabic@denx.de>; u-boot@lists.denx.de; Marek Vasut >>> <marex@denx.de> >>> Cc: Fabio Estevam <festevam@gmail.com>; Peng Fan <peng.fan@nxp.com>; >>> Simon Glass <sjg@chromium.org>; Priyanka Jain <priyanka.jain@nxp.com>; >>> Ye Li <ye.li@nxp.com>; Horia Geanta <horia.geanta@nxp.com>; Ji Luo >>> <ji.luo@nxp.com>; Franck Lenormand <franck.lenormand@nxp.com>; Silvano >>> Di Ninno <silvano.dininno@nxp.com>; Sahil Malhotra >>> <sahil.malhotra@nxp.com>; Pankaj Gupta <pankaj.gupta@nxp.com>; Varun >>> Sethi <V.Sethi@nxp.com>; dl- uboot-imx <uboot-imx@nxp.com>; Shengzhou >>> Liu <shengzhou.liu@nxp.com>; Mingkai Hu <mingkai.hu@nxp.com>; Rajesh >>> Bhagat <rajesh.bhagat@nxp.com>; Meenakshi Aggarwal >>> <meenakshi.aggarwal@nxp.com>; Wasim Khan <wasim.khan@nxp.com>; >> Alison >>> Wang <alison.wang@nxp.com>; Pramod Kumar >> <pramod.kumar_1@nxp.com>; >>> Andy Tang <andy.tang@nxp.com>; Adrian Alonso <adrian.alonso@nxp.com>; >>> Vladimir Oltean <olteanv@gmail.com> >>> Subject: RE: [EXT] Re: [PATCH v8 01/15] crypto/fsl: Add support for >>> CAAM Job ring driver model >>> >>> Hello Marek >>> >>> A gentle reminder!! >>> Please help to check if some feature can be dropped in SPL from >>> imx6dl_mamoj board so that CAAM driver model patches can be accepted. >>> >>> Regards >>> Gaurav Jain >>> >>>> -----Original Message----- >>>> From: Gaurav Jain >>>> Sent: Monday, February 7, 2022 12:43 PM >>>> To: Stefano Babic <sbabic@denx.de>; u-boot@lists.denx.de; Marek >>>> Vasut <marex@denx.de> >>>> Cc: Fabio Estevam <festevam@gmail.com>; Peng Fan <peng.fan@nxp.com>; >>>> Simon Glass <sjg@chromium.org>; Priyanka Jain >>>> <priyanka.jain@nxp.com>; Ye Li <ye.li@nxp.com>; Horia Geanta >>>> <horia.geanta@nxp.com>; Ji Luo <ji.luo@nxp.com>; Franck Lenormand >>>> <franck.lenormand@nxp.com>; Silvano Di Ninno >>>> <silvano.dininno@nxp.com>; Sahil Malhotra <sahil.malhotra@nxp.com>; >>>> Pankaj Gupta <pankaj.gupta@nxp.com>; Varun Sethi <V.Sethi@nxp.com>; >>>> dl- uboot-imx <uboot-imx@nxp.com>; Shengzhou Liu >>>> <shengzhou.liu@nxp.com>; Mingkai Hu <mingkai.hu@nxp.com>; Rajesh >>>> Bhagat <rajesh.bhagat@nxp.com>; Meenakshi Aggarwal >>>> <meenakshi.aggarwal@nxp.com>; Wasim Khan <wasim.khan@nxp.com>; >>> Alison >>>> Wang <alison.wang@nxp.com>; Pramod Kumar >>> <pramod.kumar_1@nxp.com>; >>>> Andy Tang <andy.tang@nxp.com>; Adrian Alonso >>>> <adrian.alonso@nxp.com>; Vladimir Oltean <olteanv@gmail.com> >>>> Subject: RE: [EXT] Re: [PATCH v8 01/15] crypto/fsl: Add support for >>>> CAAM Job ring driver model >>>> >>>> Hello Marek >>>> >>>>> -----Original Message----- >>>>> From: Stefano Babic <sbabic@denx.de> >>>>> Sent: Saturday, February 5, 2022 7:46 PM >>>>> To: Gaurav Jain <gaurav.jain@nxp.com>; u-boot@lists.denx.de >>>>> Cc: Stefano Babic <sbabic@denx.de>; Fabio Estevam >>>>> <festevam@gmail.com>; Peng Fan <peng.fan@nxp.com>; Simon Glass >>>>> <sjg@chromium.org>; Priyanka Jain <priyanka.jain@nxp.com>; Ye Li >>>>> <ye.li@nxp.com>; Horia Geanta <horia.geanta@nxp.com>; Ji Luo >>>>> <ji.luo@nxp.com>; Franck Lenormand <franck.lenormand@nxp.com>; >>>>> Silvano Di Ninno <silvano.dininno@nxp.com>; Sahil Malhotra >>>>> <sahil.malhotra@nxp.com>; Pankaj Gupta <pankaj.gupta@nxp.com>; >>>>> Varun Sethi <V.Sethi@nxp.com>; dl-uboot-imx <uboot-imx@nxp.com>; >>>>> Shengzhou Liu <shengzhou.liu@nxp.com>; Mingkai Hu >>>>> <mingkai.hu@nxp.com>; Rajesh Bhagat <rajesh.bhagat@nxp.com>; >>>>> Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>; Wasim Khan >>>>> <wasim.khan@nxp.com>; >>>> Alison >>>>> Wang <alison.wang@nxp.com>; Pramod Kumar >>>> <pramod.kumar_1@nxp.com>; >>>>> Andy Tang <andy.tang@nxp.com>; Adrian Alonso >>>>> <adrian.alonso@nxp.com>; Vladimir Oltean <olteanv@gmail.com>; >>>>> Marek Vasut <marex@denx.de> >>>>> Subject: [EXT] Re: [PATCH v8 01/15] crypto/fsl: Add support for >>>>> CAAM Job ring driver model >>>>> >>>>> Caution: EXT Email >>>>> >>>>> Hi Gaurav, >>>>> >>>>> rather I still have issues to run CI with this applied. The reason >>>>> is that this adds an overhead to SPL and it breaks the board >>>>> imx6dl_mamoj because SPL exceeds the maximum size for a DL SOC. >>>>> >>>>> See >>>>> https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2F >>>>> so >>>>> ur >>>>> ce.d >>>>> enx.de%2Fu-boot%2Fcustodians%2Fu-boot-imx%2F- >>>>> %2Fjobs%2F387370&data=04%7C01%7Cgaurav.jain%40nxp.com%7C >> 3a >>> 2 >>>> 73 >>>>> >>>> >>> >> 1dd27fc4bebcad308d9e8b21464%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C >>>>> >>>> >>> >> 0%7C0%7C637796673834942697%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4 >>>>> >>>> >>> >> wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000&am >>>>> >>>> >>> >> p;sdata=pI%2F%2FlNtrdrGCa8sSvcr6uNu4jze7pzDqZtI52FIDj50%3D&reserve >>>>> d=0 >>>>> >>>>> I do not know if it is possible to drop some features from SPL for >>>>> this board (Added Marek as board maintainer). >> >> As we have not received any response from imx6dl_mamoj board maintainer. >> I propose the below solution >> >> --- a/arch/arm/mach-imx/Kconfig >> +++ b/arch/arm/mach-imx/Kconfig >> @@ -49,8 +49,8 @@ config USE_IMXIMG_PLUGIN config IMX_HAB >> - select FSL_CAAM if HAS_CAAM >> - imply CMD_DEKBLOB if HAS_CAAM >> + imply FSL_CAAM if HAS_CAAM >> + imply CMD_DEKBLOB if FSL_CAAM >> Help >> >> --- a/configs/imx6dl_mamoj_defconfig >> +++ b/configs/imx6dl_mamoj_defconfig >> @@ -59,3 +59,4 @@ CONFIG_USB_GADGET_MANUFACTURER="FSL" >> +CONFIG_FSL_CAAM=n >> >> Need your help to review this or suggest any other solution. >> >> Regards >> Gaurav Jain >> >>>> >>>> CONFIG_IMX_HAB is enabled for imx6dl_mamoj. So CAAM is built for >>>> SPL, results in increased size. >>>> However CAAM is not initialized in SPL. As Stefano suggested, Can >>>> you drop some features from SPL? >>>> >>>> Regards >>>> Gaurav Jain >>>>> >>>>> Best regards, >>>>> Stefano >>>>> >>>>> On 10.01.22 13:27, Gaurav Jain wrote: >>>>>> added device tree support for job ring driver. >>>>>> sec is initialized based on job ring information processed from >>>>>> device tree. >>>>>> >>>>>> Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com> >>>>>> Reviewed-by: Ye Li <ye.li@nxp.com> >>>>>> --- >>>>>> drivers/crypto/fsl/jr.c | 323 ++++++++++++++++++++++++++-------------- >>>>>> drivers/crypto/fsl/jr.h | 31 +++- >>>>>> 2 files changed, 240 insertions(+), 114 deletions(-) >>>>>> >>>>>> diff --git a/drivers/crypto/fsl/jr.c b/drivers/crypto/fsl/jr.c >>>>>> index >>>>>> 22b649219e..8103987425 100644 >>>>>> --- a/drivers/crypto/fsl/jr.c >>>>>> +++ b/drivers/crypto/fsl/jr.c >>>>>> @@ -1,7 +1,7 @@ >>>>>> // SPDX-License-Identifier: GPL-2.0+ >>>>>> /* >>>>>> * Copyright 2008-2014 Freescale Semiconductor, Inc. >>>>>> - * Copyright 2018 NXP >>>>>> + * Copyright 2018, 2021 NXP >>>>>> * >>>>>> * Based on CAAM driver in drivers/crypto/caam in Linux >>>>>> */ >>>>>> @@ -11,7 +11,6 @@ >>>>>> #include <linux/kernel.h> >>>>>> #include <log.h> >>>>>> #include <malloc.h> >>>>>> -#include "fsl_sec.h" >>>>>> #include "jr.h" >>>>>> #include "jobdesc.h" >>>>>> #include "desc_constr.h" >>>>>> @@ -21,7 +20,10 @@ >>>>>> #include <asm/cache.h> >>>>>> #include <asm/fsl_pamu.h> >>>>>> #endif >>>>>> +#include <dm.h> >>>>>> #include <dm/lists.h> >>>>>> +#include <dm/root.h> >>>>>> +#include <dm/device-internal.h> >>>>>> #include <linux/delay.h> >>>>>> >>>>>> #define CIRC_CNT(head, tail, size) (((head) - (tail)) & (size >>>>>> - >>>>>> 1)) @@ -35,20 +37,29 @@ uint32_t >>>>> sec_offset[CONFIG_SYS_FSL_MAX_NUM_OF_SEC] = { >>>>>> #endif >>>>>> }; >>>>>> >>>>>> +#if CONFIG_IS_ENABLED(DM) >>>>>> +struct udevice *caam_dev; >>>>>> +#else >>>>>> #define SEC_ADDR(idx) \ >>>>>> (ulong)((CONFIG_SYS_FSL_SEC_ADDR + sec_offset[idx])) >>>>>> >>>>>> #define SEC_JR0_ADDR(idx) \ >>>>>> (ulong)(SEC_ADDR(idx) + \ >>>>>> (CONFIG_SYS_FSL_JR0_OFFSET - CONFIG_SYS_FSL_SEC_OFFSET)) >>>>>> +struct caam_regs caam_st; >>>>>> +#endif >>>>>> >>>>>> -struct jobring jr0[CONFIG_SYS_FSL_MAX_NUM_OF_SEC]; >>>>>> +static inline u32 jr_start_reg(u8 jrid) { >>>>>> + return (1 << jrid); >>>>>> +} >>>>>> >>>>>> -static inline void start_jr0(uint8_t sec_idx) >>>>>> +static inline void start_jr(struct caam_regs *caam) >>>>>> { >>>>>> - ccsr_sec_t *sec = (void *)SEC_ADDR(sec_idx); >>>>>> + ccsr_sec_t *sec = caam->sec; >>>>>> u32 ctpr_ms = sec_in32(&sec->ctpr_ms); >>>>>> u32 scfgr = sec_in32(&sec->scfgr); >>>>>> + u32 jrstart = jr_start_reg(caam->jrid); >>>>>> >>>>>> if (ctpr_ms & SEC_CTPR_MS_VIRT_EN_INCL) { >>>>>> /* VIRT_EN_INCL = 1 & VIRT_EN_POR = 1 or @@ -56,23 >>>>>> +67,16 @@ static inline void start_jr0(uint8_t sec_idx) >>>>>> */ >>>>>> if ((ctpr_ms & SEC_CTPR_MS_VIRT_EN_POR) || >>>>>> (scfgr & SEC_SCFGR_VIRT_EN)) >>>>>> - sec_out32(&sec->jrstartr, CONFIG_JRSTARTR_JR0); >>>>>> + sec_out32(&sec->jrstartr, jrstart); >>>>>> } else { >>>>>> /* VIRT_EN_INCL = 0 && VIRT_EN_POR_VALUE = 1 */ >>>>>> if (ctpr_ms & SEC_CTPR_MS_VIRT_EN_POR) >>>>>> - sec_out32(&sec->jrstartr, CONFIG_JRSTARTR_JR0); >>>>>> + sec_out32(&sec->jrstartr, jrstart); >>>>>> } >>>>>> } >>>>>> >>>>>> -static inline void jr_reset_liodn(uint8_t sec_idx) >>>>>> +static inline void jr_disable_irq(struct jr_regs *regs) >>>>>> { >>>>>> - ccsr_sec_t *sec = (void *)SEC_ADDR(sec_idx); >>>>>> - sec_out32(&sec->jrliodnr[0].ls, 0); >>>>>> -} >>>>>> - >>>>>> -static inline void jr_disable_irq(uint8_t sec_idx) -{ >>>>>> - struct jr_regs *regs = (struct jr_regs *)SEC_JR0_ADDR(sec_idx); >>>>>> uint32_t jrcfg = sec_in32(®s->jrcfg1); >>>>>> >>>>>> jrcfg = jrcfg | JR_INTMASK; @@ -80,10 +84,10 @@ static >>>>>> inline void jr_disable_irq(uint8_t sec_idx) >>>>>> sec_out32(®s->jrcfg1, jrcfg); >>>>>> } >>>>>> >>>>>> -static void jr_initregs(uint8_t sec_idx) >>>>>> +static void jr_initregs(uint8_t sec_idx, struct caam_regs >>>>>> +*caam) >>>>>> { >>>>>> - struct jr_regs *regs = (struct jr_regs *)SEC_JR0_ADDR(sec_idx); >>>>>> - struct jobring *jr = &jr0[sec_idx]; >>>>>> + struct jr_regs *regs = caam->regs; >>>>>> + struct jobring *jr = &caam->jr[sec_idx]; >>>>>> caam_dma_addr_t ip_base = virt_to_phys((void *)jr->input_ring); >>>>>> caam_dma_addr_t op_base = virt_to_phys((void >>>>>> *)jr->output_ring); >>>>>> >>>>>> @@ -103,16 +107,16 @@ static void jr_initregs(uint8_t sec_idx) >>>>>> sec_out32(®s->irs, JR_SIZE); >>>>>> >>>>>> if (!jr->irq) >>>>>> - jr_disable_irq(sec_idx); >>>>>> + jr_disable_irq(regs); >>>>>> } >>>>>> >>>>>> -static int jr_init(uint8_t sec_idx) >>>>>> +static int jr_init(uint8_t sec_idx, struct caam_regs *caam) >>>>>> { >>>>>> - struct jobring *jr = &jr0[sec_idx]; >>>>>> + struct jobring *jr = &caam->jr[sec_idx]; >>>>>> >>>>>> memset(jr, 0, sizeof(struct jobring)); >>>>>> >>>>>> - jr->jq_id = DEFAULT_JR_ID; >>>>>> + jr->jq_id = caam->jrid; >>>>>> jr->irq = DEFAULT_IRQ; >>>>>> >>>>>> #ifdef CONFIG_FSL_CORENET >>>>>> @@ -134,53 +138,8 @@ static int jr_init(uint8_t sec_idx) >>>>>> memset(jr->input_ring, 0, JR_SIZE * sizeof(caam_dma_addr_t)); >>>>>> memset(jr->output_ring, 0, jr->op_size); >>>>>> >>>>>> - start_jr0(sec_idx); >>>>>> - >>>>>> - jr_initregs(sec_idx); >>>>>> - >>>>>> - return 0; >>>>>> -} >>>>>> - >>>>>> -static int jr_sw_cleanup(uint8_t sec_idx) -{ >>>>>> - struct jobring *jr = &jr0[sec_idx]; >>>>>> - >>>>>> - jr->head = 0; >>>>>> - jr->tail = 0; >>>>>> - jr->read_idx = 0; >>>>>> - jr->write_idx = 0; >>>>>> - memset(jr->info, 0, sizeof(jr->info)); >>>>>> - memset(jr->input_ring, 0, jr->size * sizeof(caam_dma_addr_t)); >>>>>> - memset(jr->output_ring, 0, jr->size * sizeof(struct op_ring)); >>>>>> - >>>>>> - return 0; >>>>>> -} >>>>>> - >>>>>> -static int jr_hw_reset(uint8_t sec_idx) -{ >>>>>> - struct jr_regs *regs = (struct jr_regs *)SEC_JR0_ADDR(sec_idx); >>>>>> - uint32_t timeout = 100000; >>>>>> - uint32_t jrint, jrcr; >>>>>> - >>>>>> - sec_out32(®s->jrcr, JRCR_RESET); >>>>>> - do { >>>>>> - jrint = sec_in32(®s->jrint); >>>>>> - } while (((jrint & JRINT_ERR_HALT_MASK) == >>>>>> - JRINT_ERR_HALT_INPROGRESS) && --timeout); >>>>>> - >>>>>> - jrint = sec_in32(®s->jrint); >>>>>> - if (((jrint & JRINT_ERR_HALT_MASK) != >>>>>> - JRINT_ERR_HALT_INPROGRESS) && timeout == 0) >>>>>> - return -1; >>>>>> - >>>>>> - timeout = 100000; >>>>>> - sec_out32(®s->jrcr, JRCR_RESET); >>>>>> - do { >>>>>> - jrcr = sec_in32(®s->jrcr); >>>>>> - } while ((jrcr & JRCR_RESET) && --timeout); >>>>>> - >>>>>> - if (timeout == 0) >>>>>> - return -1; >>>>>> + start_jr(caam); >>>>>> + jr_initregs(sec_idx, caam); >>>>>> >>>>>> return 0; >>>>>> } >>>>>> @@ -188,10 +147,10 @@ static int jr_hw_reset(uint8_t sec_idx) >>>>>> /* -1 --- error, can't enqueue -- no space available */ >>>>>> static int jr_enqueue(uint32_t *desc_addr, >>>>>> void (*callback)(uint32_t status, void *arg), >>>>>> - void *arg, uint8_t sec_idx) >>>>>> + void *arg, uint8_t sec_idx, struct caam_regs *caam) >>>>>> { >>>>>> - struct jr_regs *regs = (struct jr_regs *)SEC_JR0_ADDR(sec_idx); >>>>>> - struct jobring *jr = &jr0[sec_idx]; >>>>>> + struct jr_regs *regs = caam->regs; >>>>>> + struct jobring *jr = &caam->jr[sec_idx]; >>>>>> int head = jr->head; >>>>>> uint32_t desc_word; >>>>>> int length = desc_len(desc_addr); @@ -263,10 +222,10 @@ >>>>>> static int jr_enqueue(uint32_t *desc_addr, >>>>>> return 0; >>>>>> } >>>>>> >>>>>> -static int jr_dequeue(int sec_idx) >>>>>> +static int jr_dequeue(int sec_idx, struct caam_regs *caam) >>>>>> { >>>>>> - struct jr_regs *regs = (struct jr_regs *)SEC_JR0_ADDR(sec_idx); >>>>>> - struct jobring *jr = &jr0[sec_idx]; >>>>>> + struct jr_regs *regs = caam->regs; >>>>>> + struct jobring *jr = &caam->jr[sec_idx]; >>>>>> int head = jr->head; >>>>>> int tail = jr->tail; >>>>>> int idx, i, found; >>>>>> @@ -349,14 +308,18 @@ static void desc_done(uint32_t status, void >> *arg) >>>>>> { >>>>>> struct result *x = arg; >>>>>> x->status = status; >>>>>> -#ifndef CONFIG_SPL_BUILD >>>>>> caam_jr_strstatus(status); -#endif >>>>>> x->done = 1; >>>>>> } >>>>>> >>>>>> static inline int run_descriptor_jr_idx(uint32_t *desc, uint8_t sec_idx) >>>>>> { >>>>>> + struct caam_regs *caam; >>>>>> +#if CONFIG_IS_ENABLED(DM) >>>>>> + caam = dev_get_priv(caam_dev); #else >>>>>> + caam = &caam_st; >>>>>> +#endif >>>>>> unsigned long long timeval = 0; >>>>>> unsigned long long timeout = CONFIG_USEC_DEQ_TIMEOUT; >>>>>> struct result op; >>>>>> @@ -364,7 +327,7 @@ static inline int >>>>>> run_descriptor_jr_idx(uint32_t *desc, uint8_t sec_idx) >>>>>> >>>>>> memset(&op, 0, sizeof(op)); >>>>>> >>>>>> - ret = jr_enqueue(desc, desc_done, &op, sec_idx); >>>>>> + ret = jr_enqueue(desc, desc_done, &op, sec_idx, caam); >>>>>> if (ret) { >>>>>> debug("Error in SEC enq\n"); >>>>>> ret = JQ_ENQ_ERR; >>>>>> @@ -375,7 +338,7 @@ static inline int >>>>>> run_descriptor_jr_idx(uint32_t *desc, >>>>> uint8_t sec_idx) >>>>>> udelay(1); >>>>>> timeval += 1; >>>>>> >>>>>> - ret = jr_dequeue(sec_idx); >>>>>> + ret = jr_dequeue(sec_idx, caam); >>>>>> if (ret) { >>>>>> debug("Error in SEC deq\n"); >>>>>> ret = JQ_DEQ_ERR; @@ -402,13 +365,62 @@ >>>>>> int run_descriptor_jr(uint32_t *desc) >>>>>> return run_descriptor_jr_idx(desc, 0); >>>>>> } >>>>>> >>>>>> +static int jr_sw_cleanup(uint8_t sec_idx, struct caam_regs *caam) { >>>>>> + struct jobring *jr = &caam->jr[sec_idx]; >>>>>> + >>>>>> + jr->head = 0; >>>>>> + jr->tail = 0; >>>>>> + jr->read_idx = 0; >>>>>> + jr->write_idx = 0; >>>>>> + memset(jr->info, 0, sizeof(jr->info)); >>>>>> + memset(jr->input_ring, 0, jr->size * sizeof(caam_dma_addr_t)); >>>>>> + memset(jr->output_ring, 0, jr->size * sizeof(struct >>>>>> + op_ring)); >>>>>> + >>>>>> + return 0; >>>>>> +} >>>>>> + >>>>>> +static int jr_hw_reset(struct jr_regs *regs) { >>>>>> + uint32_t timeout = 100000; >>>>>> + uint32_t jrint, jrcr; >>>>>> + >>>>>> + sec_out32(®s->jrcr, JRCR_RESET); >>>>>> + do { >>>>>> + jrint = sec_in32(®s->jrint); >>>>>> + } while (((jrint & JRINT_ERR_HALT_MASK) == >>>>>> + JRINT_ERR_HALT_INPROGRESS) && --timeout); >>>>>> + >>>>>> + jrint = sec_in32(®s->jrint); >>>>>> + if (((jrint & JRINT_ERR_HALT_MASK) != >>>>>> + JRINT_ERR_HALT_INPROGRESS) && timeout == 0) >>>>>> + return -1; >>>>>> + >>>>>> + timeout = 100000; >>>>>> + sec_out32(®s->jrcr, JRCR_RESET); >>>>>> + do { >>>>>> + jrcr = sec_in32(®s->jrcr); >>>>>> + } while ((jrcr & JRCR_RESET) && --timeout); >>>>>> + >>>>>> + if (timeout == 0) >>>>>> + return -1; >>>>>> + >>>>>> + return 0; >>>>>> +} >>>>>> + >>>>>> static inline int jr_reset_sec(uint8_t sec_idx) >>>>>> { >>>>>> - if (jr_hw_reset(sec_idx) < 0) >>>>>> + struct caam_regs *caam; >>>>>> +#if CONFIG_IS_ENABLED(DM) >>>>>> + caam = dev_get_priv(caam_dev); #else >>>>>> + caam = &caam_st; >>>>>> +#endif >>>>>> + if (jr_hw_reset(caam->regs) < 0) >>>>>> return -1; >>>>>> >>>>>> /* Clean up the jobring structure maintained by software */ >>>>>> - jr_sw_cleanup(sec_idx); >>>>>> + jr_sw_cleanup(sec_idx, caam); >>>>>> >>>>>> return 0; >>>>>> } >>>>>> @@ -418,9 +430,15 @@ int jr_reset(void) >>>>>> return jr_reset_sec(0); >>>>>> } >>>>>> >>>>>> -static inline int sec_reset_idx(uint8_t sec_idx) >>>>>> +int sec_reset(void) >>>>>> { >>>>>> - ccsr_sec_t *sec = (void *)SEC_ADDR(sec_idx); >>>>>> + struct caam_regs *caam; >>>>>> +#if CONFIG_IS_ENABLED(DM) >>>>>> + caam = dev_get_priv(caam_dev); #else >>>>>> + caam = &caam_st; >>>>>> +#endif >>>>>> + ccsr_sec_t *sec = caam->sec; >>>>>> uint32_t mcfgr = sec_in32(&sec->mcfgr); >>>>>> uint32_t timeout = 100000; >>>>>> >>>>>> @@ -446,11 +464,7 @@ static inline int sec_reset_idx(uint8_t >>>>>> sec_idx) >>>>>> >>>>>> return 0; >>>>>> } >>>>>> -int sec_reset(void) >>>>>> -{ >>>>>> - return sec_reset_idx(0); >>>>>> -} >>>>>> -#ifndef CONFIG_SPL_BUILD >>>>>> + >>>>>> static int deinstantiate_rng(u8 sec_idx, int state_handle_mask) >>>>>> { >>>>>> u32 *desc; >>>>>> @@ -496,12 +510,11 @@ static int deinstantiate_rng(u8 sec_idx, >>>>>> int >>>>> state_handle_mask) >>>>>> return ret; >>>>>> } >>>>>> >>>>>> -static int instantiate_rng(u8 sec_idx, int gen_sk) >>>>>> +static int instantiate_rng(uint8_t sec_idx, ccsr_sec_t *sec, >>>>>> +int >>>>>> +gen_sk) >>>>>> { >>>>>> u32 *desc; >>>>>> u32 rdsta_val; >>>>>> int ret = 0, sh_idx, size; >>>>>> - ccsr_sec_t __iomem *sec = (ccsr_sec_t __iomem >> *)SEC_ADDR(sec_idx); >>>>>> struct rng4tst __iomem *rng = >>>>>> (struct rng4tst __iomem *)&sec->rng; >>>>>> >>>>>> @@ -554,9 +567,8 @@ static int instantiate_rng(u8 sec_idx, int gen_sk) >>>>>> return ret; >>>>>> } >>>>>> >>>>>> -static u8 get_rng_vid(uint8_t sec_idx) >>>>>> +static u8 get_rng_vid(ccsr_sec_t *sec) >>>>>> { >>>>>> - ccsr_sec_t *sec = (void *)SEC_ADDR(sec_idx); >>>>>> u8 vid; >>>>>> >>>>>> if (caam_get_era() < 10) { @@ -574,9 +586,8 @@ static u8 >>>>>> get_rng_vid(uint8_t sec_idx) >>>>>> * By default, the TRNG runs for 200 clocks per sample; >>>>>> * 1200 clocks per sample generates better entropy. >>>>>> */ >>>>>> -static void kick_trng(int ent_delay, uint8_t sec_idx) >>>>>> +static void kick_trng(int ent_delay, ccsr_sec_t *sec) >>>>>> { >>>>>> - ccsr_sec_t __iomem *sec = (ccsr_sec_t __iomem >> *)SEC_ADDR(sec_idx); >>>>>> struct rng4tst __iomem *rng = >>>>>> (struct rng4tst __iomem *)&sec->rng; >>>>>> u32 val; >>>>>> @@ -603,10 +614,9 @@ static void kick_trng(int ent_delay, >>>>>> uint8_t >>> sec_idx) >>>>>> sec_clrbits32(&rng->rtmctl, RTMCTL_PRGM); >>>>>> } >>>>>> >>>>>> -static int rng_init(uint8_t sec_idx) >>>>>> +static int rng_init(uint8_t sec_idx, ccsr_sec_t *sec) >>>>>> { >>>>>> int ret, gen_sk, ent_delay = RTSDCTL_ENT_DLY_MIN; >>>>>> - ccsr_sec_t __iomem *sec = (ccsr_sec_t __iomem >> *)SEC_ADDR(sec_idx); >>>>>> struct rng4tst __iomem *rng = >>>>>> (struct rng4tst __iomem *)&sec->rng; >>>>>> u32 inst_handles; >>>>>> @@ -624,7 +634,7 @@ static int rng_init(uint8_t sec_idx) >>>>>> * the TRNG parameters. >>>>>> */ >>>>>> if (!inst_handles) { >>>>>> - kick_trng(ent_delay, sec_idx); >>>>>> + kick_trng(ent_delay, sec); >>>>>> ent_delay += 400; >>>>>> } >>>>>> /* >>>>>> @@ -634,7 +644,7 @@ static int rng_init(uint8_t sec_idx) >>>>>> * interval, leading to a sucessful initialization of >>>>>> * the RNG. >>>>>> */ >>>>>> - ret = instantiate_rng(sec_idx, gen_sk); >>>>>> + ret = instantiate_rng(sec_idx, sec, gen_sk); >>>>>> } while ((ret == -1) && (ent_delay < RTSDCTL_ENT_DLY_MAX)); >>>>>> if (ret) { >>>>>> printf("SEC%u: Failed to instantiate RNG\n", >>>>>> sec_idx); @@ -646,13 +656,28 @@ static int rng_init(uint8_t >>>>>> sec_idx) >>>>>> >>>>>> return ret; >>>>>> } >>>>>> -#endif >>>>>> + >>>>>> int sec_init_idx(uint8_t sec_idx) >>>>>> { >>>>>> - ccsr_sec_t *sec = (void *)SEC_ADDR(sec_idx); >>>>>> - uint32_t mcr = sec_in32(&sec->mcfgr); >>>>>> int ret = 0; >>>>>> - >>>>>> + struct caam_regs *caam; >>>>>> +#if CONFIG_IS_ENABLED(DM) >>>>>> + if (!caam_dev) { >>>>>> + printf("caam_jr: caam not found\n"); >>>>>> + return -1; >>>>>> + } >>>>>> + caam = dev_get_priv(caam_dev); #else >>>>>> + caam_st.sec = (void *)SEC_ADDR(sec_idx); >>>>>> + caam_st.regs = (struct jr_regs *)SEC_JR0_ADDR(sec_idx); >>>>>> + caam_st.jrid = 0; >>>>>> + caam = &caam_st; >>>>>> +#endif >>>>>> + ccsr_sec_t *sec = caam->sec; >>>>>> + uint32_t mcr = sec_in32(&sec->mcfgr); #if >>>>>> +defined(CONFIG_SPL_BUILD) && defined(CONFIG_IMX8M) >>>>>> + uint32_t jrdid_ms = 0; >>>>>> +#endif >>>>>> #ifdef CONFIG_FSL_CORENET >>>>>> uint32_t liodnr; >>>>>> uint32_t liodn_ns; >>>>>> @@ -682,6 +707,11 @@ int sec_init_idx(uint8_t sec_idx) >>>>>> mcr |= (1 << MCFGR_PS_SHIFT); >>>>>> #endif >>>>>> sec_out32(&sec->mcfgr, mcr); >>>>>> +#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_IMX8M) >>>>>> + jrdid_ms = JRDID_MS_TZ_OWN | JRDID_MS_PRIM_TZ | >>>>> JRDID_MS_PRIM_DID; >>>>>> + sec_out32(&sec->jrliodnr[caam->jrid].ms, jrdid_ms); #endif >>>>>> + jr_reset(); >>>>>> >>>>>> #ifdef CONFIG_FSL_CORENET >>>>>> #ifdef CONFIG_SPL_BUILD >>>>>> @@ -693,20 +723,19 @@ int sec_init_idx(uint8_t sec_idx) >>>>>> liodn_ns = CONFIG_SPL_JR0_LIODN_NS & JRNSLIODN_MASK; >>>>>> liodn_s = CONFIG_SPL_JR0_LIODN_S & JRSLIODN_MASK; >>>>>> >>>>>> - liodnr = sec_in32(&sec->jrliodnr[0].ls) & >>>>>> + liodnr = sec_in32(&sec->jrliodnr[caam->jrid].ls) & >>>>>> ~(JRNSLIODN_MASK | JRSLIODN_MASK); >>>>>> liodnr = liodnr | >>>>>> (liodn_ns << JRNSLIODN_SHIFT) | >>>>>> (liodn_s << JRSLIODN_SHIFT); >>>>>> - sec_out32(&sec->jrliodnr[0].ls, liodnr); >>>>>> + sec_out32(&sec->jrliodnr[caam->jrid].ls, liodnr); >>>>>> #else >>>>>> - liodnr = sec_in32(&sec->jrliodnr[0].ls); >>>>>> + liodnr = sec_in32(&sec->jrliodnr[caam->jrid].ls); >>>>>> liodn_ns = (liodnr & JRNSLIODN_MASK) >> JRNSLIODN_SHIFT; >>>>>> liodn_s = (liodnr & JRSLIODN_MASK) >> JRSLIODN_SHIFT; >>>>>> #endif >>>>>> #endif >>>>>> - >>>>>> - ret = jr_init(sec_idx); >>>>>> + ret = jr_init(sec_idx, caam); >>>>>> if (ret < 0) { >>>>>> printf("SEC%u: initialization failed\n", sec_idx); >>>>>> return -1; >>>>>> @@ -719,9 +748,9 @@ int sec_init_idx(uint8_t sec_idx) >>>>>> >>>>>> pamu_enable(); >>>>>> #endif >>>>>> -#ifndef CONFIG_SPL_BUILD >>>>>> - if (get_rng_vid(sec_idx) >= 4) { >>>>>> - if (rng_init(sec_idx) < 0) { >>>>>> + >>>>>> + if (get_rng_vid(caam->sec) >= 4) { >>>>>> + if (rng_init(sec_idx, caam->sec) < 0) { >>>>>> printf("SEC%u: RNG instantiation failed\n", sec_idx); >>>>>> return -1; >>>>>> } >>>>>> @@ -735,7 +764,6 @@ int sec_init_idx(uint8_t sec_idx) >>>>>> >>>>>> printf("SEC%u: RNG instantiated\n", sec_idx); >>>>>> } >>>>>> -#endif >>>>>> return ret; >>>>>> } >>>>>> >>>>>> @@ -743,3 +771,76 @@ int sec_init(void) >>>>>> { >>>>>> return sec_init_idx(0); >>>>>> } >>>>>> + >>>>>> +#if CONFIG_IS_ENABLED(DM) >>>>>> +static int caam_jr_ioctl(struct udevice *dev, unsigned long >>>>>> +request, void *buf) { >>>>>> + if (request != CAAM_JR_RUN_DESC) >>>>>> + return -ENOSYS; >>>>>> + >>>>>> + return run_descriptor_jr(buf); } >>>>>> + >>>>>> +static int caam_jr_probe(struct udevice *dev) { >>>>>> + struct caam_regs *caam = dev_get_priv(dev); >>>>>> + fdt_addr_t addr; >>>>>> + ofnode node; >>>>>> + unsigned int jr_node = 0; >>>>>> + >>>>>> + caam_dev = dev; >>>>>> + >>>>>> + addr = dev_read_addr(dev); >>>>>> + if (addr == FDT_ADDR_T_NONE) { >>>>>> + printf("caam_jr: crypto not found\n"); >>>>>> + return -EINVAL; >>>>>> + } >>>>>> + caam->sec = (ccsr_sec_t *)(uintptr_t)addr; >>>>>> + caam->regs = (struct jr_regs *)caam->sec; >>>>>> + >>>>>> + /* Check for enabled job ring node */ >>>>>> + ofnode_for_each_subnode(node, dev_ofnode(dev)) { >>>>>> + if (!ofnode_is_available(node)) >>>>>> + continue; >>>>>> + >>>>>> + jr_node = ofnode_read_u32_default(node, "reg", -1); >>>>>> + if (jr_node > 0) { >>>>>> + caam->regs = (struct jr_regs *)((ulong)caam->sec + jr_node); >>>>>> + while (!(jr_node & 0x0F)) >>>>>> + jr_node = jr_node >> 4; >>>>>> + >>>>>> + caam->jrid = jr_node - 1; >>>>>> + break; >>>>>> + } >>>>>> + } >>>>>> + >>>>>> + if (sec_init()) >>>>>> + printf("\nsec_init failed!\n"); >>>>>> + >>>>>> + return 0; >>>>>> +} >>>>>> + >>>>>> +static int caam_jr_bind(struct udevice *dev) { >>>>>> + return 0; >>>>>> +} >>>>>> + >>>>>> +static const struct misc_ops caam_jr_ops = { >>>>>> + .ioctl = caam_jr_ioctl, >>>>>> +}; >>>>>> + >>>>>> +static const struct udevice_id caam_jr_match[] = { >>>>>> + { .compatible = "fsl,sec-v4.0" }, >>>>>> + { } >>>>>> +}; >>>>>> + >>>>>> +U_BOOT_DRIVER(caam_jr) = { >>>>>> + .name = "caam_jr", >>>>>> + .id = UCLASS_MISC, >>>>>> + .of_match = caam_jr_match, >>>>>> + .ops = &caam_jr_ops, >>>>>> + .bind = caam_jr_bind, >>>>>> + .probe = caam_jr_probe, >>>>>> + .priv_auto = sizeof(struct caam_regs), >>>>>> +}; >>>>>> +#endif >>>>>> diff --git a/drivers/crypto/fsl/jr.h b/drivers/crypto/fsl/jr.h >>>>>> index 1047aa772c..3eb7be79da 100644 >>>>>> --- a/drivers/crypto/fsl/jr.h >>>>>> +++ b/drivers/crypto/fsl/jr.h >>>>>> @@ -1,6 +1,7 @@ >>>>>> /* SPDX-License-Identifier: GPL-2.0+ */ >>>>>> /* >>>>>> * Copyright 2008-2014 Freescale Semiconductor, Inc. >>>>>> + * Copyright 2021 NXP >>>>>> * >>>>>> */ >>>>>> >>>>>> @@ -8,7 +9,9 @@ >>>>>> #define __JR_H >>>>>> >>>>>> #include <linux/compiler.h> >>>>>> +#include "fsl_sec.h" >>>>>> #include "type.h" >>>>>> +#include <misc.h> >>>>>> >>>>>> #define JR_SIZE 4 >>>>>> /* Timeout currently defined as 10 sec */ @@ -35,12 +38,21 @@ >>>>>> #define JRSLIODN_SHIFT 0 >>>>>> #define JRSLIODN_MASK 0x00000fff >>>>>> >>>>>> -#define JQ_DEQ_ERR -1 >>>>>> -#define JQ_DEQ_TO_ERR -2 >>>>>> -#define JQ_ENQ_ERR -3 >>>>>> +#define JRDID_MS_PRIM_DID BIT(0) >>>>>> +#define JRDID_MS_PRIM_TZ BIT(4) >>>>>> +#define JRDID_MS_TZ_OWN BIT(15) >>>>>> + >>>>>> +#define JQ_DEQ_ERR (-1) >>>>>> +#define JQ_DEQ_TO_ERR (-2) >>>>>> +#define JQ_ENQ_ERR (-3) >>>>>> >>>>>> #define RNG4_MAX_HANDLES 2 >>>>>> >>>>>> +enum { >>>>>> + /* Run caam jobring descriptor(in buf) */ >>>>>> + CAAM_JR_RUN_DESC, >>>>>> +}; >>>>>> + >>>>>> struct op_ring { >>>>>> caam_dma_addr_t desc; >>>>>> uint32_t status; >>>>>> @@ -102,6 +114,19 @@ struct result { >>>>>> uint32_t status; >>>>>> }; >>>>>> >>>>>> +/* >>>>>> + * struct caam_regs - CAAM initialization register interface >>>>>> + * >>>>>> + * Interface to caam memory map, jobring register, jobring storage. >>>>>> + */ >>>>>> +struct caam_regs { >>>>>> + ccsr_sec_t *sec; /*caam initialization registers*/ >>>>>> + struct jr_regs *regs; /*jobring configuration registers*/ >>>>>> + u8 jrid; /*id to identify a jobring*/ >>>>>> + /*Private sub-storage for a single JobR*/ >>>>>> + struct jobring jr[CONFIG_SYS_FSL_MAX_NUM_OF_SEC]; >>>>>> +}; >>>>>> + >>>>>> void caam_jr_strstatus(u32 status); >>>>>> int run_descriptor_jr(uint32_t *desc); >>>>>> >>>>> >>>>> -- >>>>> >>>> >>> >> ================================================================= >>>>> ==== >>>>> DENX Software Engineering GmbH, Managing Director: Wolfgang Denk >>>>> HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, >>>>> Germany >>>>> Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: >>>>> sbabic@denx.de >>>>> >>>> >>> >> ================================================================= >>>>> ====
Hi Stefano As we have not received any response from imx6dl_mamoj board maintainer. I propose the below solution --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -49,8 +49,8 @@ config USE_IMXIMG_PLUGIN config IMX_HAB - select FSL_CAAM if HAS_CAAM - imply CMD_DEKBLOB if HAS_CAAM + imply FSL_CAAM if HAS_CAAM + imply CMD_DEKBLOB if FSL_CAAM Help --- a/configs/imx6dl_mamoj_defconfig +++ b/configs/imx6dl_mamoj_defconfig @@ -59,3 +59,4 @@ CONFIG_USB_GADGET_MANUFACTURER="FSL" +CONFIG_FSL_CAAM=n Need your help to review this or suggest any other solution. Regards Gaurav Jain > -----Original Message----- > From: Stefano Babic <sbabic@denx.de> > Sent: Thursday, March 3, 2022 6:32 PM > To: Gaurav Jain <gaurav.jain@nxp.com>; Stefano Babic <sbabic@denx.de>; u- > boot@lists.denx.de; Marek Vasut <marex@denx.de> > Cc: Fabio Estevam <festevam@gmail.com>; Peng Fan <peng.fan@nxp.com>; > Simon Glass <sjg@chromium.org>; Priyanka Jain <priyanka.jain@nxp.com>; Ye > Li <ye.li@nxp.com>; Horia Geanta <horia.geanta@nxp.com>; Ji Luo > <ji.luo@nxp.com>; Franck Lenormand <franck.lenormand@nxp.com>; Silvano Di > Ninno <silvano.dininno@nxp.com>; Sahil Malhotra <sahil.malhotra@nxp.com>; > Pankaj Gupta <pankaj.gupta@nxp.com>; Varun Sethi <V.Sethi@nxp.com>; dl- > uboot-imx <uboot-imx@nxp.com>; Shengzhou Liu <shengzhou.liu@nxp.com>; > Mingkai Hu <mingkai.hu@nxp.com>; Rajesh Bhagat <rajesh.bhagat@nxp.com>; > Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>; Wasim Khan > <wasim.khan@nxp.com>; Alison Wang <alison.wang@nxp.com>; Pramod > Kumar <pramod.kumar_1@nxp.com>; Andy Tang <andy.tang@nxp.com>; > Adrian Alonso <adrian.alonso@nxp.com>; Vladimir Oltean <olteanv@gmail.com> > Subject: Re: [EXT] Re: [PATCH v8 01/15] crypto/fsl: Add support for CAAM Job > ring driver model > > Caution: EXT Email > > On 03.03.22 13:44, Gaurav Jain wrote: > > Hello Stefano > > > > A gentle reminder!! > > Need your help to check the proposed solution to fix imx6dl_mamoj SPL size > issue shared in last mail. > > Ouch...is there a solution ? I confess I have not seen, is there an answer by > Marek ? > > Regards, > Stefano > > > > > Regards > > Gaurav Jain > > > >> -----Original Message----- > >> From: Gaurav Jain > >> Sent: Friday, February 25, 2022 12:33 PM > >> To: Stefano Babic <sbabic@denx.de>; u-boot@lists.denx.de; Marek Vasut > >> <marex@denx.de> > >> Cc: Fabio Estevam <festevam@gmail.com>; Peng Fan <peng.fan@nxp.com>; > >> Simon Glass <sjg@chromium.org>; Priyanka Jain > >> <priyanka.jain@nxp.com>; Ye Li <ye.li@nxp.com>; Horia Geanta > >> <horia.geanta@nxp.com>; Ji Luo <ji.luo@nxp.com>; Franck Lenormand > >> <franck.lenormand@nxp.com>; Silvano Di Ninno > >> <silvano.dininno@nxp.com>; Sahil Malhotra <sahil.malhotra@nxp.com>; > >> Pankaj Gupta <pankaj.gupta@nxp.com>; Varun Sethi <V.Sethi@nxp.com>; > >> dl- uboot-imx <uboot-imx@nxp.com>; Shengzhou Liu > >> <shengzhou.liu@nxp.com>; Mingkai Hu <mingkai.hu@nxp.com>; Rajesh > >> Bhagat <rajesh.bhagat@nxp.com>; Meenakshi Aggarwal > >> <meenakshi.aggarwal@nxp.com>; Wasim Khan <wasim.khan@nxp.com>; > Alison > >> Wang <alison.wang@nxp.com>; Pramod Kumar > <pramod.kumar_1@nxp.com>; > >> Andy Tang <andy.tang@nxp.com>; Adrian Alonso <adrian.alonso@nxp.com>; > >> Vladimir Oltean <olteanv@gmail.com> > >> Subject: RE: [EXT] Re: [PATCH v8 01/15] crypto/fsl: Add support for > >> CAAM Job ring driver model > >> > >> Hello Stefano > >> > >>> -----Original Message----- > >>> From: Gaurav Jain > >>> Sent: Friday, February 11, 2022 3:09 PM > >>> To: Stefano Babic <sbabic@denx.de>; u-boot@lists.denx.de; Marek > >>> Vasut <marex@denx.de> > >>> Cc: Fabio Estevam <festevam@gmail.com>; Peng Fan <peng.fan@nxp.com>; > >>> Simon Glass <sjg@chromium.org>; Priyanka Jain > >>> <priyanka.jain@nxp.com>; Ye Li <ye.li@nxp.com>; Horia Geanta > >>> <horia.geanta@nxp.com>; Ji Luo <ji.luo@nxp.com>; Franck Lenormand > >>> <franck.lenormand@nxp.com>; Silvano Di Ninno > >>> <silvano.dininno@nxp.com>; Sahil Malhotra <sahil.malhotra@nxp.com>; > >>> Pankaj Gupta <pankaj.gupta@nxp.com>; Varun Sethi <V.Sethi@nxp.com>; > >>> dl- uboot-imx <uboot-imx@nxp.com>; Shengzhou Liu > >>> <shengzhou.liu@nxp.com>; Mingkai Hu <mingkai.hu@nxp.com>; Rajesh > >>> Bhagat <rajesh.bhagat@nxp.com>; Meenakshi Aggarwal > >>> <meenakshi.aggarwal@nxp.com>; Wasim Khan <wasim.khan@nxp.com>; > >> Alison > >>> Wang <alison.wang@nxp.com>; Pramod Kumar > >> <pramod.kumar_1@nxp.com>; > >>> Andy Tang <andy.tang@nxp.com>; Adrian Alonso > >>> <adrian.alonso@nxp.com>; Vladimir Oltean <olteanv@gmail.com> > >>> Subject: RE: [EXT] Re: [PATCH v8 01/15] crypto/fsl: Add support for > >>> CAAM Job ring driver model > >>> > >>> Hello Marek > >>> > >>> A gentle reminder!! > >>> Please help to check if some feature can be dropped in SPL from > >>> imx6dl_mamoj board so that CAAM driver model patches can be accepted. > >>> > >>> Regards > >>> Gaurav Jain > >>> > >>>> -----Original Message----- > >>>> From: Gaurav Jain > >>>> Sent: Monday, February 7, 2022 12:43 PM > >>>> To: Stefano Babic <sbabic@denx.de>; u-boot@lists.denx.de; Marek > >>>> Vasut <marex@denx.de> > >>>> Cc: Fabio Estevam <festevam@gmail.com>; Peng Fan > >>>> <peng.fan@nxp.com>; Simon Glass <sjg@chromium.org>; Priyanka Jain > >>>> <priyanka.jain@nxp.com>; Ye Li <ye.li@nxp.com>; Horia Geanta > >>>> <horia.geanta@nxp.com>; Ji Luo <ji.luo@nxp.com>; Franck Lenormand > >>>> <franck.lenormand@nxp.com>; Silvano Di Ninno > >>>> <silvano.dininno@nxp.com>; Sahil Malhotra <sahil.malhotra@nxp.com>; > >>>> Pankaj Gupta <pankaj.gupta@nxp.com>; Varun Sethi <V.Sethi@nxp.com>; > >>>> dl- uboot-imx <uboot-imx@nxp.com>; Shengzhou Liu > >>>> <shengzhou.liu@nxp.com>; Mingkai Hu <mingkai.hu@nxp.com>; Rajesh > >>>> Bhagat <rajesh.bhagat@nxp.com>; Meenakshi Aggarwal > >>>> <meenakshi.aggarwal@nxp.com>; Wasim Khan <wasim.khan@nxp.com>; > >>> Alison > >>>> Wang <alison.wang@nxp.com>; Pramod Kumar > >>> <pramod.kumar_1@nxp.com>; > >>>> Andy Tang <andy.tang@nxp.com>; Adrian Alonso > >>>> <adrian.alonso@nxp.com>; Vladimir Oltean <olteanv@gmail.com> > >>>> Subject: RE: [EXT] Re: [PATCH v8 01/15] crypto/fsl: Add support for > >>>> CAAM Job ring driver model > >>>> > >>>> Hello Marek > >>>> > >>>>> -----Original Message----- > >>>>> From: Stefano Babic <sbabic@denx.de> > >>>>> Sent: Saturday, February 5, 2022 7:46 PM > >>>>> To: Gaurav Jain <gaurav.jain@nxp.com>; u-boot@lists.denx.de > >>>>> Cc: Stefano Babic <sbabic@denx.de>; Fabio Estevam > >>>>> <festevam@gmail.com>; Peng Fan <peng.fan@nxp.com>; Simon Glass > >>>>> <sjg@chromium.org>; Priyanka Jain <priyanka.jain@nxp.com>; Ye Li > >>>>> <ye.li@nxp.com>; Horia Geanta <horia.geanta@nxp.com>; Ji Luo > >>>>> <ji.luo@nxp.com>; Franck Lenormand <franck.lenormand@nxp.com>; > >>>>> Silvano Di Ninno <silvano.dininno@nxp.com>; Sahil Malhotra > >>>>> <sahil.malhotra@nxp.com>; Pankaj Gupta <pankaj.gupta@nxp.com>; > >>>>> Varun Sethi <V.Sethi@nxp.com>; dl-uboot-imx <uboot-imx@nxp.com>; > >>>>> Shengzhou Liu <shengzhou.liu@nxp.com>; Mingkai Hu > >>>>> <mingkai.hu@nxp.com>; Rajesh Bhagat <rajesh.bhagat@nxp.com>; > >>>>> Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>; Wasim Khan > >>>>> <wasim.khan@nxp.com>; > >>>> Alison > >>>>> Wang <alison.wang@nxp.com>; Pramod Kumar > >>>> <pramod.kumar_1@nxp.com>; > >>>>> Andy Tang <andy.tang@nxp.com>; Adrian Alonso > >>>>> <adrian.alonso@nxp.com>; Vladimir Oltean <olteanv@gmail.com>; > >>>>> Marek Vasut <marex@denx.de> > >>>>> Subject: [EXT] Re: [PATCH v8 01/15] crypto/fsl: Add support for > >>>>> CAAM Job ring driver model > >>>>> > >>>>> Caution: EXT Email > >>>>> > >>>>> Hi Gaurav, > >>>>> > >>>>> rather I still have issues to run CI with this applied. The reason > >>>>> is that this adds an overhead to SPL and it breaks the board > >>>>> imx6dl_mamoj because SPL exceeds the maximum size for a DL SOC. > >>>>> > >>>>> See > >>>>> https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2F > >>>>> so > >>>>> ur > >>>>> ce.d > >>>>> enx.de%2Fu-boot%2Fcustodians%2Fu-boot-imx%2F- > >>>>> %2Fjobs%2F387370&data=04%7C01%7Cgaurav.jain%40nxp.com%7 > C > >> 3a > >>> 2 > >>>> 73 > >>>>> > >>>> > >>> > >> > 1dd27fc4bebcad308d9e8b21464%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C > >>>>> > >>>> > >>> > >> > 0%7C0%7C637796673834942697%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4 > >>>>> > >>>> > >>> > >> > wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000&am > >>>>> > >>>> > >>> > >> > p;sdata=pI%2F%2FlNtrdrGCa8sSvcr6uNu4jze7pzDqZtI52FIDj50%3D&reserv > >> e > >>>>> d=0 > >>>>> > >>>>> I do not know if it is possible to drop some features from SPL for > >>>>> this board (Added Marek as board maintainer). > >> > >> As we have not received any response from imx6dl_mamoj board maintainer. > >> I propose the below solution > >> > >> --- a/arch/arm/mach-imx/Kconfig > >> +++ b/arch/arm/mach-imx/Kconfig > >> @@ -49,8 +49,8 @@ config USE_IMXIMG_PLUGIN config IMX_HAB > >> - select FSL_CAAM if HAS_CAAM > >> - imply CMD_DEKBLOB if HAS_CAAM > >> + imply FSL_CAAM if HAS_CAAM > >> + imply CMD_DEKBLOB if FSL_CAAM > >> Help > >> > >> --- a/configs/imx6dl_mamoj_defconfig > >> +++ b/configs/imx6dl_mamoj_defconfig > >> @@ -59,3 +59,4 @@ CONFIG_USB_GADGET_MANUFACTURER="FSL" > >> +CONFIG_FSL_CAAM=n > >> > >> Need your help to review this or suggest any other solution. > >> > >> Regards > >> Gaurav Jain > >> > >>>> > >>>> CONFIG_IMX_HAB is enabled for imx6dl_mamoj. So CAAM is built for > >>>> SPL, results in increased size. > >>>> However CAAM is not initialized in SPL. As Stefano suggested, Can > >>>> you drop some features from SPL? > >>>> > >>>> Regards > >>>> Gaurav Jain > >>>>> > >>>>> Best regards, > >>>>> Stefano > >>>>> > >>>>> On 10.01.22 13:27, Gaurav Jain wrote: > >>>>>> added device tree support for job ring driver. > >>>>>> sec is initialized based on job ring information processed from > >>>>>> device tree. > >>>>>> > >>>>>> Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com> > >>>>>> Reviewed-by: Ye Li <ye.li@nxp.com> > >>>>>> --- > >>>>>> drivers/crypto/fsl/jr.c | 323 ++++++++++++++++++++++++++------------- > - > >>>>>> drivers/crypto/fsl/jr.h | 31 +++- > >>>>>> 2 files changed, 240 insertions(+), 114 deletions(-) > >>>>>> > >>>>>> diff --git a/drivers/crypto/fsl/jr.c b/drivers/crypto/fsl/jr.c > >>>>>> index > >>>>>> 22b649219e..8103987425 100644 > >>>>>> --- a/drivers/crypto/fsl/jr.c > >>>>>> +++ b/drivers/crypto/fsl/jr.c > >>>>>> @@ -1,7 +1,7 @@ > >>>>>> // SPDX-License-Identifier: GPL-2.0+ > >>>>>> /* > >>>>>> * Copyright 2008-2014 Freescale Semiconductor, Inc. > >>>>>> - * Copyright 2018 NXP > >>>>>> + * Copyright 2018, 2021 NXP > >>>>>> * > >>>>>> * Based on CAAM driver in drivers/crypto/caam in Linux > >>>>>> */ > >>>>>> @@ -11,7 +11,6 @@ > >>>>>> #include <linux/kernel.h> > >>>>>> #include <log.h> > >>>>>> #include <malloc.h> > >>>>>> -#include "fsl_sec.h" > >>>>>> #include "jr.h" > >>>>>> #include "jobdesc.h" > >>>>>> #include "desc_constr.h" > >>>>>> @@ -21,7 +20,10 @@ > >>>>>> #include <asm/cache.h> > >>>>>> #include <asm/fsl_pamu.h> > >>>>>> #endif > >>>>>> +#include <dm.h> > >>>>>> #include <dm/lists.h> > >>>>>> +#include <dm/root.h> > >>>>>> +#include <dm/device-internal.h> > >>>>>> #include <linux/delay.h> > >>>>>> > >>>>>> #define CIRC_CNT(head, tail, size) (((head) - (tail)) & (size > >>>>>> - > >>>>>> 1)) @@ -35,20 +37,29 @@ uint32_t > >>>>> sec_offset[CONFIG_SYS_FSL_MAX_NUM_OF_SEC] = { > >>>>>> #endif > >>>>>> }; > >>>>>> > >>>>>> +#if CONFIG_IS_ENABLED(DM) > >>>>>> +struct udevice *caam_dev; > >>>>>> +#else > >>>>>> #define SEC_ADDR(idx) \ > >>>>>> (ulong)((CONFIG_SYS_FSL_SEC_ADDR + sec_offset[idx])) > >>>>>> > >>>>>> #define SEC_JR0_ADDR(idx) \ > >>>>>> (ulong)(SEC_ADDR(idx) + \ > >>>>>> (CONFIG_SYS_FSL_JR0_OFFSET - CONFIG_SYS_FSL_SEC_OFFSET)) > >>>>>> +struct caam_regs caam_st; > >>>>>> +#endif > >>>>>> > >>>>>> -struct jobring jr0[CONFIG_SYS_FSL_MAX_NUM_OF_SEC]; > >>>>>> +static inline u32 jr_start_reg(u8 jrid) { > >>>>>> + return (1 << jrid); > >>>>>> +} > >>>>>> > >>>>>> -static inline void start_jr0(uint8_t sec_idx) > >>>>>> +static inline void start_jr(struct caam_regs *caam) > >>>>>> { > >>>>>> - ccsr_sec_t *sec = (void *)SEC_ADDR(sec_idx); > >>>>>> + ccsr_sec_t *sec = caam->sec; > >>>>>> u32 ctpr_ms = sec_in32(&sec->ctpr_ms); > >>>>>> u32 scfgr = sec_in32(&sec->scfgr); > >>>>>> + u32 jrstart = jr_start_reg(caam->jrid); > >>>>>> > >>>>>> if (ctpr_ms & SEC_CTPR_MS_VIRT_EN_INCL) { > >>>>>> /* VIRT_EN_INCL = 1 & VIRT_EN_POR = 1 or @@ -56,23 > >>>>>> +67,16 @@ static inline void start_jr0(uint8_t sec_idx) > >>>>>> */ > >>>>>> if ((ctpr_ms & SEC_CTPR_MS_VIRT_EN_POR) || > >>>>>> (scfgr & SEC_SCFGR_VIRT_EN)) > >>>>>> - sec_out32(&sec->jrstartr, CONFIG_JRSTARTR_JR0); > >>>>>> + sec_out32(&sec->jrstartr, jrstart); > >>>>>> } else { > >>>>>> /* VIRT_EN_INCL = 0 && VIRT_EN_POR_VALUE = 1 */ > >>>>>> if (ctpr_ms & SEC_CTPR_MS_VIRT_EN_POR) > >>>>>> - sec_out32(&sec->jrstartr, CONFIG_JRSTARTR_JR0); > >>>>>> + sec_out32(&sec->jrstartr, jrstart); > >>>>>> } > >>>>>> } > >>>>>> > >>>>>> -static inline void jr_reset_liodn(uint8_t sec_idx) > >>>>>> +static inline void jr_disable_irq(struct jr_regs *regs) > >>>>>> { > >>>>>> - ccsr_sec_t *sec = (void *)SEC_ADDR(sec_idx); > >>>>>> - sec_out32(&sec->jrliodnr[0].ls, 0); > >>>>>> -} > >>>>>> - > >>>>>> -static inline void jr_disable_irq(uint8_t sec_idx) -{ > >>>>>> - struct jr_regs *regs = (struct jr_regs *)SEC_JR0_ADDR(sec_idx); > >>>>>> uint32_t jrcfg = sec_in32(®s->jrcfg1); > >>>>>> > >>>>>> jrcfg = jrcfg | JR_INTMASK; @@ -80,10 +84,10 @@ static > >>>>>> inline void jr_disable_irq(uint8_t sec_idx) > >>>>>> sec_out32(®s->jrcfg1, jrcfg); > >>>>>> } > >>>>>> > >>>>>> -static void jr_initregs(uint8_t sec_idx) > >>>>>> +static void jr_initregs(uint8_t sec_idx, struct caam_regs > >>>>>> +*caam) > >>>>>> { > >>>>>> - struct jr_regs *regs = (struct jr_regs *)SEC_JR0_ADDR(sec_idx); > >>>>>> - struct jobring *jr = &jr0[sec_idx]; > >>>>>> + struct jr_regs *regs = caam->regs; > >>>>>> + struct jobring *jr = &caam->jr[sec_idx]; > >>>>>> caam_dma_addr_t ip_base = virt_to_phys((void *)jr->input_ring); > >>>>>> caam_dma_addr_t op_base = virt_to_phys((void > >>>>>> *)jr->output_ring); > >>>>>> > >>>>>> @@ -103,16 +107,16 @@ static void jr_initregs(uint8_t sec_idx) > >>>>>> sec_out32(®s->irs, JR_SIZE); > >>>>>> > >>>>>> if (!jr->irq) > >>>>>> - jr_disable_irq(sec_idx); > >>>>>> + jr_disable_irq(regs); > >>>>>> } > >>>>>> > >>>>>> -static int jr_init(uint8_t sec_idx) > >>>>>> +static int jr_init(uint8_t sec_idx, struct caam_regs *caam) > >>>>>> { > >>>>>> - struct jobring *jr = &jr0[sec_idx]; > >>>>>> + struct jobring *jr = &caam->jr[sec_idx]; > >>>>>> > >>>>>> memset(jr, 0, sizeof(struct jobring)); > >>>>>> > >>>>>> - jr->jq_id = DEFAULT_JR_ID; > >>>>>> + jr->jq_id = caam->jrid; > >>>>>> jr->irq = DEFAULT_IRQ; > >>>>>> > >>>>>> #ifdef CONFIG_FSL_CORENET > >>>>>> @@ -134,53 +138,8 @@ static int jr_init(uint8_t sec_idx) > >>>>>> memset(jr->input_ring, 0, JR_SIZE * sizeof(caam_dma_addr_t)); > >>>>>> memset(jr->output_ring, 0, jr->op_size); > >>>>>> > >>>>>> - start_jr0(sec_idx); > >>>>>> - > >>>>>> - jr_initregs(sec_idx); > >>>>>> - > >>>>>> - return 0; > >>>>>> -} > >>>>>> - > >>>>>> -static int jr_sw_cleanup(uint8_t sec_idx) -{ > >>>>>> - struct jobring *jr = &jr0[sec_idx]; > >>>>>> - > >>>>>> - jr->head = 0; > >>>>>> - jr->tail = 0; > >>>>>> - jr->read_idx = 0; > >>>>>> - jr->write_idx = 0; > >>>>>> - memset(jr->info, 0, sizeof(jr->info)); > >>>>>> - memset(jr->input_ring, 0, jr->size * sizeof(caam_dma_addr_t)); > >>>>>> - memset(jr->output_ring, 0, jr->size * sizeof(struct op_ring)); > >>>>>> - > >>>>>> - return 0; > >>>>>> -} > >>>>>> - > >>>>>> -static int jr_hw_reset(uint8_t sec_idx) -{ > >>>>>> - struct jr_regs *regs = (struct jr_regs *)SEC_JR0_ADDR(sec_idx); > >>>>>> - uint32_t timeout = 100000; > >>>>>> - uint32_t jrint, jrcr; > >>>>>> - > >>>>>> - sec_out32(®s->jrcr, JRCR_RESET); > >>>>>> - do { > >>>>>> - jrint = sec_in32(®s->jrint); > >>>>>> - } while (((jrint & JRINT_ERR_HALT_MASK) == > >>>>>> - JRINT_ERR_HALT_INPROGRESS) && --timeout); > >>>>>> - > >>>>>> - jrint = sec_in32(®s->jrint); > >>>>>> - if (((jrint & JRINT_ERR_HALT_MASK) != > >>>>>> - JRINT_ERR_HALT_INPROGRESS) && timeout == 0) > >>>>>> - return -1; > >>>>>> - > >>>>>> - timeout = 100000; > >>>>>> - sec_out32(®s->jrcr, JRCR_RESET); > >>>>>> - do { > >>>>>> - jrcr = sec_in32(®s->jrcr); > >>>>>> - } while ((jrcr & JRCR_RESET) && --timeout); > >>>>>> - > >>>>>> - if (timeout == 0) > >>>>>> - return -1; > >>>>>> + start_jr(caam); > >>>>>> + jr_initregs(sec_idx, caam); > >>>>>> > >>>>>> return 0; > >>>>>> } > >>>>>> @@ -188,10 +147,10 @@ static int jr_hw_reset(uint8_t sec_idx) > >>>>>> /* -1 --- error, can't enqueue -- no space available */ > >>>>>> static int jr_enqueue(uint32_t *desc_addr, > >>>>>> void (*callback)(uint32_t status, void *arg), > >>>>>> - void *arg, uint8_t sec_idx) > >>>>>> + void *arg, uint8_t sec_idx, struct caam_regs *caam) > >>>>>> { > >>>>>> - struct jr_regs *regs = (struct jr_regs *)SEC_JR0_ADDR(sec_idx); > >>>>>> - struct jobring *jr = &jr0[sec_idx]; > >>>>>> + struct jr_regs *regs = caam->regs; > >>>>>> + struct jobring *jr = &caam->jr[sec_idx]; > >>>>>> int head = jr->head; > >>>>>> uint32_t desc_word; > >>>>>> int length = desc_len(desc_addr); @@ -263,10 +222,10 @@ > >>>>>> static int jr_enqueue(uint32_t *desc_addr, > >>>>>> return 0; > >>>>>> } > >>>>>> > >>>>>> -static int jr_dequeue(int sec_idx) > >>>>>> +static int jr_dequeue(int sec_idx, struct caam_regs *caam) > >>>>>> { > >>>>>> - struct jr_regs *regs = (struct jr_regs *)SEC_JR0_ADDR(sec_idx); > >>>>>> - struct jobring *jr = &jr0[sec_idx]; > >>>>>> + struct jr_regs *regs = caam->regs; > >>>>>> + struct jobring *jr = &caam->jr[sec_idx]; > >>>>>> int head = jr->head; > >>>>>> int tail = jr->tail; > >>>>>> int idx, i, found; > >>>>>> @@ -349,14 +308,18 @@ static void desc_done(uint32_t status, void > >> *arg) > >>>>>> { > >>>>>> struct result *x = arg; > >>>>>> x->status = status; > >>>>>> -#ifndef CONFIG_SPL_BUILD > >>>>>> caam_jr_strstatus(status); -#endif > >>>>>> x->done = 1; > >>>>>> } > >>>>>> > >>>>>> static inline int run_descriptor_jr_idx(uint32_t *desc, uint8_t sec_idx) > >>>>>> { > >>>>>> + struct caam_regs *caam; > >>>>>> +#if CONFIG_IS_ENABLED(DM) > >>>>>> + caam = dev_get_priv(caam_dev); #else > >>>>>> + caam = &caam_st; > >>>>>> +#endif > >>>>>> unsigned long long timeval = 0; > >>>>>> unsigned long long timeout = CONFIG_USEC_DEQ_TIMEOUT; > >>>>>> struct result op; > >>>>>> @@ -364,7 +327,7 @@ static inline int > >>>>>> run_descriptor_jr_idx(uint32_t *desc, uint8_t sec_idx) > >>>>>> > >>>>>> memset(&op, 0, sizeof(op)); > >>>>>> > >>>>>> - ret = jr_enqueue(desc, desc_done, &op, sec_idx); > >>>>>> + ret = jr_enqueue(desc, desc_done, &op, sec_idx, caam); > >>>>>> if (ret) { > >>>>>> debug("Error in SEC enq\n"); > >>>>>> ret = JQ_ENQ_ERR; > >>>>>> @@ -375,7 +338,7 @@ static inline int > >>>>>> run_descriptor_jr_idx(uint32_t *desc, > >>>>> uint8_t sec_idx) > >>>>>> udelay(1); > >>>>>> timeval += 1; > >>>>>> > >>>>>> - ret = jr_dequeue(sec_idx); > >>>>>> + ret = jr_dequeue(sec_idx, caam); > >>>>>> if (ret) { > >>>>>> debug("Error in SEC deq\n"); > >>>>>> ret = JQ_DEQ_ERR; @@ -402,13 +365,62 @@ > >>>>>> int run_descriptor_jr(uint32_t *desc) > >>>>>> return run_descriptor_jr_idx(desc, 0); > >>>>>> } > >>>>>> > >>>>>> +static int jr_sw_cleanup(uint8_t sec_idx, struct caam_regs *caam) { > >>>>>> + struct jobring *jr = &caam->jr[sec_idx]; > >>>>>> + > >>>>>> + jr->head = 0; > >>>>>> + jr->tail = 0; > >>>>>> + jr->read_idx = 0; > >>>>>> + jr->write_idx = 0; > >>>>>> + memset(jr->info, 0, sizeof(jr->info)); > >>>>>> + memset(jr->input_ring, 0, jr->size * sizeof(caam_dma_addr_t)); > >>>>>> + memset(jr->output_ring, 0, jr->size * sizeof(struct > >>>>>> + op_ring)); > >>>>>> + > >>>>>> + return 0; > >>>>>> +} > >>>>>> + > >>>>>> +static int jr_hw_reset(struct jr_regs *regs) { > >>>>>> + uint32_t timeout = 100000; > >>>>>> + uint32_t jrint, jrcr; > >>>>>> + > >>>>>> + sec_out32(®s->jrcr, JRCR_RESET); > >>>>>> + do { > >>>>>> + jrint = sec_in32(®s->jrint); > >>>>>> + } while (((jrint & JRINT_ERR_HALT_MASK) == > >>>>>> + JRINT_ERR_HALT_INPROGRESS) && --timeout); > >>>>>> + > >>>>>> + jrint = sec_in32(®s->jrint); > >>>>>> + if (((jrint & JRINT_ERR_HALT_MASK) != > >>>>>> + JRINT_ERR_HALT_INPROGRESS) && timeout == 0) > >>>>>> + return -1; > >>>>>> + > >>>>>> + timeout = 100000; > >>>>>> + sec_out32(®s->jrcr, JRCR_RESET); > >>>>>> + do { > >>>>>> + jrcr = sec_in32(®s->jrcr); > >>>>>> + } while ((jrcr & JRCR_RESET) && --timeout); > >>>>>> + > >>>>>> + if (timeout == 0) > >>>>>> + return -1; > >>>>>> + > >>>>>> + return 0; > >>>>>> +} > >>>>>> + > >>>>>> static inline int jr_reset_sec(uint8_t sec_idx) > >>>>>> { > >>>>>> - if (jr_hw_reset(sec_idx) < 0) > >>>>>> + struct caam_regs *caam; > >>>>>> +#if CONFIG_IS_ENABLED(DM) > >>>>>> + caam = dev_get_priv(caam_dev); #else > >>>>>> + caam = &caam_st; > >>>>>> +#endif > >>>>>> + if (jr_hw_reset(caam->regs) < 0) > >>>>>> return -1; > >>>>>> > >>>>>> /* Clean up the jobring structure maintained by software */ > >>>>>> - jr_sw_cleanup(sec_idx); > >>>>>> + jr_sw_cleanup(sec_idx, caam); > >>>>>> > >>>>>> return 0; > >>>>>> } > >>>>>> @@ -418,9 +430,15 @@ int jr_reset(void) > >>>>>> return jr_reset_sec(0); > >>>>>> } > >>>>>> > >>>>>> -static inline int sec_reset_idx(uint8_t sec_idx) > >>>>>> +int sec_reset(void) > >>>>>> { > >>>>>> - ccsr_sec_t *sec = (void *)SEC_ADDR(sec_idx); > >>>>>> + struct caam_regs *caam; > >>>>>> +#if CONFIG_IS_ENABLED(DM) > >>>>>> + caam = dev_get_priv(caam_dev); #else > >>>>>> + caam = &caam_st; > >>>>>> +#endif > >>>>>> + ccsr_sec_t *sec = caam->sec; > >>>>>> uint32_t mcfgr = sec_in32(&sec->mcfgr); > >>>>>> uint32_t timeout = 100000; > >>>>>> > >>>>>> @@ -446,11 +464,7 @@ static inline int sec_reset_idx(uint8_t > >>>>>> sec_idx) > >>>>>> > >>>>>> return 0; > >>>>>> } > >>>>>> -int sec_reset(void) > >>>>>> -{ > >>>>>> - return sec_reset_idx(0); > >>>>>> -} > >>>>>> -#ifndef CONFIG_SPL_BUILD > >>>>>> + > >>>>>> static int deinstantiate_rng(u8 sec_idx, int state_handle_mask) > >>>>>> { > >>>>>> u32 *desc; > >>>>>> @@ -496,12 +510,11 @@ static int deinstantiate_rng(u8 sec_idx, > >>>>>> int > >>>>> state_handle_mask) > >>>>>> return ret; > >>>>>> } > >>>>>> > >>>>>> -static int instantiate_rng(u8 sec_idx, int gen_sk) > >>>>>> +static int instantiate_rng(uint8_t sec_idx, ccsr_sec_t *sec, int > >>>>>> +gen_sk) > >>>>>> { > >>>>>> u32 *desc; > >>>>>> u32 rdsta_val; > >>>>>> int ret = 0, sh_idx, size; > >>>>>> - ccsr_sec_t __iomem *sec = (ccsr_sec_t __iomem > >> *)SEC_ADDR(sec_idx); > >>>>>> struct rng4tst __iomem *rng = > >>>>>> (struct rng4tst __iomem *)&sec->rng; > >>>>>> > >>>>>> @@ -554,9 +567,8 @@ static int instantiate_rng(u8 sec_idx, int gen_sk) > >>>>>> return ret; > >>>>>> } > >>>>>> > >>>>>> -static u8 get_rng_vid(uint8_t sec_idx) > >>>>>> +static u8 get_rng_vid(ccsr_sec_t *sec) > >>>>>> { > >>>>>> - ccsr_sec_t *sec = (void *)SEC_ADDR(sec_idx); > >>>>>> u8 vid; > >>>>>> > >>>>>> if (caam_get_era() < 10) { @@ -574,9 +586,8 @@ static u8 > >>>>>> get_rng_vid(uint8_t sec_idx) > >>>>>> * By default, the TRNG runs for 200 clocks per sample; > >>>>>> * 1200 clocks per sample generates better entropy. > >>>>>> */ > >>>>>> -static void kick_trng(int ent_delay, uint8_t sec_idx) > >>>>>> +static void kick_trng(int ent_delay, ccsr_sec_t *sec) > >>>>>> { > >>>>>> - ccsr_sec_t __iomem *sec = (ccsr_sec_t __iomem > >> *)SEC_ADDR(sec_idx); > >>>>>> struct rng4tst __iomem *rng = > >>>>>> (struct rng4tst __iomem *)&sec->rng; > >>>>>> u32 val; > >>>>>> @@ -603,10 +614,9 @@ static void kick_trng(int ent_delay, uint8_t > >>> sec_idx) > >>>>>> sec_clrbits32(&rng->rtmctl, RTMCTL_PRGM); > >>>>>> } > >>>>>> > >>>>>> -static int rng_init(uint8_t sec_idx) > >>>>>> +static int rng_init(uint8_t sec_idx, ccsr_sec_t *sec) > >>>>>> { > >>>>>> int ret, gen_sk, ent_delay = RTSDCTL_ENT_DLY_MIN; > >>>>>> - ccsr_sec_t __iomem *sec = (ccsr_sec_t __iomem > >> *)SEC_ADDR(sec_idx); > >>>>>> struct rng4tst __iomem *rng = > >>>>>> (struct rng4tst __iomem *)&sec->rng; > >>>>>> u32 inst_handles; > >>>>>> @@ -624,7 +634,7 @@ static int rng_init(uint8_t sec_idx) > >>>>>> * the TRNG parameters. > >>>>>> */ > >>>>>> if (!inst_handles) { > >>>>>> - kick_trng(ent_delay, sec_idx); > >>>>>> + kick_trng(ent_delay, sec); > >>>>>> ent_delay += 400; > >>>>>> } > >>>>>> /* > >>>>>> @@ -634,7 +644,7 @@ static int rng_init(uint8_t sec_idx) > >>>>>> * interval, leading to a sucessful initialization of > >>>>>> * the RNG. > >>>>>> */ > >>>>>> - ret = instantiate_rng(sec_idx, gen_sk); > >>>>>> + ret = instantiate_rng(sec_idx, sec, gen_sk); > >>>>>> } while ((ret == -1) && (ent_delay < RTSDCTL_ENT_DLY_MAX)); > >>>>>> if (ret) { > >>>>>> printf("SEC%u: Failed to instantiate RNG\n", > >>>>>> sec_idx); @@ -646,13 +656,28 @@ static int rng_init(uint8_t > >>>>>> sec_idx) > >>>>>> > >>>>>> return ret; > >>>>>> } > >>>>>> -#endif > >>>>>> + > >>>>>> int sec_init_idx(uint8_t sec_idx) > >>>>>> { > >>>>>> - ccsr_sec_t *sec = (void *)SEC_ADDR(sec_idx); > >>>>>> - uint32_t mcr = sec_in32(&sec->mcfgr); > >>>>>> int ret = 0; > >>>>>> - > >>>>>> + struct caam_regs *caam; > >>>>>> +#if CONFIG_IS_ENABLED(DM) > >>>>>> + if (!caam_dev) { > >>>>>> + printf("caam_jr: caam not found\n"); > >>>>>> + return -1; > >>>>>> + } > >>>>>> + caam = dev_get_priv(caam_dev); #else > >>>>>> + caam_st.sec = (void *)SEC_ADDR(sec_idx); > >>>>>> + caam_st.regs = (struct jr_regs *)SEC_JR0_ADDR(sec_idx); > >>>>>> + caam_st.jrid = 0; > >>>>>> + caam = &caam_st; > >>>>>> +#endif > >>>>>> + ccsr_sec_t *sec = caam->sec; > >>>>>> + uint32_t mcr = sec_in32(&sec->mcfgr); #if > >>>>>> +defined(CONFIG_SPL_BUILD) && defined(CONFIG_IMX8M) > >>>>>> + uint32_t jrdid_ms = 0; > >>>>>> +#endif > >>>>>> #ifdef CONFIG_FSL_CORENET > >>>>>> uint32_t liodnr; > >>>>>> uint32_t liodn_ns; > >>>>>> @@ -682,6 +707,11 @@ int sec_init_idx(uint8_t sec_idx) > >>>>>> mcr |= (1 << MCFGR_PS_SHIFT); > >>>>>> #endif > >>>>>> sec_out32(&sec->mcfgr, mcr); > >>>>>> +#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_IMX8M) > >>>>>> + jrdid_ms = JRDID_MS_TZ_OWN | JRDID_MS_PRIM_TZ | > >>>>> JRDID_MS_PRIM_DID; > >>>>>> + sec_out32(&sec->jrliodnr[caam->jrid].ms, jrdid_ms); #endif > >>>>>> + jr_reset(); > >>>>>> > >>>>>> #ifdef CONFIG_FSL_CORENET > >>>>>> #ifdef CONFIG_SPL_BUILD > >>>>>> @@ -693,20 +723,19 @@ int sec_init_idx(uint8_t sec_idx) > >>>>>> liodn_ns = CONFIG_SPL_JR0_LIODN_NS & JRNSLIODN_MASK; > >>>>>> liodn_s = CONFIG_SPL_JR0_LIODN_S & JRSLIODN_MASK; > >>>>>> > >>>>>> - liodnr = sec_in32(&sec->jrliodnr[0].ls) & > >>>>>> + liodnr = sec_in32(&sec->jrliodnr[caam->jrid].ls) & > >>>>>> ~(JRNSLIODN_MASK | JRSLIODN_MASK); > >>>>>> liodnr = liodnr | > >>>>>> (liodn_ns << JRNSLIODN_SHIFT) | > >>>>>> (liodn_s << JRSLIODN_SHIFT); > >>>>>> - sec_out32(&sec->jrliodnr[0].ls, liodnr); > >>>>>> + sec_out32(&sec->jrliodnr[caam->jrid].ls, liodnr); > >>>>>> #else > >>>>>> - liodnr = sec_in32(&sec->jrliodnr[0].ls); > >>>>>> + liodnr = sec_in32(&sec->jrliodnr[caam->jrid].ls); > >>>>>> liodn_ns = (liodnr & JRNSLIODN_MASK) >> JRNSLIODN_SHIFT; > >>>>>> liodn_s = (liodnr & JRSLIODN_MASK) >> JRSLIODN_SHIFT; > >>>>>> #endif > >>>>>> #endif > >>>>>> - > >>>>>> - ret = jr_init(sec_idx); > >>>>>> + ret = jr_init(sec_idx, caam); > >>>>>> if (ret < 0) { > >>>>>> printf("SEC%u: initialization failed\n", sec_idx); > >>>>>> return -1; > >>>>>> @@ -719,9 +748,9 @@ int sec_init_idx(uint8_t sec_idx) > >>>>>> > >>>>>> pamu_enable(); > >>>>>> #endif > >>>>>> -#ifndef CONFIG_SPL_BUILD > >>>>>> - if (get_rng_vid(sec_idx) >= 4) { > >>>>>> - if (rng_init(sec_idx) < 0) { > >>>>>> + > >>>>>> + if (get_rng_vid(caam->sec) >= 4) { > >>>>>> + if (rng_init(sec_idx, caam->sec) < 0) { > >>>>>> printf("SEC%u: RNG instantiation failed\n", sec_idx); > >>>>>> return -1; > >>>>>> } > >>>>>> @@ -735,7 +764,6 @@ int sec_init_idx(uint8_t sec_idx) > >>>>>> > >>>>>> printf("SEC%u: RNG instantiated\n", sec_idx); > >>>>>> } > >>>>>> -#endif > >>>>>> return ret; > >>>>>> } > >>>>>> > >>>>>> @@ -743,3 +771,76 @@ int sec_init(void) > >>>>>> { > >>>>>> return sec_init_idx(0); > >>>>>> } > >>>>>> + > >>>>>> +#if CONFIG_IS_ENABLED(DM) > >>>>>> +static int caam_jr_ioctl(struct udevice *dev, unsigned long > >>>>>> +request, void *buf) { > >>>>>> + if (request != CAAM_JR_RUN_DESC) > >>>>>> + return -ENOSYS; > >>>>>> + > >>>>>> + return run_descriptor_jr(buf); } > >>>>>> + > >>>>>> +static int caam_jr_probe(struct udevice *dev) { > >>>>>> + struct caam_regs *caam = dev_get_priv(dev); > >>>>>> + fdt_addr_t addr; > >>>>>> + ofnode node; > >>>>>> + unsigned int jr_node = 0; > >>>>>> + > >>>>>> + caam_dev = dev; > >>>>>> + > >>>>>> + addr = dev_read_addr(dev); > >>>>>> + if (addr == FDT_ADDR_T_NONE) { > >>>>>> + printf("caam_jr: crypto not found\n"); > >>>>>> + return -EINVAL; > >>>>>> + } > >>>>>> + caam->sec = (ccsr_sec_t *)(uintptr_t)addr; > >>>>>> + caam->regs = (struct jr_regs *)caam->sec; > >>>>>> + > >>>>>> + /* Check for enabled job ring node */ > >>>>>> + ofnode_for_each_subnode(node, dev_ofnode(dev)) { > >>>>>> + if (!ofnode_is_available(node)) > >>>>>> + continue; > >>>>>> + > >>>>>> + jr_node = ofnode_read_u32_default(node, "reg", -1); > >>>>>> + if (jr_node > 0) { > >>>>>> + caam->regs = (struct jr_regs *)((ulong)caam->sec + jr_node); > >>>>>> + while (!(jr_node & 0x0F)) > >>>>>> + jr_node = jr_node >> 4; > >>>>>> + > >>>>>> + caam->jrid = jr_node - 1; > >>>>>> + break; > >>>>>> + } > >>>>>> + } > >>>>>> + > >>>>>> + if (sec_init()) > >>>>>> + printf("\nsec_init failed!\n"); > >>>>>> + > >>>>>> + return 0; > >>>>>> +} > >>>>>> + > >>>>>> +static int caam_jr_bind(struct udevice *dev) { > >>>>>> + return 0; > >>>>>> +} > >>>>>> + > >>>>>> +static const struct misc_ops caam_jr_ops = { > >>>>>> + .ioctl = caam_jr_ioctl, > >>>>>> +}; > >>>>>> + > >>>>>> +static const struct udevice_id caam_jr_match[] = { > >>>>>> + { .compatible = "fsl,sec-v4.0" }, > >>>>>> + { } > >>>>>> +}; > >>>>>> + > >>>>>> +U_BOOT_DRIVER(caam_jr) = { > >>>>>> + .name = "caam_jr", > >>>>>> + .id = UCLASS_MISC, > >>>>>> + .of_match = caam_jr_match, > >>>>>> + .ops = &caam_jr_ops, > >>>>>> + .bind = caam_jr_bind, > >>>>>> + .probe = caam_jr_probe, > >>>>>> + .priv_auto = sizeof(struct caam_regs), > >>>>>> +}; > >>>>>> +#endif > >>>>>> diff --git a/drivers/crypto/fsl/jr.h b/drivers/crypto/fsl/jr.h > >>>>>> index 1047aa772c..3eb7be79da 100644 > >>>>>> --- a/drivers/crypto/fsl/jr.h > >>>>>> +++ b/drivers/crypto/fsl/jr.h > >>>>>> @@ -1,6 +1,7 @@ > >>>>>> /* SPDX-License-Identifier: GPL-2.0+ */ > >>>>>> /* > >>>>>> * Copyright 2008-2014 Freescale Semiconductor, Inc. > >>>>>> + * Copyright 2021 NXP > >>>>>> * > >>>>>> */ > >>>>>> > >>>>>> @@ -8,7 +9,9 @@ > >>>>>> #define __JR_H > >>>>>> > >>>>>> #include <linux/compiler.h> > >>>>>> +#include "fsl_sec.h" > >>>>>> #include "type.h" > >>>>>> +#include <misc.h> > >>>>>> > >>>>>> #define JR_SIZE 4 > >>>>>> /* Timeout currently defined as 10 sec */ @@ -35,12 +38,21 @@ > >>>>>> #define JRSLIODN_SHIFT 0 > >>>>>> #define JRSLIODN_MASK 0x00000fff > >>>>>> > >>>>>> -#define JQ_DEQ_ERR -1 > >>>>>> -#define JQ_DEQ_TO_ERR -2 > >>>>>> -#define JQ_ENQ_ERR -3 > >>>>>> +#define JRDID_MS_PRIM_DID BIT(0) > >>>>>> +#define JRDID_MS_PRIM_TZ BIT(4) > >>>>>> +#define JRDID_MS_TZ_OWN BIT(15) > >>>>>> + > >>>>>> +#define JQ_DEQ_ERR (-1) > >>>>>> +#define JQ_DEQ_TO_ERR (-2) > >>>>>> +#define JQ_ENQ_ERR (-3) > >>>>>> > >>>>>> #define RNG4_MAX_HANDLES 2 > >>>>>> > >>>>>> +enum { > >>>>>> + /* Run caam jobring descriptor(in buf) */ > >>>>>> + CAAM_JR_RUN_DESC, > >>>>>> +}; > >>>>>> + > >>>>>> struct op_ring { > >>>>>> caam_dma_addr_t desc; > >>>>>> uint32_t status; > >>>>>> @@ -102,6 +114,19 @@ struct result { > >>>>>> uint32_t status; > >>>>>> }; > >>>>>> > >>>>>> +/* > >>>>>> + * struct caam_regs - CAAM initialization register interface > >>>>>> + * > >>>>>> + * Interface to caam memory map, jobring register, jobring storage. > >>>>>> + */ > >>>>>> +struct caam_regs { > >>>>>> + ccsr_sec_t *sec; /*caam initialization registers*/ > >>>>>> + struct jr_regs *regs; /*jobring configuration registers*/ > >>>>>> + u8 jrid; /*id to identify a jobring*/ > >>>>>> + /*Private sub-storage for a single JobR*/ > >>>>>> + struct jobring jr[CONFIG_SYS_FSL_MAX_NUM_OF_SEC]; > >>>>>> +}; > >>>>>> + > >>>>>> void caam_jr_strstatus(u32 status); > >>>>>> int run_descriptor_jr(uint32_t *desc); > >>>>>> > >>>>> > >>>>> -- > >>>>> > >>>> > >>> > >> > ================================================================= > >>>>> ==== > >>>>> DENX Software Engineering GmbH, Managing Director: Wolfgang Denk > >>>>> HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, > >>>>> Germany > >>>>> Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: > >>>>> sbabic@denx.de > >>>>> > >>>> > >>> > >> > ================================================================= > >>>>> ==== > > > -- > ================================================================= > ==== > DENX Software Engineering GmbH, Managing Director: Wolfgang Denk > HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany > Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic@denx.de > ================================================================= > ====
Hi, On 03.03.22 14:41, Gaurav Jain wrote: > Hi Stefano > > As we have not received any response from imx6dl_mamoj board maintainer. > I propose the below solution > > --- a/arch/arm/mach-imx/Kconfig > +++ b/arch/arm/mach-imx/Kconfig > @@ -49,8 +49,8 @@ config USE_IMXIMG_PLUGIN config IMX_HAB > - select FSL_CAAM if HAS_CAAM > - imply CMD_DEKBLOB if HAS_CAAM > + imply FSL_CAAM if HAS_CAAM > + imply CMD_DEKBLOB if FSL_CAAM > Help > IMO this is ok, I was also wrong, Marek is not the maintainer of this board. This was the only board with broken build - let's say, I will still wait a couple of days, and if there is no comments, I will apply your series (but then V10). I can apply this fix myself, no need to post the series again (I have not seen any other comment or request to change). Regards, Stefano > --- a/configs/imx6dl_mamoj_defconfig > +++ b/configs/imx6dl_mamoj_defconfig > @@ -59,3 +59,4 @@ CONFIG_USB_GADGET_MANUFACTURER="FSL" > +CONFIG_FSL_CAAM=n > > Need your help to review this or suggest any other solution. > > Regards > Gaurav Jain > >> -----Original Message----- >> From: Stefano Babic <sbabic@denx.de> >> Sent: Thursday, March 3, 2022 6:32 PM >> To: Gaurav Jain <gaurav.jain@nxp.com>; Stefano Babic <sbabic@denx.de>; u- >> boot@lists.denx.de; Marek Vasut <marex@denx.de> >> Cc: Fabio Estevam <festevam@gmail.com>; Peng Fan <peng.fan@nxp.com>; >> Simon Glass <sjg@chromium.org>; Priyanka Jain <priyanka.jain@nxp.com>; Ye >> Li <ye.li@nxp.com>; Horia Geanta <horia.geanta@nxp.com>; Ji Luo >> <ji.luo@nxp.com>; Franck Lenormand <franck.lenormand@nxp.com>; Silvano Di >> Ninno <silvano.dininno@nxp.com>; Sahil Malhotra <sahil.malhotra@nxp.com>; >> Pankaj Gupta <pankaj.gupta@nxp.com>; Varun Sethi <V.Sethi@nxp.com>; dl- >> uboot-imx <uboot-imx@nxp.com>; Shengzhou Liu <shengzhou.liu@nxp.com>; >> Mingkai Hu <mingkai.hu@nxp.com>; Rajesh Bhagat <rajesh.bhagat@nxp.com>; >> Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>; Wasim Khan >> <wasim.khan@nxp.com>; Alison Wang <alison.wang@nxp.com>; Pramod >> Kumar <pramod.kumar_1@nxp.com>; Andy Tang <andy.tang@nxp.com>; >> Adrian Alonso <adrian.alonso@nxp.com>; Vladimir Oltean <olteanv@gmail.com> >> Subject: Re: [EXT] Re: [PATCH v8 01/15] crypto/fsl: Add support for CAAM Job >> ring driver model >> >> Caution: EXT Email >> >> On 03.03.22 13:44, Gaurav Jain wrote: >>> Hello Stefano >>> >>> A gentle reminder!! >>> Need your help to check the proposed solution to fix imx6dl_mamoj SPL size >> issue shared in last mail. >> >> Ouch...is there a solution ? I confess I have not seen, is there an answer by >> Marek ? >> >> Regards, >> Stefano >> >>> >>> Regards >>> Gaurav Jain >>> >>>> -----Original Message----- >>>> From: Gaurav Jain >>>> Sent: Friday, February 25, 2022 12:33 PM >>>> To: Stefano Babic <sbabic@denx.de>; u-boot@lists.denx.de; Marek Vasut >>>> <marex@denx.de> >>>> Cc: Fabio Estevam <festevam@gmail.com>; Peng Fan <peng.fan@nxp.com>; >>>> Simon Glass <sjg@chromium.org>; Priyanka Jain >>>> <priyanka.jain@nxp.com>; Ye Li <ye.li@nxp.com>; Horia Geanta >>>> <horia.geanta@nxp.com>; Ji Luo <ji.luo@nxp.com>; Franck Lenormand >>>> <franck.lenormand@nxp.com>; Silvano Di Ninno >>>> <silvano.dininno@nxp.com>; Sahil Malhotra <sahil.malhotra@nxp.com>; >>>> Pankaj Gupta <pankaj.gupta@nxp.com>; Varun Sethi <V.Sethi@nxp.com>; >>>> dl- uboot-imx <uboot-imx@nxp.com>; Shengzhou Liu >>>> <shengzhou.liu@nxp.com>; Mingkai Hu <mingkai.hu@nxp.com>; Rajesh >>>> Bhagat <rajesh.bhagat@nxp.com>; Meenakshi Aggarwal >>>> <meenakshi.aggarwal@nxp.com>; Wasim Khan <wasim.khan@nxp.com>; >> Alison >>>> Wang <alison.wang@nxp.com>; Pramod Kumar >> <pramod.kumar_1@nxp.com>; >>>> Andy Tang <andy.tang@nxp.com>; Adrian Alonso <adrian.alonso@nxp.com>; >>>> Vladimir Oltean <olteanv@gmail.com> >>>> Subject: RE: [EXT] Re: [PATCH v8 01/15] crypto/fsl: Add support for >>>> CAAM Job ring driver model >>>> >>>> Hello Stefano >>>> >>>>> -----Original Message----- >>>>> From: Gaurav Jain >>>>> Sent: Friday, February 11, 2022 3:09 PM >>>>> To: Stefano Babic <sbabic@denx.de>; u-boot@lists.denx.de; Marek >>>>> Vasut <marex@denx.de> >>>>> Cc: Fabio Estevam <festevam@gmail.com>; Peng Fan <peng.fan@nxp.com>; >>>>> Simon Glass <sjg@chromium.org>; Priyanka Jain >>>>> <priyanka.jain@nxp.com>; Ye Li <ye.li@nxp.com>; Horia Geanta >>>>> <horia.geanta@nxp.com>; Ji Luo <ji.luo@nxp.com>; Franck Lenormand >>>>> <franck.lenormand@nxp.com>; Silvano Di Ninno >>>>> <silvano.dininno@nxp.com>; Sahil Malhotra <sahil.malhotra@nxp.com>; >>>>> Pankaj Gupta <pankaj.gupta@nxp.com>; Varun Sethi <V.Sethi@nxp.com>; >>>>> dl- uboot-imx <uboot-imx@nxp.com>; Shengzhou Liu >>>>> <shengzhou.liu@nxp.com>; Mingkai Hu <mingkai.hu@nxp.com>; Rajesh >>>>> Bhagat <rajesh.bhagat@nxp.com>; Meenakshi Aggarwal >>>>> <meenakshi.aggarwal@nxp.com>; Wasim Khan <wasim.khan@nxp.com>; >>>> Alison >>>>> Wang <alison.wang@nxp.com>; Pramod Kumar >>>> <pramod.kumar_1@nxp.com>; >>>>> Andy Tang <andy.tang@nxp.com>; Adrian Alonso >>>>> <adrian.alonso@nxp.com>; Vladimir Oltean <olteanv@gmail.com> >>>>> Subject: RE: [EXT] Re: [PATCH v8 01/15] crypto/fsl: Add support for >>>>> CAAM Job ring driver model >>>>> >>>>> Hello Marek >>>>> >>>>> A gentle reminder!! >>>>> Please help to check if some feature can be dropped in SPL from >>>>> imx6dl_mamoj board so that CAAM driver model patches can be accepted. >>>>> >>>>> Regards >>>>> Gaurav Jain >>>>> >>>>>> -----Original Message----- >>>>>> From: Gaurav Jain >>>>>> Sent: Monday, February 7, 2022 12:43 PM >>>>>> To: Stefano Babic <sbabic@denx.de>; u-boot@lists.denx.de; Marek >>>>>> Vasut <marex@denx.de> >>>>>> Cc: Fabio Estevam <festevam@gmail.com>; Peng Fan >>>>>> <peng.fan@nxp.com>; Simon Glass <sjg@chromium.org>; Priyanka Jain >>>>>> <priyanka.jain@nxp.com>; Ye Li <ye.li@nxp.com>; Horia Geanta >>>>>> <horia.geanta@nxp.com>; Ji Luo <ji.luo@nxp.com>; Franck Lenormand >>>>>> <franck.lenormand@nxp.com>; Silvano Di Ninno >>>>>> <silvano.dininno@nxp.com>; Sahil Malhotra <sahil.malhotra@nxp.com>; >>>>>> Pankaj Gupta <pankaj.gupta@nxp.com>; Varun Sethi <V.Sethi@nxp.com>; >>>>>> dl- uboot-imx <uboot-imx@nxp.com>; Shengzhou Liu >>>>>> <shengzhou.liu@nxp.com>; Mingkai Hu <mingkai.hu@nxp.com>; Rajesh >>>>>> Bhagat <rajesh.bhagat@nxp.com>; Meenakshi Aggarwal >>>>>> <meenakshi.aggarwal@nxp.com>; Wasim Khan <wasim.khan@nxp.com>; >>>>> Alison >>>>>> Wang <alison.wang@nxp.com>; Pramod Kumar >>>>> <pramod.kumar_1@nxp.com>; >>>>>> Andy Tang <andy.tang@nxp.com>; Adrian Alonso >>>>>> <adrian.alonso@nxp.com>; Vladimir Oltean <olteanv@gmail.com> >>>>>> Subject: RE: [EXT] Re: [PATCH v8 01/15] crypto/fsl: Add support for >>>>>> CAAM Job ring driver model >>>>>> >>>>>> Hello Marek >>>>>> >>>>>>> -----Original Message----- >>>>>>> From: Stefano Babic <sbabic@denx.de> >>>>>>> Sent: Saturday, February 5, 2022 7:46 PM >>>>>>> To: Gaurav Jain <gaurav.jain@nxp.com>; u-boot@lists.denx.de >>>>>>> Cc: Stefano Babic <sbabic@denx.de>; Fabio Estevam >>>>>>> <festevam@gmail.com>; Peng Fan <peng.fan@nxp.com>; Simon Glass >>>>>>> <sjg@chromium.org>; Priyanka Jain <priyanka.jain@nxp.com>; Ye Li >>>>>>> <ye.li@nxp.com>; Horia Geanta <horia.geanta@nxp.com>; Ji Luo >>>>>>> <ji.luo@nxp.com>; Franck Lenormand <franck.lenormand@nxp.com>; >>>>>>> Silvano Di Ninno <silvano.dininno@nxp.com>; Sahil Malhotra >>>>>>> <sahil.malhotra@nxp.com>; Pankaj Gupta <pankaj.gupta@nxp.com>; >>>>>>> Varun Sethi <V.Sethi@nxp.com>; dl-uboot-imx <uboot-imx@nxp.com>; >>>>>>> Shengzhou Liu <shengzhou.liu@nxp.com>; Mingkai Hu >>>>>>> <mingkai.hu@nxp.com>; Rajesh Bhagat <rajesh.bhagat@nxp.com>; >>>>>>> Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>; Wasim Khan >>>>>>> <wasim.khan@nxp.com>; >>>>>> Alison >>>>>>> Wang <alison.wang@nxp.com>; Pramod Kumar >>>>>> <pramod.kumar_1@nxp.com>; >>>>>>> Andy Tang <andy.tang@nxp.com>; Adrian Alonso >>>>>>> <adrian.alonso@nxp.com>; Vladimir Oltean <olteanv@gmail.com>; >>>>>>> Marek Vasut <marex@denx.de> >>>>>>> Subject: [EXT] Re: [PATCH v8 01/15] crypto/fsl: Add support for >>>>>>> CAAM Job ring driver model >>>>>>> >>>>>>> Caution: EXT Email >>>>>>> >>>>>>> Hi Gaurav, >>>>>>> >>>>>>> rather I still have issues to run CI with this applied. The reason >>>>>>> is that this adds an overhead to SPL and it breaks the board >>>>>>> imx6dl_mamoj because SPL exceeds the maximum size for a DL SOC. >>>>>>> >>>>>>> See >>>>>>> https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2F >>>>>>> so >>>>>>> ur >>>>>>> ce.d >>>>>>> enx.de%2Fu-boot%2Fcustodians%2Fu-boot-imx%2F- >>>>>>> %2Fjobs%2F387370&data=04%7C01%7Cgaurav.jain%40nxp.com%7 >> C >>>> 3a >>>>> 2 >>>>>> 73 >>>>>>> >>>>>> >>>>> >>>> >> 1dd27fc4bebcad308d9e8b21464%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C >>>>>>> >>>>>> >>>>> >>>> >> 0%7C0%7C637796673834942697%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4 >>>>>>> >>>>>> >>>>> >>>> >> wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000&am >>>>>>> >>>>>> >>>>> >>>> >> p;sdata=pI%2F%2FlNtrdrGCa8sSvcr6uNu4jze7pzDqZtI52FIDj50%3D&reserv >>>> e >>>>>>> d=0 >>>>>>> >>>>>>> I do not know if it is possible to drop some features from SPL for >>>>>>> this board (Added Marek as board maintainer). >>>> >>>> As we have not received any response from imx6dl_mamoj board maintainer. >>>> I propose the below solution >>>> >>>> --- a/arch/arm/mach-imx/Kconfig >>>> +++ b/arch/arm/mach-imx/Kconfig >>>> @@ -49,8 +49,8 @@ config USE_IMXIMG_PLUGIN config IMX_HAB >>>> - select FSL_CAAM if HAS_CAAM >>>> - imply CMD_DEKBLOB if HAS_CAAM >>>> + imply FSL_CAAM if HAS_CAAM >>>> + imply CMD_DEKBLOB if FSL_CAAM >>>> Help >>>> >>>> --- a/configs/imx6dl_mamoj_defconfig >>>> +++ b/configs/imx6dl_mamoj_defconfig >>>> @@ -59,3 +59,4 @@ CONFIG_USB_GADGET_MANUFACTURER="FSL" >>>> +CONFIG_FSL_CAAM=n >>>> >>>> Need your help to review this or suggest any other solution. >>>> >>>> Regards >>>> Gaurav Jain >>>> >>>>>> >>>>>> CONFIG_IMX_HAB is enabled for imx6dl_mamoj. So CAAM is built for >>>>>> SPL, results in increased size. >>>>>> However CAAM is not initialized in SPL. As Stefano suggested, Can >>>>>> you drop some features from SPL? >>>>>> >>>>>> Regards >>>>>> Gaurav Jain >>>>>>> >>>>>>> Best regards, >>>>>>> Stefano >>>>>>> >>>>>>> On 10.01.22 13:27, Gaurav Jain wrote: >>>>>>>> added device tree support for job ring driver. >>>>>>>> sec is initialized based on job ring information processed from >>>>>>>> device tree. >>>>>>>> >>>>>>>> Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com> >>>>>>>> Reviewed-by: Ye Li <ye.li@nxp.com> >>>>>>>> --- >>>>>>>> drivers/crypto/fsl/jr.c | 323 ++++++++++++++++++++++++++------------- >> - >>>>>>>> drivers/crypto/fsl/jr.h | 31 +++- >>>>>>>> 2 files changed, 240 insertions(+), 114 deletions(-) >>>>>>>> >>>>>>>> diff --git a/drivers/crypto/fsl/jr.c b/drivers/crypto/fsl/jr.c >>>>>>>> index >>>>>>>> 22b649219e..8103987425 100644 >>>>>>>> --- a/drivers/crypto/fsl/jr.c >>>>>>>> +++ b/drivers/crypto/fsl/jr.c >>>>>>>> @@ -1,7 +1,7 @@ >>>>>>>> // SPDX-License-Identifier: GPL-2.0+ >>>>>>>> /* >>>>>>>> * Copyright 2008-2014 Freescale Semiconductor, Inc. >>>>>>>> - * Copyright 2018 NXP >>>>>>>> + * Copyright 2018, 2021 NXP >>>>>>>> * >>>>>>>> * Based on CAAM driver in drivers/crypto/caam in Linux >>>>>>>> */ >>>>>>>> @@ -11,7 +11,6 @@ >>>>>>>> #include <linux/kernel.h> >>>>>>>> #include <log.h> >>>>>>>> #include <malloc.h> >>>>>>>> -#include "fsl_sec.h" >>>>>>>> #include "jr.h" >>>>>>>> #include "jobdesc.h" >>>>>>>> #include "desc_constr.h" >>>>>>>> @@ -21,7 +20,10 @@ >>>>>>>> #include <asm/cache.h> >>>>>>>> #include <asm/fsl_pamu.h> >>>>>>>> #endif >>>>>>>> +#include <dm.h> >>>>>>>> #include <dm/lists.h> >>>>>>>> +#include <dm/root.h> >>>>>>>> +#include <dm/device-internal.h> >>>>>>>> #include <linux/delay.h> >>>>>>>> >>>>>>>> #define CIRC_CNT(head, tail, size) (((head) - (tail)) & (size >>>>>>>> - >>>>>>>> 1)) @@ -35,20 +37,29 @@ uint32_t >>>>>>> sec_offset[CONFIG_SYS_FSL_MAX_NUM_OF_SEC] = { >>>>>>>> #endif >>>>>>>> }; >>>>>>>> >>>>>>>> +#if CONFIG_IS_ENABLED(DM) >>>>>>>> +struct udevice *caam_dev; >>>>>>>> +#else >>>>>>>> #define SEC_ADDR(idx) \ >>>>>>>> (ulong)((CONFIG_SYS_FSL_SEC_ADDR + sec_offset[idx])) >>>>>>>> >>>>>>>> #define SEC_JR0_ADDR(idx) \ >>>>>>>> (ulong)(SEC_ADDR(idx) + \ >>>>>>>> (CONFIG_SYS_FSL_JR0_OFFSET - CONFIG_SYS_FSL_SEC_OFFSET)) >>>>>>>> +struct caam_regs caam_st; >>>>>>>> +#endif >>>>>>>> >>>>>>>> -struct jobring jr0[CONFIG_SYS_FSL_MAX_NUM_OF_SEC]; >>>>>>>> +static inline u32 jr_start_reg(u8 jrid) { >>>>>>>> + return (1 << jrid); >>>>>>>> +} >>>>>>>> >>>>>>>> -static inline void start_jr0(uint8_t sec_idx) >>>>>>>> +static inline void start_jr(struct caam_regs *caam) >>>>>>>> { >>>>>>>> - ccsr_sec_t *sec = (void *)SEC_ADDR(sec_idx); >>>>>>>> + ccsr_sec_t *sec = caam->sec; >>>>>>>> u32 ctpr_ms = sec_in32(&sec->ctpr_ms); >>>>>>>> u32 scfgr = sec_in32(&sec->scfgr); >>>>>>>> + u32 jrstart = jr_start_reg(caam->jrid); >>>>>>>> >>>>>>>> if (ctpr_ms & SEC_CTPR_MS_VIRT_EN_INCL) { >>>>>>>> /* VIRT_EN_INCL = 1 & VIRT_EN_POR = 1 or @@ -56,23 >>>>>>>> +67,16 @@ static inline void start_jr0(uint8_t sec_idx) >>>>>>>> */ >>>>>>>> if ((ctpr_ms & SEC_CTPR_MS_VIRT_EN_POR) || >>>>>>>> (scfgr & SEC_SCFGR_VIRT_EN)) >>>>>>>> - sec_out32(&sec->jrstartr, CONFIG_JRSTARTR_JR0); >>>>>>>> + sec_out32(&sec->jrstartr, jrstart); >>>>>>>> } else { >>>>>>>> /* VIRT_EN_INCL = 0 && VIRT_EN_POR_VALUE = 1 */ >>>>>>>> if (ctpr_ms & SEC_CTPR_MS_VIRT_EN_POR) >>>>>>>> - sec_out32(&sec->jrstartr, CONFIG_JRSTARTR_JR0); >>>>>>>> + sec_out32(&sec->jrstartr, jrstart); >>>>>>>> } >>>>>>>> } >>>>>>>> >>>>>>>> -static inline void jr_reset_liodn(uint8_t sec_idx) >>>>>>>> +static inline void jr_disable_irq(struct jr_regs *regs) >>>>>>>> { >>>>>>>> - ccsr_sec_t *sec = (void *)SEC_ADDR(sec_idx); >>>>>>>> - sec_out32(&sec->jrliodnr[0].ls, 0); >>>>>>>> -} >>>>>>>> - >>>>>>>> -static inline void jr_disable_irq(uint8_t sec_idx) -{ >>>>>>>> - struct jr_regs *regs = (struct jr_regs *)SEC_JR0_ADDR(sec_idx); >>>>>>>> uint32_t jrcfg = sec_in32(®s->jrcfg1); >>>>>>>> >>>>>>>> jrcfg = jrcfg | JR_INTMASK; @@ -80,10 +84,10 @@ static >>>>>>>> inline void jr_disable_irq(uint8_t sec_idx) >>>>>>>> sec_out32(®s->jrcfg1, jrcfg); >>>>>>>> } >>>>>>>> >>>>>>>> -static void jr_initregs(uint8_t sec_idx) >>>>>>>> +static void jr_initregs(uint8_t sec_idx, struct caam_regs >>>>>>>> +*caam) >>>>>>>> { >>>>>>>> - struct jr_regs *regs = (struct jr_regs *)SEC_JR0_ADDR(sec_idx); >>>>>>>> - struct jobring *jr = &jr0[sec_idx]; >>>>>>>> + struct jr_regs *regs = caam->regs; >>>>>>>> + struct jobring *jr = &caam->jr[sec_idx]; >>>>>>>> caam_dma_addr_t ip_base = virt_to_phys((void *)jr->input_ring); >>>>>>>> caam_dma_addr_t op_base = virt_to_phys((void >>>>>>>> *)jr->output_ring); >>>>>>>> >>>>>>>> @@ -103,16 +107,16 @@ static void jr_initregs(uint8_t sec_idx) >>>>>>>> sec_out32(®s->irs, JR_SIZE); >>>>>>>> >>>>>>>> if (!jr->irq) >>>>>>>> - jr_disable_irq(sec_idx); >>>>>>>> + jr_disable_irq(regs); >>>>>>>> } >>>>>>>> >>>>>>>> -static int jr_init(uint8_t sec_idx) >>>>>>>> +static int jr_init(uint8_t sec_idx, struct caam_regs *caam) >>>>>>>> { >>>>>>>> - struct jobring *jr = &jr0[sec_idx]; >>>>>>>> + struct jobring *jr = &caam->jr[sec_idx]; >>>>>>>> >>>>>>>> memset(jr, 0, sizeof(struct jobring)); >>>>>>>> >>>>>>>> - jr->jq_id = DEFAULT_JR_ID; >>>>>>>> + jr->jq_id = caam->jrid; >>>>>>>> jr->irq = DEFAULT_IRQ; >>>>>>>> >>>>>>>> #ifdef CONFIG_FSL_CORENET >>>>>>>> @@ -134,53 +138,8 @@ static int jr_init(uint8_t sec_idx) >>>>>>>> memset(jr->input_ring, 0, JR_SIZE * sizeof(caam_dma_addr_t)); >>>>>>>> memset(jr->output_ring, 0, jr->op_size); >>>>>>>> >>>>>>>> - start_jr0(sec_idx); >>>>>>>> - >>>>>>>> - jr_initregs(sec_idx); >>>>>>>> - >>>>>>>> - return 0; >>>>>>>> -} >>>>>>>> - >>>>>>>> -static int jr_sw_cleanup(uint8_t sec_idx) -{ >>>>>>>> - struct jobring *jr = &jr0[sec_idx]; >>>>>>>> - >>>>>>>> - jr->head = 0; >>>>>>>> - jr->tail = 0; >>>>>>>> - jr->read_idx = 0; >>>>>>>> - jr->write_idx = 0; >>>>>>>> - memset(jr->info, 0, sizeof(jr->info)); >>>>>>>> - memset(jr->input_ring, 0, jr->size * sizeof(caam_dma_addr_t)); >>>>>>>> - memset(jr->output_ring, 0, jr->size * sizeof(struct op_ring)); >>>>>>>> - >>>>>>>> - return 0; >>>>>>>> -} >>>>>>>> - >>>>>>>> -static int jr_hw_reset(uint8_t sec_idx) -{ >>>>>>>> - struct jr_regs *regs = (struct jr_regs *)SEC_JR0_ADDR(sec_idx); >>>>>>>> - uint32_t timeout = 100000; >>>>>>>> - uint32_t jrint, jrcr; >>>>>>>> - >>>>>>>> - sec_out32(®s->jrcr, JRCR_RESET); >>>>>>>> - do { >>>>>>>> - jrint = sec_in32(®s->jrint); >>>>>>>> - } while (((jrint & JRINT_ERR_HALT_MASK) == >>>>>>>> - JRINT_ERR_HALT_INPROGRESS) && --timeout); >>>>>>>> - >>>>>>>> - jrint = sec_in32(®s->jrint); >>>>>>>> - if (((jrint & JRINT_ERR_HALT_MASK) != >>>>>>>> - JRINT_ERR_HALT_INPROGRESS) && timeout == 0) >>>>>>>> - return -1; >>>>>>>> - >>>>>>>> - timeout = 100000; >>>>>>>> - sec_out32(®s->jrcr, JRCR_RESET); >>>>>>>> - do { >>>>>>>> - jrcr = sec_in32(®s->jrcr); >>>>>>>> - } while ((jrcr & JRCR_RESET) && --timeout); >>>>>>>> - >>>>>>>> - if (timeout == 0) >>>>>>>> - return -1; >>>>>>>> + start_jr(caam); >>>>>>>> + jr_initregs(sec_idx, caam); >>>>>>>> >>>>>>>> return 0; >>>>>>>> } >>>>>>>> @@ -188,10 +147,10 @@ static int jr_hw_reset(uint8_t sec_idx) >>>>>>>> /* -1 --- error, can't enqueue -- no space available */ >>>>>>>> static int jr_enqueue(uint32_t *desc_addr, >>>>>>>> void (*callback)(uint32_t status, void *arg), >>>>>>>> - void *arg, uint8_t sec_idx) >>>>>>>> + void *arg, uint8_t sec_idx, struct caam_regs *caam) >>>>>>>> { >>>>>>>> - struct jr_regs *regs = (struct jr_regs *)SEC_JR0_ADDR(sec_idx); >>>>>>>> - struct jobring *jr = &jr0[sec_idx]; >>>>>>>> + struct jr_regs *regs = caam->regs; >>>>>>>> + struct jobring *jr = &caam->jr[sec_idx]; >>>>>>>> int head = jr->head; >>>>>>>> uint32_t desc_word; >>>>>>>> int length = desc_len(desc_addr); @@ -263,10 +222,10 @@ >>>>>>>> static int jr_enqueue(uint32_t *desc_addr, >>>>>>>> return 0; >>>>>>>> } >>>>>>>> >>>>>>>> -static int jr_dequeue(int sec_idx) >>>>>>>> +static int jr_dequeue(int sec_idx, struct caam_regs *caam) >>>>>>>> { >>>>>>>> - struct jr_regs *regs = (struct jr_regs *)SEC_JR0_ADDR(sec_idx); >>>>>>>> - struct jobring *jr = &jr0[sec_idx]; >>>>>>>> + struct jr_regs *regs = caam->regs; >>>>>>>> + struct jobring *jr = &caam->jr[sec_idx]; >>>>>>>> int head = jr->head; >>>>>>>> int tail = jr->tail; >>>>>>>> int idx, i, found; >>>>>>>> @@ -349,14 +308,18 @@ static void desc_done(uint32_t status, void >>>> *arg) >>>>>>>> { >>>>>>>> struct result *x = arg; >>>>>>>> x->status = status; >>>>>>>> -#ifndef CONFIG_SPL_BUILD >>>>>>>> caam_jr_strstatus(status); -#endif >>>>>>>> x->done = 1; >>>>>>>> } >>>>>>>> >>>>>>>> static inline int run_descriptor_jr_idx(uint32_t *desc, uint8_t sec_idx) >>>>>>>> { >>>>>>>> + struct caam_regs *caam; >>>>>>>> +#if CONFIG_IS_ENABLED(DM) >>>>>>>> + caam = dev_get_priv(caam_dev); #else >>>>>>>> + caam = &caam_st; >>>>>>>> +#endif >>>>>>>> unsigned long long timeval = 0; >>>>>>>> unsigned long long timeout = CONFIG_USEC_DEQ_TIMEOUT; >>>>>>>> struct result op; >>>>>>>> @@ -364,7 +327,7 @@ static inline int >>>>>>>> run_descriptor_jr_idx(uint32_t *desc, uint8_t sec_idx) >>>>>>>> >>>>>>>> memset(&op, 0, sizeof(op)); >>>>>>>> >>>>>>>> - ret = jr_enqueue(desc, desc_done, &op, sec_idx); >>>>>>>> + ret = jr_enqueue(desc, desc_done, &op, sec_idx, caam); >>>>>>>> if (ret) { >>>>>>>> debug("Error in SEC enq\n"); >>>>>>>> ret = JQ_ENQ_ERR; >>>>>>>> @@ -375,7 +338,7 @@ static inline int >>>>>>>> run_descriptor_jr_idx(uint32_t *desc, >>>>>>> uint8_t sec_idx) >>>>>>>> udelay(1); >>>>>>>> timeval += 1; >>>>>>>> >>>>>>>> - ret = jr_dequeue(sec_idx); >>>>>>>> + ret = jr_dequeue(sec_idx, caam); >>>>>>>> if (ret) { >>>>>>>> debug("Error in SEC deq\n"); >>>>>>>> ret = JQ_DEQ_ERR; @@ -402,13 +365,62 @@ >>>>>>>> int run_descriptor_jr(uint32_t *desc) >>>>>>>> return run_descriptor_jr_idx(desc, 0); >>>>>>>> } >>>>>>>> >>>>>>>> +static int jr_sw_cleanup(uint8_t sec_idx, struct caam_regs *caam) { >>>>>>>> + struct jobring *jr = &caam->jr[sec_idx]; >>>>>>>> + >>>>>>>> + jr->head = 0; >>>>>>>> + jr->tail = 0; >>>>>>>> + jr->read_idx = 0; >>>>>>>> + jr->write_idx = 0; >>>>>>>> + memset(jr->info, 0, sizeof(jr->info)); >>>>>>>> + memset(jr->input_ring, 0, jr->size * sizeof(caam_dma_addr_t)); >>>>>>>> + memset(jr->output_ring, 0, jr->size * sizeof(struct >>>>>>>> + op_ring)); >>>>>>>> + >>>>>>>> + return 0; >>>>>>>> +} >>>>>>>> + >>>>>>>> +static int jr_hw_reset(struct jr_regs *regs) { >>>>>>>> + uint32_t timeout = 100000; >>>>>>>> + uint32_t jrint, jrcr; >>>>>>>> + >>>>>>>> + sec_out32(®s->jrcr, JRCR_RESET); >>>>>>>> + do { >>>>>>>> + jrint = sec_in32(®s->jrint); >>>>>>>> + } while (((jrint & JRINT_ERR_HALT_MASK) == >>>>>>>> + JRINT_ERR_HALT_INPROGRESS) && --timeout); >>>>>>>> + >>>>>>>> + jrint = sec_in32(®s->jrint); >>>>>>>> + if (((jrint & JRINT_ERR_HALT_MASK) != >>>>>>>> + JRINT_ERR_HALT_INPROGRESS) && timeout == 0) >>>>>>>> + return -1; >>>>>>>> + >>>>>>>> + timeout = 100000; >>>>>>>> + sec_out32(®s->jrcr, JRCR_RESET); >>>>>>>> + do { >>>>>>>> + jrcr = sec_in32(®s->jrcr); >>>>>>>> + } while ((jrcr & JRCR_RESET) && --timeout); >>>>>>>> + >>>>>>>> + if (timeout == 0) >>>>>>>> + return -1; >>>>>>>> + >>>>>>>> + return 0; >>>>>>>> +} >>>>>>>> + >>>>>>>> static inline int jr_reset_sec(uint8_t sec_idx) >>>>>>>> { >>>>>>>> - if (jr_hw_reset(sec_idx) < 0) >>>>>>>> + struct caam_regs *caam; >>>>>>>> +#if CONFIG_IS_ENABLED(DM) >>>>>>>> + caam = dev_get_priv(caam_dev); #else >>>>>>>> + caam = &caam_st; >>>>>>>> +#endif >>>>>>>> + if (jr_hw_reset(caam->regs) < 0) >>>>>>>> return -1; >>>>>>>> >>>>>>>> /* Clean up the jobring structure maintained by software */ >>>>>>>> - jr_sw_cleanup(sec_idx); >>>>>>>> + jr_sw_cleanup(sec_idx, caam); >>>>>>>> >>>>>>>> return 0; >>>>>>>> } >>>>>>>> @@ -418,9 +430,15 @@ int jr_reset(void) >>>>>>>> return jr_reset_sec(0); >>>>>>>> } >>>>>>>> >>>>>>>> -static inline int sec_reset_idx(uint8_t sec_idx) >>>>>>>> +int sec_reset(void) >>>>>>>> { >>>>>>>> - ccsr_sec_t *sec = (void *)SEC_ADDR(sec_idx); >>>>>>>> + struct caam_regs *caam; >>>>>>>> +#if CONFIG_IS_ENABLED(DM) >>>>>>>> + caam = dev_get_priv(caam_dev); #else >>>>>>>> + caam = &caam_st; >>>>>>>> +#endif >>>>>>>> + ccsr_sec_t *sec = caam->sec; >>>>>>>> uint32_t mcfgr = sec_in32(&sec->mcfgr); >>>>>>>> uint32_t timeout = 100000; >>>>>>>> >>>>>>>> @@ -446,11 +464,7 @@ static inline int sec_reset_idx(uint8_t >>>>>>>> sec_idx) >>>>>>>> >>>>>>>> return 0; >>>>>>>> } >>>>>>>> -int sec_reset(void) >>>>>>>> -{ >>>>>>>> - return sec_reset_idx(0); >>>>>>>> -} >>>>>>>> -#ifndef CONFIG_SPL_BUILD >>>>>>>> + >>>>>>>> static int deinstantiate_rng(u8 sec_idx, int state_handle_mask) >>>>>>>> { >>>>>>>> u32 *desc; >>>>>>>> @@ -496,12 +510,11 @@ static int deinstantiate_rng(u8 sec_idx, >>>>>>>> int >>>>>>> state_handle_mask) >>>>>>>> return ret; >>>>>>>> } >>>>>>>> >>>>>>>> -static int instantiate_rng(u8 sec_idx, int gen_sk) >>>>>>>> +static int instantiate_rng(uint8_t sec_idx, ccsr_sec_t *sec, int >>>>>>>> +gen_sk) >>>>>>>> { >>>>>>>> u32 *desc; >>>>>>>> u32 rdsta_val; >>>>>>>> int ret = 0, sh_idx, size; >>>>>>>> - ccsr_sec_t __iomem *sec = (ccsr_sec_t __iomem >>>> *)SEC_ADDR(sec_idx); >>>>>>>> struct rng4tst __iomem *rng = >>>>>>>> (struct rng4tst __iomem *)&sec->rng; >>>>>>>> >>>>>>>> @@ -554,9 +567,8 @@ static int instantiate_rng(u8 sec_idx, int gen_sk) >>>>>>>> return ret; >>>>>>>> } >>>>>>>> >>>>>>>> -static u8 get_rng_vid(uint8_t sec_idx) >>>>>>>> +static u8 get_rng_vid(ccsr_sec_t *sec) >>>>>>>> { >>>>>>>> - ccsr_sec_t *sec = (void *)SEC_ADDR(sec_idx); >>>>>>>> u8 vid; >>>>>>>> >>>>>>>> if (caam_get_era() < 10) { @@ -574,9 +586,8 @@ static u8 >>>>>>>> get_rng_vid(uint8_t sec_idx) >>>>>>>> * By default, the TRNG runs for 200 clocks per sample; >>>>>>>> * 1200 clocks per sample generates better entropy. >>>>>>>> */ >>>>>>>> -static void kick_trng(int ent_delay, uint8_t sec_idx) >>>>>>>> +static void kick_trng(int ent_delay, ccsr_sec_t *sec) >>>>>>>> { >>>>>>>> - ccsr_sec_t __iomem *sec = (ccsr_sec_t __iomem >>>> *)SEC_ADDR(sec_idx); >>>>>>>> struct rng4tst __iomem *rng = >>>>>>>> (struct rng4tst __iomem *)&sec->rng; >>>>>>>> u32 val; >>>>>>>> @@ -603,10 +614,9 @@ static void kick_trng(int ent_delay, uint8_t >>>>> sec_idx) >>>>>>>> sec_clrbits32(&rng->rtmctl, RTMCTL_PRGM); >>>>>>>> } >>>>>>>> >>>>>>>> -static int rng_init(uint8_t sec_idx) >>>>>>>> +static int rng_init(uint8_t sec_idx, ccsr_sec_t *sec) >>>>>>>> { >>>>>>>> int ret, gen_sk, ent_delay = RTSDCTL_ENT_DLY_MIN; >>>>>>>> - ccsr_sec_t __iomem *sec = (ccsr_sec_t __iomem >>>> *)SEC_ADDR(sec_idx); >>>>>>>> struct rng4tst __iomem *rng = >>>>>>>> (struct rng4tst __iomem *)&sec->rng; >>>>>>>> u32 inst_handles; >>>>>>>> @@ -624,7 +634,7 @@ static int rng_init(uint8_t sec_idx) >>>>>>>> * the TRNG parameters. >>>>>>>> */ >>>>>>>> if (!inst_handles) { >>>>>>>> - kick_trng(ent_delay, sec_idx); >>>>>>>> + kick_trng(ent_delay, sec); >>>>>>>> ent_delay += 400; >>>>>>>> } >>>>>>>> /* >>>>>>>> @@ -634,7 +644,7 @@ static int rng_init(uint8_t sec_idx) >>>>>>>> * interval, leading to a sucessful initialization of >>>>>>>> * the RNG. >>>>>>>> */ >>>>>>>> - ret = instantiate_rng(sec_idx, gen_sk); >>>>>>>> + ret = instantiate_rng(sec_idx, sec, gen_sk); >>>>>>>> } while ((ret == -1) && (ent_delay < RTSDCTL_ENT_DLY_MAX)); >>>>>>>> if (ret) { >>>>>>>> printf("SEC%u: Failed to instantiate RNG\n", >>>>>>>> sec_idx); @@ -646,13 +656,28 @@ static int rng_init(uint8_t >>>>>>>> sec_idx) >>>>>>>> >>>>>>>> return ret; >>>>>>>> } >>>>>>>> -#endif >>>>>>>> + >>>>>>>> int sec_init_idx(uint8_t sec_idx) >>>>>>>> { >>>>>>>> - ccsr_sec_t *sec = (void *)SEC_ADDR(sec_idx); >>>>>>>> - uint32_t mcr = sec_in32(&sec->mcfgr); >>>>>>>> int ret = 0; >>>>>>>> - >>>>>>>> + struct caam_regs *caam; >>>>>>>> +#if CONFIG_IS_ENABLED(DM) >>>>>>>> + if (!caam_dev) { >>>>>>>> + printf("caam_jr: caam not found\n"); >>>>>>>> + return -1; >>>>>>>> + } >>>>>>>> + caam = dev_get_priv(caam_dev); #else >>>>>>>> + caam_st.sec = (void *)SEC_ADDR(sec_idx); >>>>>>>> + caam_st.regs = (struct jr_regs *)SEC_JR0_ADDR(sec_idx); >>>>>>>> + caam_st.jrid = 0; >>>>>>>> + caam = &caam_st; >>>>>>>> +#endif >>>>>>>> + ccsr_sec_t *sec = caam->sec; >>>>>>>> + uint32_t mcr = sec_in32(&sec->mcfgr); #if >>>>>>>> +defined(CONFIG_SPL_BUILD) && defined(CONFIG_IMX8M) >>>>>>>> + uint32_t jrdid_ms = 0; >>>>>>>> +#endif >>>>>>>> #ifdef CONFIG_FSL_CORENET >>>>>>>> uint32_t liodnr; >>>>>>>> uint32_t liodn_ns; >>>>>>>> @@ -682,6 +707,11 @@ int sec_init_idx(uint8_t sec_idx) >>>>>>>> mcr |= (1 << MCFGR_PS_SHIFT); >>>>>>>> #endif >>>>>>>> sec_out32(&sec->mcfgr, mcr); >>>>>>>> +#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_IMX8M) >>>>>>>> + jrdid_ms = JRDID_MS_TZ_OWN | JRDID_MS_PRIM_TZ | >>>>>>> JRDID_MS_PRIM_DID; >>>>>>>> + sec_out32(&sec->jrliodnr[caam->jrid].ms, jrdid_ms); #endif >>>>>>>> + jr_reset(); >>>>>>>> >>>>>>>> #ifdef CONFIG_FSL_CORENET >>>>>>>> #ifdef CONFIG_SPL_BUILD >>>>>>>> @@ -693,20 +723,19 @@ int sec_init_idx(uint8_t sec_idx) >>>>>>>> liodn_ns = CONFIG_SPL_JR0_LIODN_NS & JRNSLIODN_MASK; >>>>>>>> liodn_s = CONFIG_SPL_JR0_LIODN_S & JRSLIODN_MASK; >>>>>>>> >>>>>>>> - liodnr = sec_in32(&sec->jrliodnr[0].ls) & >>>>>>>> + liodnr = sec_in32(&sec->jrliodnr[caam->jrid].ls) & >>>>>>>> ~(JRNSLIODN_MASK | JRSLIODN_MASK); >>>>>>>> liodnr = liodnr | >>>>>>>> (liodn_ns << JRNSLIODN_SHIFT) | >>>>>>>> (liodn_s << JRSLIODN_SHIFT); >>>>>>>> - sec_out32(&sec->jrliodnr[0].ls, liodnr); >>>>>>>> + sec_out32(&sec->jrliodnr[caam->jrid].ls, liodnr); >>>>>>>> #else >>>>>>>> - liodnr = sec_in32(&sec->jrliodnr[0].ls); >>>>>>>> + liodnr = sec_in32(&sec->jrliodnr[caam->jrid].ls); >>>>>>>> liodn_ns = (liodnr & JRNSLIODN_MASK) >> JRNSLIODN_SHIFT; >>>>>>>> liodn_s = (liodnr & JRSLIODN_MASK) >> JRSLIODN_SHIFT; >>>>>>>> #endif >>>>>>>> #endif >>>>>>>> - >>>>>>>> - ret = jr_init(sec_idx); >>>>>>>> + ret = jr_init(sec_idx, caam); >>>>>>>> if (ret < 0) { >>>>>>>> printf("SEC%u: initialization failed\n", sec_idx); >>>>>>>> return -1; >>>>>>>> @@ -719,9 +748,9 @@ int sec_init_idx(uint8_t sec_idx) >>>>>>>> >>>>>>>> pamu_enable(); >>>>>>>> #endif >>>>>>>> -#ifndef CONFIG_SPL_BUILD >>>>>>>> - if (get_rng_vid(sec_idx) >= 4) { >>>>>>>> - if (rng_init(sec_idx) < 0) { >>>>>>>> + >>>>>>>> + if (get_rng_vid(caam->sec) >= 4) { >>>>>>>> + if (rng_init(sec_idx, caam->sec) < 0) { >>>>>>>> printf("SEC%u: RNG instantiation failed\n", sec_idx); >>>>>>>> return -1; >>>>>>>> } >>>>>>>> @@ -735,7 +764,6 @@ int sec_init_idx(uint8_t sec_idx) >>>>>>>> >>>>>>>> printf("SEC%u: RNG instantiated\n", sec_idx); >>>>>>>> } >>>>>>>> -#endif >>>>>>>> return ret; >>>>>>>> } >>>>>>>> >>>>>>>> @@ -743,3 +771,76 @@ int sec_init(void) >>>>>>>> { >>>>>>>> return sec_init_idx(0); >>>>>>>> } >>>>>>>> + >>>>>>>> +#if CONFIG_IS_ENABLED(DM) >>>>>>>> +static int caam_jr_ioctl(struct udevice *dev, unsigned long >>>>>>>> +request, void *buf) { >>>>>>>> + if (request != CAAM_JR_RUN_DESC) >>>>>>>> + return -ENOSYS; >>>>>>>> + >>>>>>>> + return run_descriptor_jr(buf); } >>>>>>>> + >>>>>>>> +static int caam_jr_probe(struct udevice *dev) { >>>>>>>> + struct caam_regs *caam = dev_get_priv(dev); >>>>>>>> + fdt_addr_t addr; >>>>>>>> + ofnode node; >>>>>>>> + unsigned int jr_node = 0; >>>>>>>> + >>>>>>>> + caam_dev = dev; >>>>>>>> + >>>>>>>> + addr = dev_read_addr(dev); >>>>>>>> + if (addr == FDT_ADDR_T_NONE) { >>>>>>>> + printf("caam_jr: crypto not found\n"); >>>>>>>> + return -EINVAL; >>>>>>>> + } >>>>>>>> + caam->sec = (ccsr_sec_t *)(uintptr_t)addr; >>>>>>>> + caam->regs = (struct jr_regs *)caam->sec; >>>>>>>> + >>>>>>>> + /* Check for enabled job ring node */ >>>>>>>> + ofnode_for_each_subnode(node, dev_ofnode(dev)) { >>>>>>>> + if (!ofnode_is_available(node)) >>>>>>>> + continue; >>>>>>>> + >>>>>>>> + jr_node = ofnode_read_u32_default(node, "reg", -1); >>>>>>>> + if (jr_node > 0) { >>>>>>>> + caam->regs = (struct jr_regs *)((ulong)caam->sec + jr_node); >>>>>>>> + while (!(jr_node & 0x0F)) >>>>>>>> + jr_node = jr_node >> 4; >>>>>>>> + >>>>>>>> + caam->jrid = jr_node - 1; >>>>>>>> + break; >>>>>>>> + } >>>>>>>> + } >>>>>>>> + >>>>>>>> + if (sec_init()) >>>>>>>> + printf("\nsec_init failed!\n"); >>>>>>>> + >>>>>>>> + return 0; >>>>>>>> +} >>>>>>>> + >>>>>>>> +static int caam_jr_bind(struct udevice *dev) { >>>>>>>> + return 0; >>>>>>>> +} >>>>>>>> + >>>>>>>> +static const struct misc_ops caam_jr_ops = { >>>>>>>> + .ioctl = caam_jr_ioctl, >>>>>>>> +}; >>>>>>>> + >>>>>>>> +static const struct udevice_id caam_jr_match[] = { >>>>>>>> + { .compatible = "fsl,sec-v4.0" }, >>>>>>>> + { } >>>>>>>> +}; >>>>>>>> + >>>>>>>> +U_BOOT_DRIVER(caam_jr) = { >>>>>>>> + .name = "caam_jr", >>>>>>>> + .id = UCLASS_MISC, >>>>>>>> + .of_match = caam_jr_match, >>>>>>>> + .ops = &caam_jr_ops, >>>>>>>> + .bind = caam_jr_bind, >>>>>>>> + .probe = caam_jr_probe, >>>>>>>> + .priv_auto = sizeof(struct caam_regs), >>>>>>>> +}; >>>>>>>> +#endif >>>>>>>> diff --git a/drivers/crypto/fsl/jr.h b/drivers/crypto/fsl/jr.h >>>>>>>> index 1047aa772c..3eb7be79da 100644 >>>>>>>> --- a/drivers/crypto/fsl/jr.h >>>>>>>> +++ b/drivers/crypto/fsl/jr.h >>>>>>>> @@ -1,6 +1,7 @@ >>>>>>>> /* SPDX-License-Identifier: GPL-2.0+ */ >>>>>>>> /* >>>>>>>> * Copyright 2008-2014 Freescale Semiconductor, Inc. >>>>>>>> + * Copyright 2021 NXP >>>>>>>> * >>>>>>>> */ >>>>>>>> >>>>>>>> @@ -8,7 +9,9 @@ >>>>>>>> #define __JR_H >>>>>>>> >>>>>>>> #include <linux/compiler.h> >>>>>>>> +#include "fsl_sec.h" >>>>>>>> #include "type.h" >>>>>>>> +#include <misc.h> >>>>>>>> >>>>>>>> #define JR_SIZE 4 >>>>>>>> /* Timeout currently defined as 10 sec */ @@ -35,12 +38,21 @@ >>>>>>>> #define JRSLIODN_SHIFT 0 >>>>>>>> #define JRSLIODN_MASK 0x00000fff >>>>>>>> >>>>>>>> -#define JQ_DEQ_ERR -1 >>>>>>>> -#define JQ_DEQ_TO_ERR -2 >>>>>>>> -#define JQ_ENQ_ERR -3 >>>>>>>> +#define JRDID_MS_PRIM_DID BIT(0) >>>>>>>> +#define JRDID_MS_PRIM_TZ BIT(4) >>>>>>>> +#define JRDID_MS_TZ_OWN BIT(15) >>>>>>>> + >>>>>>>> +#define JQ_DEQ_ERR (-1) >>>>>>>> +#define JQ_DEQ_TO_ERR (-2) >>>>>>>> +#define JQ_ENQ_ERR (-3) >>>>>>>> >>>>>>>> #define RNG4_MAX_HANDLES 2 >>>>>>>> >>>>>>>> +enum { >>>>>>>> + /* Run caam jobring descriptor(in buf) */ >>>>>>>> + CAAM_JR_RUN_DESC, >>>>>>>> +}; >>>>>>>> + >>>>>>>> struct op_ring { >>>>>>>> caam_dma_addr_t desc; >>>>>>>> uint32_t status; >>>>>>>> @@ -102,6 +114,19 @@ struct result { >>>>>>>> uint32_t status; >>>>>>>> }; >>>>>>>> >>>>>>>> +/* >>>>>>>> + * struct caam_regs - CAAM initialization register interface >>>>>>>> + * >>>>>>>> + * Interface to caam memory map, jobring register, jobring storage. >>>>>>>> + */ >>>>>>>> +struct caam_regs { >>>>>>>> + ccsr_sec_t *sec; /*caam initialization registers*/ >>>>>>>> + struct jr_regs *regs; /*jobring configuration registers*/ >>>>>>>> + u8 jrid; /*id to identify a jobring*/ >>>>>>>> + /*Private sub-storage for a single JobR*/ >>>>>>>> + struct jobring jr[CONFIG_SYS_FSL_MAX_NUM_OF_SEC]; >>>>>>>> +}; >>>>>>>> + >>>>>>>> void caam_jr_strstatus(u32 status); >>>>>>>> int run_descriptor_jr(uint32_t *desc); >>>>>>>> >>>>>>> >>>>>>> -- >>>>>>> >>>>>> >>>>> >>>> >> ================================================================= >>>>>>> ==== >>>>>>> DENX Software Engineering GmbH, Managing Director: Wolfgang Denk >>>>>>> HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, >>>>>>> Germany >>>>>>> Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: >>>>>>> sbabic@denx.de >>>>>>> >>>>>> >>>>> >>>> >> ================================================================= >>>>>>> ==== >> >> >> -- >> ================================================================= >> ==== >> DENX Software Engineering GmbH, Managing Director: Wolfgang Denk >> HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany >> Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic@denx.de >> ================================================================= >> ====
Hello Stefano, > -----Original Message----- > From: U-Boot <u-boot-bounces@lists.denx.de> On Behalf Of Stefano Babic > Sent: Thursday, March 3, 2022 4:30 PM > To: Gaurav Jain <gaurav.jain@nxp.com>; Stefano Babic <sbabic@denx.de>; u- > boot@lists.denx.de; Marek Vasut <marex@denx.de> > Cc: Fabio Estevam <festevam@gmail.com>; Peng Fan <peng.fan@nxp.com>; Simon Glass > <sjg@chromium.org>; Priyanka Jain <priyanka.jain@nxp.com>; Ye Li <ye.li@nxp.com>; > Horia Geanta <horia.geanta@nxp.com>; Ji Luo <ji.luo@nxp.com>; Franck Lenormand > <franck.lenormand@nxp.com>; Silvano Di Ninno <silvano.dininno@nxp.com>; Sahil > Malhotra <sahil.malhotra@nxp.com>; Pankaj Gupta <pankaj.gupta@nxp.com>; Varun > Sethi <V.Sethi@nxp.com>; dl-uboot-imx <uboot-imx@nxp.com>; Shengzhou Liu > <shengzhou.liu@nxp.com>; Mingkai Hu <mingkai.hu@nxp.com>; Rajesh Bhagat > <rajesh.bhagat@nxp.com>; Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>; Wasim > Khan <wasim.khan@nxp.com>; Alison Wang <alison.wang@nxp.com>; Pramod Kumar > <pramod.kumar_1@nxp.com>; Andy Tang <andy.tang@nxp.com>; Adrian Alonso > <adrian.alonso@nxp.com>; Vladimir Oltean <olteanv@gmail.com> > Subject: Re: [EXT] Re: [PATCH v8 01/15] crypto/fsl: Add support for CAAM Job ring > driver model > > Hi, > > On 03.03.22 14:41, Gaurav Jain wrote: > > Hi Stefano > > > > As we have not received any response from imx6dl_mamoj board maintainer. > > I propose the below solution > > > > --- a/arch/arm/mach-imx/Kconfig > > +++ b/arch/arm/mach-imx/Kconfig > > @@ -49,8 +49,8 @@ config USE_IMXIMG_PLUGIN config IMX_HAB > > - select FSL_CAAM if HAS_CAAM > > - imply CMD_DEKBLOB if HAS_CAAM > > + imply FSL_CAAM if HAS_CAAM > > + imply CMD_DEKBLOB if FSL_CAAM > > Help > > > > IMO this is ok, I was also wrong, Marek is not the maintainer of this > board. This was the only board with broken build - let's say, I will > still wait a couple of days, and if there is no comments, I will apply > your series (but then V10). I can apply this fix myself, no need to post > the series again (I have not seen any other comment or request to change). I had a couple of concerns which I raised in V10 without any follow-up. Main thing is the JR reservation, which (if applied) would lead to misconfiguration when upstream TF-A is used, see [1]. > > Regards, > Stefano > Link: [1]: https://lore.kernel.org/u-boot/AM6PR06MB4691178347827CB77F44F537A6309@AM6PR06MB4691.eurprd06.prod.outlook.com/ -- andrey
> On 03.03.22 14:41, Gaurav Jain wrote: >> As we have not received any response from imx6dl_mamoj board maintainer. >> I propose the below solution >> >> --- a/arch/arm/mach-imx/Kconfig >> +++ b/arch/arm/mach-imx/Kconfig >> @@ -49,8 +49,8 @@ config USE_IMXIMG_PLUGIN config IMX_HAB >> - select FSL_CAAM if HAS_CAAM >> - imply CMD_DEKBLOB if HAS_CAAM >> + imply FSL_CAAM if HAS_CAAM >> + imply CMD_DEKBLOB if FSL_CAAM >> Help >> > > IMO this is ok, I was also wrong, Marek is not the maintainer of this > board. This was the only board with broken build - let's say, I will > still wait a couple of days, and if there is no comments, I will apply > your series (but then V10). I can apply this fix myself, no need to post > the series again (I have not seen any other comment or request to change). I don't understand why the solution isn't the same one as for the layerscape part in this series[1]: enable the config per board (that is your boards) and leave all others the same as before? -michael [1] https://lore.kernel.org/u-boot/4068dc3f802dad82972c64123743fd08@walle.cc/
> -----Original Message----- > From: Michael Walle <michael@walle.cc> > Sent: Monday, March 7, 2022 3:28 PM > To: sbabic@denx.de > Cc: Varun Sethi <V.Sethi@nxp.com>; Adrian Alonso <adrian.alonso@nxp.com>; > Alison Wang <alison.wang@nxp.com>; Andy Tang <andy.tang@nxp.com>; > festevam@gmail.com; Franck Lenormand <franck.lenormand@nxp.com>; > Gaurav Jain <gaurav.jain@nxp.com>; Horia Geanta <horia.geanta@nxp.com>; Ji > Luo <ji.luo@nxp.com>; marex@denx.de; Meenakshi Aggarwal > <meenakshi.aggarwal@nxp.com>; Mingkai Hu <mingkai.hu@nxp.com>; > olteanv@gmail.com; Pankaj Gupta <pankaj.gupta@nxp.com>; Peng Fan > <peng.fan@nxp.com>; Pramod Kumar <pramod.kumar_1@nxp.com>; Priyanka > Jain <priyanka.jain@nxp.com>; Rajesh Bhagat <rajesh.bhagat@nxp.com>; Sahil > Malhotra <sahil.malhotra@nxp.com>; Shengzhou Liu <shengzhou.liu@nxp.com>; > Silvano Di Ninno <silvano.dininno@nxp.com>; sjg@chromium.org; u- > boot@lists.denx.de; dl-uboot-imx <uboot-imx@nxp.com>; Wasim Khan > <wasim.khan@nxp.com>; Ye Li <ye.li@nxp.com>; Michael Walle > <michael@walle.cc> > Subject: Re: [EXT] Re: [PATCH v8 01/15] crypto/fsl: Add support for CAAM Job > ring driver model > > Caution: EXT Email > > > On 03.03.22 14:41, Gaurav Jain wrote: > >> As we have not received any response from imx6dl_mamoj board maintainer. > >> I propose the below solution > >> > >> --- a/arch/arm/mach-imx/Kconfig > >> +++ b/arch/arm/mach-imx/Kconfig > >> @@ -49,8 +49,8 @@ config USE_IMXIMG_PLUGIN config IMX_HAB > >> - select FSL_CAAM if HAS_CAAM > >> - imply CMD_DEKBLOB if HAS_CAAM > >> + imply FSL_CAAM if HAS_CAAM > >> + imply CMD_DEKBLOB if FSL_CAAM > >> Help > >> > > > > IMO this is ok, I was also wrong, Marek is not the maintainer of this > > board. This was the only board with broken build - let's say, I will > > still wait a couple of days, and if there is no comments, I will apply > > your series (but then V10). I can apply this fix myself, no need to > > post the series again (I have not seen any other comment or request to > change). > > I don't understand why the solution isn't the same one as for the layerscape part > in this series[1]: enable the config per board (that is your boards) and leave all > others the same as before? imx6dl_mamoj caam driver is not enabled by any of my changes. This board is enabling IMX_HAB which select FSL_CAAM. Proposed changes making it imply so that FSL_CAAM can be disabled in board defconfig. Gaurav > > -michael > > [1] > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Flore.kern > el.org%2Fu- > boot%2F4068dc3f802dad82972c64123743fd08%40walle.cc%2F&data=04% > 7C01%7Cgaurav.jain%40nxp.com%7C998fc3ba1b384d75e58708da0021058b%7 > C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C637822439101994232%7 > CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI > 6Ik1haWwiLCJXVCI6Mn0%3D%7C3000&sdata=u7fCKThNnSHG0ttLAzOxTo0 > SHC6kGAwDpJgUmdSDokw%3D&reserved=0
Am 2022-03-07 11:56, schrieb Gaurav Jain: >> -----Original Message----- >> From: Michael Walle <michael@walle.cc> >> Sent: Monday, March 7, 2022 3:28 PM >> To: sbabic@denx.de >> Cc: Varun Sethi <V.Sethi@nxp.com>; Adrian Alonso >> <adrian.alonso@nxp.com>; >> Alison Wang <alison.wang@nxp.com>; Andy Tang <andy.tang@nxp.com>; >> festevam@gmail.com; Franck Lenormand <franck.lenormand@nxp.com>; >> Gaurav Jain <gaurav.jain@nxp.com>; Horia Geanta >> <horia.geanta@nxp.com>; Ji >> Luo <ji.luo@nxp.com>; marex@denx.de; Meenakshi Aggarwal >> <meenakshi.aggarwal@nxp.com>; Mingkai Hu <mingkai.hu@nxp.com>; >> olteanv@gmail.com; Pankaj Gupta <pankaj.gupta@nxp.com>; Peng Fan >> <peng.fan@nxp.com>; Pramod Kumar <pramod.kumar_1@nxp.com>; Priyanka >> Jain <priyanka.jain@nxp.com>; Rajesh Bhagat <rajesh.bhagat@nxp.com>; >> Sahil >> Malhotra <sahil.malhotra@nxp.com>; Shengzhou Liu >> <shengzhou.liu@nxp.com>; >> Silvano Di Ninno <silvano.dininno@nxp.com>; sjg@chromium.org; u- >> boot@lists.denx.de; dl-uboot-imx <uboot-imx@nxp.com>; Wasim Khan >> <wasim.khan@nxp.com>; Ye Li <ye.li@nxp.com>; Michael Walle >> <michael@walle.cc> >> Subject: Re: [EXT] Re: [PATCH v8 01/15] crypto/fsl: Add support for >> CAAM Job >> ring driver model >> >> Caution: EXT Email >> >> > On 03.03.22 14:41, Gaurav Jain wrote: >> >> As we have not received any response from imx6dl_mamoj board maintainer. >> >> I propose the below solution >> >> >> >> --- a/arch/arm/mach-imx/Kconfig >> >> +++ b/arch/arm/mach-imx/Kconfig >> >> @@ -49,8 +49,8 @@ config USE_IMXIMG_PLUGIN config IMX_HAB >> >> - select FSL_CAAM if HAS_CAAM >> >> - imply CMD_DEKBLOB if HAS_CAAM >> >> + imply FSL_CAAM if HAS_CAAM >> >> + imply CMD_DEKBLOB if FSL_CAAM >> >> Help >> >> >> > >> > IMO this is ok, I was also wrong, Marek is not the maintainer of this >> > board. This was the only board with broken build - let's say, I will >> > still wait a couple of days, and if there is no comments, I will apply >> > your series (but then V10). I can apply this fix myself, no need to >> > post the series again (I have not seen any other comment or request to >> change). >> >> I don't understand why the solution isn't the same one as for the >> layerscape part >> in this series[1]: enable the config per board (that is your boards) >> and leave all >> others the same as before? > > imx6dl_mamoj caam driver is not enabled by any of my changes. > This board is enabling IMX_HAB which select FSL_CAAM. > Proposed changes making it imply so that FSL_CAAM can be disabled in > board defconfig. Ahh it was already selected before. But mhh, does IMX_HAB even makes sense without FSL_CAAM? Why was is a hard dependency before? -michael
> -----Original Message----- > From: Michael Walle <michael@walle.cc> > Sent: Monday, March 7, 2022 4:39 PM > To: Gaurav Jain <gaurav.jain@nxp.com> > Cc: sbabic@denx.de; Varun Sethi <V.Sethi@nxp.com>; Adrian Alonso > <adrian.alonso@nxp.com>; Alison Wang <alison.wang@nxp.com>; Andy Tang > <andy.tang@nxp.com>; festevam@gmail.com; Franck Lenormand > <franck.lenormand@nxp.com>; Horia Geanta <horia.geanta@nxp.com>; Ji Luo > <ji.luo@nxp.com>; marex@denx.de; Meenakshi Aggarwal > <meenakshi.aggarwal@nxp.com>; Mingkai Hu <mingkai.hu@nxp.com>; > olteanv@gmail.com; Pankaj Gupta <pankaj.gupta@nxp.com>; Peng Fan > <peng.fan@nxp.com>; Pramod Kumar <pramod.kumar_1@nxp.com>; Priyanka > Jain <priyanka.jain@nxp.com>; Rajesh Bhagat <rajesh.bhagat@nxp.com>; Sahil > Malhotra <sahil.malhotra@nxp.com>; Shengzhou Liu <shengzhou.liu@nxp.com>; > Silvano Di Ninno <silvano.dininno@nxp.com>; sjg@chromium.org; u- > boot@lists.denx.de; dl-uboot-imx <uboot-imx@nxp.com>; Wasim Khan > <wasim.khan@nxp.com>; Ye Li <ye.li@nxp.com> > Subject: Re: [EXT] Re: [PATCH v8 01/15] crypto/fsl: Add support for CAAM Job > ring driver model > > Caution: EXT Email > > Am 2022-03-07 11:56, schrieb Gaurav Jain: > >> -----Original Message----- > >> From: Michael Walle <michael@walle.cc> > >> Sent: Monday, March 7, 2022 3:28 PM > >> To: sbabic@denx.de > >> Cc: Varun Sethi <V.Sethi@nxp.com>; Adrian Alonso > >> <adrian.alonso@nxp.com>; Alison Wang <alison.wang@nxp.com>; Andy > Tang > >> <andy.tang@nxp.com>; festevam@gmail.com; Franck Lenormand > >> <franck.lenormand@nxp.com>; Gaurav Jain <gaurav.jain@nxp.com>; Horia > >> Geanta <horia.geanta@nxp.com>; Ji Luo <ji.luo@nxp.com>; > >> marex@denx.de; Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>; > >> Mingkai Hu <mingkai.hu@nxp.com>; olteanv@gmail.com; Pankaj Gupta > >> <pankaj.gupta@nxp.com>; Peng Fan <peng.fan@nxp.com>; Pramod Kumar > >> <pramod.kumar_1@nxp.com>; Priyanka Jain <priyanka.jain@nxp.com>; > >> Rajesh Bhagat <rajesh.bhagat@nxp.com>; Sahil Malhotra > >> <sahil.malhotra@nxp.com>; Shengzhou Liu <shengzhou.liu@nxp.com>; > >> Silvano Di Ninno <silvano.dininno@nxp.com>; sjg@chromium.org; u- > >> boot@lists.denx.de; dl-uboot-imx <uboot-imx@nxp.com>; Wasim Khan > >> <wasim.khan@nxp.com>; Ye Li <ye.li@nxp.com>; Michael Walle > >> <michael@walle.cc> > >> Subject: Re: [EXT] Re: [PATCH v8 01/15] crypto/fsl: Add support for > >> CAAM Job ring driver model > >> > >> Caution: EXT Email > >> > >> > On 03.03.22 14:41, Gaurav Jain wrote: > >> >> As we have not received any response from imx6dl_mamoj board > maintainer. > >> >> I propose the below solution > >> >> > >> >> --- a/arch/arm/mach-imx/Kconfig > >> >> +++ b/arch/arm/mach-imx/Kconfig > >> >> @@ -49,8 +49,8 @@ config USE_IMXIMG_PLUGIN config IMX_HAB > >> >> - select FSL_CAAM if HAS_CAAM > >> >> - imply CMD_DEKBLOB if HAS_CAAM > >> >> + imply FSL_CAAM if HAS_CAAM > >> >> + imply CMD_DEKBLOB if FSL_CAAM > >> >> Help > >> >> > >> > > >> > IMO this is ok, I was also wrong, Marek is not the maintainer of > >> > this board. This was the only board with broken build - let's say, > >> > I will still wait a couple of days, and if there is no comments, I > >> > will apply your series (but then V10). I can apply this fix myself, > >> > no need to post the series again (I have not seen any other comment > >> > or request to > >> change). > >> > >> I don't understand why the solution isn't the same one as for the > >> layerscape part in this series[1]: enable the config per board (that > >> is your boards) and leave all others the same as before? > > > > imx6dl_mamoj caam driver is not enabled by any of my changes. > > This board is enabling IMX_HAB which select FSL_CAAM. > > Proposed changes making it imply so that FSL_CAAM can be disabled in > > board defconfig. > > Ahh it was already selected before. But mhh, does IMX_HAB even makes sense > without FSL_CAAM? Why was is a hard dependency before? With imply, this will still enable FSL_CAAM unless it is explicitly disabled in defconfig. With select I do not have choice of disabling FSL_CAAM in defconfig. Now I have disabled FSL_CAAM only for imx6dl_mamoj_defconfig, as it is reporting spl size issues with caam driver model approach. Gaurav > > -michael
Am 2022-03-07 12:33, schrieb Gaurav Jain: >> -----Original Message----- >> From: Michael Walle <michael@walle.cc> >> Sent: Monday, March 7, 2022 4:39 PM >> To: Gaurav Jain <gaurav.jain@nxp.com> >> Cc: sbabic@denx.de; Varun Sethi <V.Sethi@nxp.com>; Adrian Alonso >> <adrian.alonso@nxp.com>; Alison Wang <alison.wang@nxp.com>; Andy Tang >> <andy.tang@nxp.com>; festevam@gmail.com; Franck Lenormand >> <franck.lenormand@nxp.com>; Horia Geanta <horia.geanta@nxp.com>; Ji >> Luo >> <ji.luo@nxp.com>; marex@denx.de; Meenakshi Aggarwal >> <meenakshi.aggarwal@nxp.com>; Mingkai Hu <mingkai.hu@nxp.com>; >> olteanv@gmail.com; Pankaj Gupta <pankaj.gupta@nxp.com>; Peng Fan >> <peng.fan@nxp.com>; Pramod Kumar <pramod.kumar_1@nxp.com>; Priyanka >> Jain <priyanka.jain@nxp.com>; Rajesh Bhagat <rajesh.bhagat@nxp.com>; >> Sahil >> Malhotra <sahil.malhotra@nxp.com>; Shengzhou Liu >> <shengzhou.liu@nxp.com>; >> Silvano Di Ninno <silvano.dininno@nxp.com>; sjg@chromium.org; u- >> boot@lists.denx.de; dl-uboot-imx <uboot-imx@nxp.com>; Wasim Khan >> <wasim.khan@nxp.com>; Ye Li <ye.li@nxp.com> >> Subject: Re: [EXT] Re: [PATCH v8 01/15] crypto/fsl: Add support for >> CAAM Job >> ring driver model >> >> Caution: EXT Email >> >> Am 2022-03-07 11:56, schrieb Gaurav Jain: >> >> -----Original Message----- >> >> From: Michael Walle <michael@walle.cc> >> >> Sent: Monday, March 7, 2022 3:28 PM >> >> To: sbabic@denx.de >> >> Cc: Varun Sethi <V.Sethi@nxp.com>; Adrian Alonso >> >> <adrian.alonso@nxp.com>; Alison Wang <alison.wang@nxp.com>; Andy >> Tang >> >> <andy.tang@nxp.com>; festevam@gmail.com; Franck Lenormand >> >> <franck.lenormand@nxp.com>; Gaurav Jain <gaurav.jain@nxp.com>; Horia >> >> Geanta <horia.geanta@nxp.com>; Ji Luo <ji.luo@nxp.com>; >> >> marex@denx.de; Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>; >> >> Mingkai Hu <mingkai.hu@nxp.com>; olteanv@gmail.com; Pankaj Gupta >> >> <pankaj.gupta@nxp.com>; Peng Fan <peng.fan@nxp.com>; Pramod Kumar >> >> <pramod.kumar_1@nxp.com>; Priyanka Jain <priyanka.jain@nxp.com>; >> >> Rajesh Bhagat <rajesh.bhagat@nxp.com>; Sahil Malhotra >> >> <sahil.malhotra@nxp.com>; Shengzhou Liu <shengzhou.liu@nxp.com>; >> >> Silvano Di Ninno <silvano.dininno@nxp.com>; sjg@chromium.org; u- >> >> boot@lists.denx.de; dl-uboot-imx <uboot-imx@nxp.com>; Wasim Khan >> >> <wasim.khan@nxp.com>; Ye Li <ye.li@nxp.com>; Michael Walle >> >> <michael@walle.cc> >> >> Subject: Re: [EXT] Re: [PATCH v8 01/15] crypto/fsl: Add support for >> >> CAAM Job ring driver model >> >> >> >> Caution: EXT Email >> >> >> >> > On 03.03.22 14:41, Gaurav Jain wrote: >> >> >> As we have not received any response from imx6dl_mamoj board >> maintainer. >> >> >> I propose the below solution >> >> >> >> >> >> --- a/arch/arm/mach-imx/Kconfig >> >> >> +++ b/arch/arm/mach-imx/Kconfig >> >> >> @@ -49,8 +49,8 @@ config USE_IMXIMG_PLUGIN config IMX_HAB >> >> >> - select FSL_CAAM if HAS_CAAM >> >> >> - imply CMD_DEKBLOB if HAS_CAAM >> >> >> + imply FSL_CAAM if HAS_CAAM >> >> >> + imply CMD_DEKBLOB if FSL_CAAM >> >> >> Help >> >> >> >> >> > >> >> > IMO this is ok, I was also wrong, Marek is not the maintainer of >> >> > this board. This was the only board with broken build - let's say, >> >> > I will still wait a couple of days, and if there is no comments, I >> >> > will apply your series (but then V10). I can apply this fix myself, >> >> > no need to post the series again (I have not seen any other comment >> >> > or request to >> >> change). >> >> >> >> I don't understand why the solution isn't the same one as for the >> >> layerscape part in this series[1]: enable the config per board (that >> >> is your boards) and leave all others the same as before? >> > >> > imx6dl_mamoj caam driver is not enabled by any of my changes. >> > This board is enabling IMX_HAB which select FSL_CAAM. >> > Proposed changes making it imply so that FSL_CAAM can be disabled in >> > board defconfig. >> >> Ahh it was already selected before. But mhh, does IMX_HAB even makes >> sense >> without FSL_CAAM? Why was is a hard dependency before? > > With imply, this will still enable FSL_CAAM unless it is explicitly > disabled in defconfig. With select I do not have choice of disabling > FSL_CAAM in defconfig. Now I have disabled FSL_CAAM only for > imx6dl_mamoj_defconfig, as it is reporting spl size issues with caam > driver model approach. I can see *what* you are doing, but that doesn't answer *why* it was a hard dependency before and why now of a sudden can be a soft dependency. -michael
> -----Original Message----- > From: Michael Walle <michael@walle.cc> > Sent: Monday, March 7, 2022 5:12 PM > To: Gaurav Jain <gaurav.jain@nxp.com> > Cc: sbabic@denx.de; Varun Sethi <V.Sethi@nxp.com>; Adrian Alonso > <adrian.alonso@nxp.com>; Alison Wang <alison.wang@nxp.com>; Andy Tang > <andy.tang@nxp.com>; festevam@gmail.com; Franck Lenormand > <franck.lenormand@nxp.com>; Horia Geanta <horia.geanta@nxp.com>; Ji Luo > <ji.luo@nxp.com>; marex@denx.de; Meenakshi Aggarwal > <meenakshi.aggarwal@nxp.com>; Mingkai Hu <mingkai.hu@nxp.com>; > olteanv@gmail.com; Pankaj Gupta <pankaj.gupta@nxp.com>; Peng Fan > <peng.fan@nxp.com>; Pramod Kumar <pramod.kumar_1@nxp.com>; Priyanka > Jain <priyanka.jain@nxp.com>; Rajesh Bhagat <rajesh.bhagat@nxp.com>; Sahil > Malhotra <sahil.malhotra@nxp.com>; Shengzhou Liu <shengzhou.liu@nxp.com>; > Silvano Di Ninno <silvano.dininno@nxp.com>; sjg@chromium.org; u- > boot@lists.denx.de; dl-uboot-imx <uboot-imx@nxp.com>; Wasim Khan > <wasim.khan@nxp.com>; Ye Li <ye.li@nxp.com> > Subject: Re: [EXT] Re: [PATCH v8 01/15] crypto/fsl: Add support for CAAM Job > ring driver model > > Caution: EXT Email > > Am 2022-03-07 12:33, schrieb Gaurav Jain: > >> -----Original Message----- > >> From: Michael Walle <michael@walle.cc> > >> Sent: Monday, March 7, 2022 4:39 PM > >> To: Gaurav Jain <gaurav.jain@nxp.com> > >> Cc: sbabic@denx.de; Varun Sethi <V.Sethi@nxp.com>; Adrian Alonso > >> <adrian.alonso@nxp.com>; Alison Wang <alison.wang@nxp.com>; Andy > Tang > >> <andy.tang@nxp.com>; festevam@gmail.com; Franck Lenormand > >> <franck.lenormand@nxp.com>; Horia Geanta <horia.geanta@nxp.com>; Ji > >> Luo <ji.luo@nxp.com>; marex@denx.de; Meenakshi Aggarwal > >> <meenakshi.aggarwal@nxp.com>; Mingkai Hu <mingkai.hu@nxp.com>; > >> olteanv@gmail.com; Pankaj Gupta <pankaj.gupta@nxp.com>; Peng Fan > >> <peng.fan@nxp.com>; Pramod Kumar <pramod.kumar_1@nxp.com>; > Priyanka > >> Jain <priyanka.jain@nxp.com>; Rajesh Bhagat <rajesh.bhagat@nxp.com>; > >> Sahil Malhotra <sahil.malhotra@nxp.com>; Shengzhou Liu > >> <shengzhou.liu@nxp.com>; Silvano Di Ninno <silvano.dininno@nxp.com>; > >> sjg@chromium.org; u- boot@lists.denx.de; dl-uboot-imx > >> <uboot-imx@nxp.com>; Wasim Khan <wasim.khan@nxp.com>; Ye Li > >> <ye.li@nxp.com> > >> Subject: Re: [EXT] Re: [PATCH v8 01/15] crypto/fsl: Add support for > >> CAAM Job ring driver model > >> > >> Caution: EXT Email > >> > >> Am 2022-03-07 11:56, schrieb Gaurav Jain: > >> >> -----Original Message----- > >> >> From: Michael Walle <michael@walle.cc> > >> >> Sent: Monday, March 7, 2022 3:28 PM > >> >> To: sbabic@denx.de > >> >> Cc: Varun Sethi <V.Sethi@nxp.com>; Adrian Alonso > >> >> <adrian.alonso@nxp.com>; Alison Wang <alison.wang@nxp.com>; Andy > >> Tang > >> >> <andy.tang@nxp.com>; festevam@gmail.com; Franck Lenormand > >> >> <franck.lenormand@nxp.com>; Gaurav Jain <gaurav.jain@nxp.com>; > >> >> Horia Geanta <horia.geanta@nxp.com>; Ji Luo <ji.luo@nxp.com>; > >> >> marex@denx.de; Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>; > >> >> Mingkai Hu <mingkai.hu@nxp.com>; olteanv@gmail.com; Pankaj Gupta > >> >> <pankaj.gupta@nxp.com>; Peng Fan <peng.fan@nxp.com>; Pramod > Kumar > >> >> <pramod.kumar_1@nxp.com>; Priyanka Jain <priyanka.jain@nxp.com>; > >> >> Rajesh Bhagat <rajesh.bhagat@nxp.com>; Sahil Malhotra > >> >> <sahil.malhotra@nxp.com>; Shengzhou Liu <shengzhou.liu@nxp.com>; > >> >> Silvano Di Ninno <silvano.dininno@nxp.com>; sjg@chromium.org; u- > >> >> boot@lists.denx.de; dl-uboot-imx <uboot-imx@nxp.com>; Wasim Khan > >> >> <wasim.khan@nxp.com>; Ye Li <ye.li@nxp.com>; Michael Walle > >> >> <michael@walle.cc> > >> >> Subject: Re: [EXT] Re: [PATCH v8 01/15] crypto/fsl: Add support > >> >> for CAAM Job ring driver model > >> >> > >> >> Caution: EXT Email > >> >> > >> >> > On 03.03.22 14:41, Gaurav Jain wrote: > >> >> >> As we have not received any response from imx6dl_mamoj board > >> maintainer. > >> >> >> I propose the below solution > >> >> >> > >> >> >> --- a/arch/arm/mach-imx/Kconfig > >> >> >> +++ b/arch/arm/mach-imx/Kconfig > >> >> >> @@ -49,8 +49,8 @@ config USE_IMXIMG_PLUGIN config IMX_HAB > >> >> >> - select FSL_CAAM if HAS_CAAM > >> >> >> - imply CMD_DEKBLOB if HAS_CAAM > >> >> >> + imply FSL_CAAM if HAS_CAAM > >> >> >> + imply CMD_DEKBLOB if FSL_CAAM > >> >> >> Help > >> >> >> > >> >> > > >> >> > IMO this is ok, I was also wrong, Marek is not the maintainer of > >> >> > this board. This was the only board with broken build - let's > >> >> > say, I will still wait a couple of days, and if there is no > >> >> > comments, I will apply your series (but then V10). I can apply > >> >> > this fix myself, no need to post the series again (I have not > >> >> > seen any other comment or request to > >> >> change). > >> >> > >> >> I don't understand why the solution isn't the same one as for the > >> >> layerscape part in this series[1]: enable the config per board > >> >> (that is your boards) and leave all others the same as before? > >> > > >> > imx6dl_mamoj caam driver is not enabled by any of my changes. > >> > This board is enabling IMX_HAB which select FSL_CAAM. > >> > Proposed changes making it imply so that FSL_CAAM can be disabled > >> > in board defconfig. > >> > >> Ahh it was already selected before. But mhh, does IMX_HAB even makes > >> sense without FSL_CAAM? Why was is a hard dependency before? > > > > With imply, this will still enable FSL_CAAM unless it is explicitly > > disabled in defconfig. With select I do not have choice of disabling > > FSL_CAAM in defconfig. Now I have disabled FSL_CAAM only for > > imx6dl_mamoj_defconfig, as it is reporting spl size issues with caam > > driver model approach. > > I can see *what* you are doing, but that doesn't answer *why* it was a hard > dependency before and why now of a sudden can be a soft dependency. I am not sure of any other dependency, but from the code ./arch/arm/mach-imx/cmd_dek.c needs caam for blob_encap_dek operation for mx6, mx7, mx7ulp. Making it soft dependency allows me to disable caam for imx6dl_mamoj. Gaurav > > -michael
Hello Andrey > -----Original Message----- > From: ZHIZHIKIN Andrey <andrey.zhizhikin@leica-geosystems.com> > Sent: Monday, March 7, 2022 1:08 AM > To: Stefano Babic <sbabic@denx.de>; Gaurav Jain <gaurav.jain@nxp.com>; u- > boot@lists.denx.de; Marek Vasut <marex@denx.de> > Cc: Fabio Estevam <festevam@gmail.com>; Peng Fan <peng.fan@nxp.com>; > Simon Glass <sjg@chromium.org>; Priyanka Jain <priyanka.jain@nxp.com>; Ye > Li <ye.li@nxp.com>; Horia Geanta <horia.geanta@nxp.com>; Ji Luo > <ji.luo@nxp.com>; Franck Lenormand <franck.lenormand@nxp.com>; Silvano Di > Ninno <silvano.dininno@nxp.com>; Sahil Malhotra <sahil.malhotra@nxp.com>; > Pankaj Gupta <pankaj.gupta@nxp.com>; Varun Sethi <V.Sethi@nxp.com>; dl- > uboot-imx <uboot-imx@nxp.com>; Shengzhou Liu <shengzhou.liu@nxp.com>; > Mingkai Hu <mingkai.hu@nxp.com>; Rajesh Bhagat <rajesh.bhagat@nxp.com>; > Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>; Wasim Khan > <wasim.khan@nxp.com>; Alison Wang <alison.wang@nxp.com>; Pramod > Kumar <pramod.kumar_1@nxp.com>; Andy Tang <andy.tang@nxp.com>; > Adrian Alonso <adrian.alonso@nxp.com>; Vladimir Oltean <olteanv@gmail.com> > Subject: RE: [EXT] Re: [PATCH v8 01/15] crypto/fsl: Add support for CAAM Job > ring driver model > > Caution: EXT Email > > Hello Stefano, > > > -----Original Message----- > > From: U-Boot <u-boot-bounces@lists.denx.de> On Behalf Of Stefano Babic > > Sent: Thursday, March 3, 2022 4:30 PM > > To: Gaurav Jain <gaurav.jain@nxp.com>; Stefano Babic <sbabic@denx.de>; > > u- boot@lists.denx.de; Marek Vasut <marex@denx.de> > > Cc: Fabio Estevam <festevam@gmail.com>; Peng Fan <peng.fan@nxp.com>; > > Simon Glass <sjg@chromium.org>; Priyanka Jain <priyanka.jain@nxp.com>; > > Ye Li <ye.li@nxp.com>; Horia Geanta <horia.geanta@nxp.com>; Ji Luo > > <ji.luo@nxp.com>; Franck Lenormand <franck.lenormand@nxp.com>; Silvano > > Di Ninno <silvano.dininno@nxp.com>; Sahil Malhotra > > <sahil.malhotra@nxp.com>; Pankaj Gupta <pankaj.gupta@nxp.com>; Varun > > Sethi <V.Sethi@nxp.com>; dl-uboot-imx <uboot-imx@nxp.com>; Shengzhou > > Liu <shengzhou.liu@nxp.com>; Mingkai Hu <mingkai.hu@nxp.com>; Rajesh > > Bhagat <rajesh.bhagat@nxp.com>; Meenakshi Aggarwal > > <meenakshi.aggarwal@nxp.com>; Wasim Khan <wasim.khan@nxp.com>; > Alison > > Wang <alison.wang@nxp.com>; Pramod Kumar > <pramod.kumar_1@nxp.com>; > > Andy Tang <andy.tang@nxp.com>; Adrian Alonso <adrian.alonso@nxp.com>; > > Vladimir Oltean <olteanv@gmail.com> > > Subject: Re: [EXT] Re: [PATCH v8 01/15] crypto/fsl: Add support for > > CAAM Job ring driver model > > > > Hi, > > > > On 03.03.22 14:41, Gaurav Jain wrote: > > > Hi Stefano > > > > > > As we have not received any response from imx6dl_mamoj board maintainer. > > > I propose the below solution > > > > > > --- a/arch/arm/mach-imx/Kconfig > > > +++ b/arch/arm/mach-imx/Kconfig > > > @@ -49,8 +49,8 @@ config USE_IMXIMG_PLUGIN config IMX_HAB > > > - select FSL_CAAM if HAS_CAAM > > > - imply CMD_DEKBLOB if HAS_CAAM > > > + imply FSL_CAAM if HAS_CAAM > > > + imply CMD_DEKBLOB if FSL_CAAM > > > Help > > > > > > > IMO this is ok, I was also wrong, Marek is not the maintainer of this > > board. This was the only board with broken build - let's say, I will > > still wait a couple of days, and if there is no comments, I will apply > > your series (but then V10). I can apply this fix myself, no need to > > post the series again (I have not seen any other comment or request to > change). > > I had a couple of concerns which I raised in V10 without any follow-up. > > Main thing is the JR reservation, which (if applied) would lead to > misconfiguration when upstream TF-A is used, see [1]. > > > > > Regards, > > Stefano > > > > Link: [1]: > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Flore.kern > el.org%2Fu- > boot%2FAM6PR06MB4691178347827CB77F44F537A6309%40AM6PR06MB4691 > .eurprd06.prod.outlook.com%2F&data=04%7C01%7Cgaurav.jain%40nxp.c > om%7C87775d9291044d6aad3808d9ffa8db17%7C686ea1d3bc2b4c6fa92cd99c5 > c301635%7C0%7C0%7C637821922977072803%7CUnknown%7CTWFpbGZsb3d8 > eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D% > 7C3000&sdata=3Gng6vVpNKyV8xNLSEuwG%2F7DEVDjSnYh5iYi47wvyvc%3 > D&reserved=0 Ok, I will follow the approach suggested by you. First a patch will be submitted to ATF and then the one for uboot will follow. Will send a V11 after removing the JR0 reservation code. Any other concern? Gaurav > > -- andrey
On Mon, Mar 07, 2022 at 12:03:42PM +0000, Gaurav Jain wrote: > > > > -----Original Message----- > > From: Michael Walle <michael@walle.cc> > > Sent: Monday, March 7, 2022 5:12 PM > > To: Gaurav Jain <gaurav.jain@nxp.com> > > Cc: sbabic@denx.de; Varun Sethi <V.Sethi@nxp.com>; Adrian Alonso > > <adrian.alonso@nxp.com>; Alison Wang <alison.wang@nxp.com>; Andy Tang > > <andy.tang@nxp.com>; festevam@gmail.com; Franck Lenormand > > <franck.lenormand@nxp.com>; Horia Geanta <horia.geanta@nxp.com>; Ji Luo > > <ji.luo@nxp.com>; marex@denx.de; Meenakshi Aggarwal > > <meenakshi.aggarwal@nxp.com>; Mingkai Hu <mingkai.hu@nxp.com>; > > olteanv@gmail.com; Pankaj Gupta <pankaj.gupta@nxp.com>; Peng Fan > > <peng.fan@nxp.com>; Pramod Kumar <pramod.kumar_1@nxp.com>; Priyanka > > Jain <priyanka.jain@nxp.com>; Rajesh Bhagat <rajesh.bhagat@nxp.com>; Sahil > > Malhotra <sahil.malhotra@nxp.com>; Shengzhou Liu <shengzhou.liu@nxp.com>; > > Silvano Di Ninno <silvano.dininno@nxp.com>; sjg@chromium.org; u- > > boot@lists.denx.de; dl-uboot-imx <uboot-imx@nxp.com>; Wasim Khan > > <wasim.khan@nxp.com>; Ye Li <ye.li@nxp.com> > > Subject: Re: [EXT] Re: [PATCH v8 01/15] crypto/fsl: Add support for CAAM Job > > ring driver model > > > > Caution: EXT Email > > > > Am 2022-03-07 12:33, schrieb Gaurav Jain: > > >> -----Original Message----- > > >> From: Michael Walle <michael@walle.cc> > > >> Sent: Monday, March 7, 2022 4:39 PM > > >> To: Gaurav Jain <gaurav.jain@nxp.com> > > >> Cc: sbabic@denx.de; Varun Sethi <V.Sethi@nxp.com>; Adrian Alonso > > >> <adrian.alonso@nxp.com>; Alison Wang <alison.wang@nxp.com>; Andy > > Tang > > >> <andy.tang@nxp.com>; festevam@gmail.com; Franck Lenormand > > >> <franck.lenormand@nxp.com>; Horia Geanta <horia.geanta@nxp.com>; Ji > > >> Luo <ji.luo@nxp.com>; marex@denx.de; Meenakshi Aggarwal > > >> <meenakshi.aggarwal@nxp.com>; Mingkai Hu <mingkai.hu@nxp.com>; > > >> olteanv@gmail.com; Pankaj Gupta <pankaj.gupta@nxp.com>; Peng Fan > > >> <peng.fan@nxp.com>; Pramod Kumar <pramod.kumar_1@nxp.com>; > > Priyanka > > >> Jain <priyanka.jain@nxp.com>; Rajesh Bhagat <rajesh.bhagat@nxp.com>; > > >> Sahil Malhotra <sahil.malhotra@nxp.com>; Shengzhou Liu > > >> <shengzhou.liu@nxp.com>; Silvano Di Ninno <silvano.dininno@nxp.com>; > > >> sjg@chromium.org; u- boot@lists.denx.de; dl-uboot-imx > > >> <uboot-imx@nxp.com>; Wasim Khan <wasim.khan@nxp.com>; Ye Li > > >> <ye.li@nxp.com> > > >> Subject: Re: [EXT] Re: [PATCH v8 01/15] crypto/fsl: Add support for > > >> CAAM Job ring driver model > > >> > > >> Caution: EXT Email > > >> > > >> Am 2022-03-07 11:56, schrieb Gaurav Jain: > > >> >> -----Original Message----- > > >> >> From: Michael Walle <michael@walle.cc> > > >> >> Sent: Monday, March 7, 2022 3:28 PM > > >> >> To: sbabic@denx.de > > >> >> Cc: Varun Sethi <V.Sethi@nxp.com>; Adrian Alonso > > >> >> <adrian.alonso@nxp.com>; Alison Wang <alison.wang@nxp.com>; Andy > > >> Tang > > >> >> <andy.tang@nxp.com>; festevam@gmail.com; Franck Lenormand > > >> >> <franck.lenormand@nxp.com>; Gaurav Jain <gaurav.jain@nxp.com>; > > >> >> Horia Geanta <horia.geanta@nxp.com>; Ji Luo <ji.luo@nxp.com>; > > >> >> marex@denx.de; Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>; > > >> >> Mingkai Hu <mingkai.hu@nxp.com>; olteanv@gmail.com; Pankaj Gupta > > >> >> <pankaj.gupta@nxp.com>; Peng Fan <peng.fan@nxp.com>; Pramod > > Kumar > > >> >> <pramod.kumar_1@nxp.com>; Priyanka Jain <priyanka.jain@nxp.com>; > > >> >> Rajesh Bhagat <rajesh.bhagat@nxp.com>; Sahil Malhotra > > >> >> <sahil.malhotra@nxp.com>; Shengzhou Liu <shengzhou.liu@nxp.com>; > > >> >> Silvano Di Ninno <silvano.dininno@nxp.com>; sjg@chromium.org; u- > > >> >> boot@lists.denx.de; dl-uboot-imx <uboot-imx@nxp.com>; Wasim Khan > > >> >> <wasim.khan@nxp.com>; Ye Li <ye.li@nxp.com>; Michael Walle > > >> >> <michael@walle.cc> > > >> >> Subject: Re: [EXT] Re: [PATCH v8 01/15] crypto/fsl: Add support > > >> >> for CAAM Job ring driver model > > >> >> > > >> >> Caution: EXT Email > > >> >> > > >> >> > On 03.03.22 14:41, Gaurav Jain wrote: > > >> >> >> As we have not received any response from imx6dl_mamoj board > > >> maintainer. > > >> >> >> I propose the below solution > > >> >> >> > > >> >> >> --- a/arch/arm/mach-imx/Kconfig > > >> >> >> +++ b/arch/arm/mach-imx/Kconfig > > >> >> >> @@ -49,8 +49,8 @@ config USE_IMXIMG_PLUGIN config IMX_HAB > > >> >> >> - select FSL_CAAM if HAS_CAAM > > >> >> >> - imply CMD_DEKBLOB if HAS_CAAM > > >> >> >> + imply FSL_CAAM if HAS_CAAM > > >> >> >> + imply CMD_DEKBLOB if FSL_CAAM > > >> >> >> Help > > >> >> >> > > >> >> > > > >> >> > IMO this is ok, I was also wrong, Marek is not the maintainer of > > >> >> > this board. This was the only board with broken build - let's > > >> >> > say, I will still wait a couple of days, and if there is no > > >> >> > comments, I will apply your series (but then V10). I can apply > > >> >> > this fix myself, no need to post the series again (I have not > > >> >> > seen any other comment or request to > > >> >> change). > > >> >> > > >> >> I don't understand why the solution isn't the same one as for the > > >> >> layerscape part in this series[1]: enable the config per board > > >> >> (that is your boards) and leave all others the same as before? > > >> > > > >> > imx6dl_mamoj caam driver is not enabled by any of my changes. > > >> > This board is enabling IMX_HAB which select FSL_CAAM. > > >> > Proposed changes making it imply so that FSL_CAAM can be disabled > > >> > in board defconfig. > > >> > > >> Ahh it was already selected before. But mhh, does IMX_HAB even makes > > >> sense without FSL_CAAM? Why was is a hard dependency before? > > > > > > With imply, this will still enable FSL_CAAM unless it is explicitly > > > disabled in defconfig. With select I do not have choice of disabling > > > FSL_CAAM in defconfig. Now I have disabled FSL_CAAM only for > > > imx6dl_mamoj_defconfig, as it is reporting spl size issues with caam > > > driver model approach. > > > > I can see *what* you are doing, but that doesn't answer *why* it was a hard > > dependency before and why now of a sudden can be a soft dependency. > > I am not sure of any other dependency, but from the code ./arch/arm/mach-imx/cmd_dek.c needs caam for blob_encap_dek operation for mx6, mx7, mx7ulp. > Making it soft dependency allows me to disable caam for imx6dl_mamoj. Yes, but can you reasonably, functionally, do that? Or are you just making things link but now the platform is non functional? Nothing that's an actual shell cmd should be linked in / included in the SPL binary (it should get discarded if built), but my recollection from migrating the HAB/CAAM symbols to Kconfig is that functionally you can't do what you're trying to do.
Hello Gaurav, > -----Original Message----- > From: U-Boot <u-boot-bounces@lists.denx.de> On Behalf Of Gaurav Jain > Sent: Monday, March 7, 2022 3:10 PM > To: ZHIZHIKIN Andrey <andrey.zhizhikin@leica-geosystems.com>; Stefano Babic > <sbabic@denx.de>; u-boot@lists.denx.de; Marek Vasut <marex@denx.de> > Cc: Fabio Estevam <festevam@gmail.com>; Peng Fan <peng.fan@nxp.com>; Simon Glass > <sjg@chromium.org>; Priyanka Jain <priyanka.jain@nxp.com>; Ye Li <ye.li@nxp.com>; > Horia Geanta <horia.geanta@nxp.com>; Ji Luo <ji.luo@nxp.com>; Franck Lenormand > <franck.lenormand@nxp.com>; Silvano Di Ninno <silvano.dininno@nxp.com>; Sahil > Malhotra <sahil.malhotra@nxp.com>; Pankaj Gupta <pankaj.gupta@nxp.com>; Varun > Sethi <V.Sethi@nxp.com>; dl-uboot-imx <uboot-imx@nxp.com>; Shengzhou Liu > <shengzhou.liu@nxp.com>; Mingkai Hu <mingkai.hu@nxp.com>; Rajesh Bhagat > <rajesh.bhagat@nxp.com>; Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>; Wasim > Khan <wasim.khan@nxp.com>; Alison Wang <alison.wang@nxp.com>; Pramod Kumar > <pramod.kumar_1@nxp.com>; Andy Tang <andy.tang@nxp.com>; Adrian Alonso > <adrian.alonso@nxp.com>; Vladimir Oltean <olteanv@gmail.com> > Subject: RE: [EXT] Re: [PATCH v8 01/15] crypto/fsl: Add support for CAAM Job ring > driver model > > Hello Andrey > > > Ok, I will follow the approach suggested by you. First a patch will be submitted > to ATF and then the one for uboot will follow. Perfect, thanks a lot for following it up here! > Will send a V11 after removing the JR0 reservation code. Any other concern? Besides the one above, I have no further concerns on the series. > > Gaurav > > > -- andrey
Hi Tom > -----Original Message----- > From: Tom Rini <trini@konsulko.com> > Sent: Monday, March 7, 2022 8:46 PM > To: Gaurav Jain <gaurav.jain@nxp.com> > Cc: Michael Walle <michael@walle.cc>; sbabic@denx.de; Varun Sethi > <V.Sethi@nxp.com>; Adrian Alonso <adrian.alonso@nxp.com>; Alison Wang > <alison.wang@nxp.com>; Andy Tang <andy.tang@nxp.com>; > festevam@gmail.com; Franck Lenormand <franck.lenormand@nxp.com>; Horia > Geanta <horia.geanta@nxp.com>; Ji Luo <ji.luo@nxp.com>; marex@denx.de; > Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>; Mingkai Hu > <mingkai.hu@nxp.com>; olteanv@gmail.com; Pankaj Gupta > <pankaj.gupta@nxp.com>; Peng Fan <peng.fan@nxp.com>; Pramod Kumar > <pramod.kumar_1@nxp.com>; Priyanka Jain <priyanka.jain@nxp.com>; Rajesh > Bhagat <rajesh.bhagat@nxp.com>; Sahil Malhotra <sahil.malhotra@nxp.com>; > Shengzhou Liu <shengzhou.liu@nxp.com>; Silvano Di Ninno > <silvano.dininno@nxp.com>; sjg@chromium.org; u-boot@lists.denx.de; dl- > uboot-imx <uboot-imx@nxp.com>; Wasim Khan <wasim.khan@nxp.com>; Ye Li > <ye.li@nxp.com> > Subject: Re: [EXT] Re: [PATCH v8 01/15] crypto/fsl: Add support for CAAM Job > ring driver model > > On Mon, Mar 07, 2022 at 12:03:42PM +0000, Gaurav Jain wrote: > > > > > > > -----Original Message----- > > > From: Michael Walle <michael@walle.cc> > > > Sent: Monday, March 7, 2022 5:12 PM > > > To: Gaurav Jain <gaurav.jain@nxp.com> > > > Cc: sbabic@denx.de; Varun Sethi <V.Sethi@nxp.com>; Adrian Alonso > > > <adrian.alonso@nxp.com>; Alison Wang <alison.wang@nxp.com>; Andy > > > Tang <andy.tang@nxp.com>; festevam@gmail.com; Franck Lenormand > > > <franck.lenormand@nxp.com>; Horia Geanta <horia.geanta@nxp.com>; Ji > > > Luo <ji.luo@nxp.com>; marex@denx.de; Meenakshi Aggarwal > > > <meenakshi.aggarwal@nxp.com>; Mingkai Hu <mingkai.hu@nxp.com>; > > > olteanv@gmail.com; Pankaj Gupta <pankaj.gupta@nxp.com>; Peng Fan > > > <peng.fan@nxp.com>; Pramod Kumar <pramod.kumar_1@nxp.com>; > Priyanka > > > Jain <priyanka.jain@nxp.com>; Rajesh Bhagat <rajesh.bhagat@nxp.com>; > > > Sahil Malhotra <sahil.malhotra@nxp.com>; Shengzhou Liu > > > <shengzhou.liu@nxp.com>; Silvano Di Ninno <silvano.dininno@nxp.com>; > > > sjg@chromium.org; u- boot@lists.denx.de; dl-uboot-imx > > > <uboot-imx@nxp.com>; Wasim Khan <wasim.khan@nxp.com>; Ye Li > > > <ye.li@nxp.com> > > > Subject: Re: [EXT] Re: [PATCH v8 01/15] crypto/fsl: Add support for > > > CAAM Job ring driver model > > > > > > Caution: EXT Email > > > > > > Am 2022-03-07 12:33, schrieb Gaurav Jain: > > > >> -----Original Message----- > > > >> From: Michael Walle <michael@walle.cc> > > > >> Sent: Monday, March 7, 2022 4:39 PM > > > >> To: Gaurav Jain <gaurav.jain@nxp.com> > > > >> Cc: sbabic@denx.de; Varun Sethi <V.Sethi@nxp.com>; Adrian Alonso > > > >> <adrian.alonso@nxp.com>; Alison Wang <alison.wang@nxp.com>; Andy > > > Tang > > > >> <andy.tang@nxp.com>; festevam@gmail.com; Franck Lenormand > > > >> <franck.lenormand@nxp.com>; Horia Geanta <horia.geanta@nxp.com>; > > > >> Ji Luo <ji.luo@nxp.com>; marex@denx.de; Meenakshi Aggarwal > > > >> <meenakshi.aggarwal@nxp.com>; Mingkai Hu <mingkai.hu@nxp.com>; > > > >> olteanv@gmail.com; Pankaj Gupta <pankaj.gupta@nxp.com>; Peng Fan > > > >> <peng.fan@nxp.com>; Pramod Kumar <pramod.kumar_1@nxp.com>; > > > Priyanka > > > >> Jain <priyanka.jain@nxp.com>; Rajesh Bhagat > > > >> <rajesh.bhagat@nxp.com>; Sahil Malhotra <sahil.malhotra@nxp.com>; > > > >> Shengzhou Liu <shengzhou.liu@nxp.com>; Silvano Di Ninno > > > >> <silvano.dininno@nxp.com>; sjg@chromium.org; u- > > > >> boot@lists.denx.de; dl-uboot-imx <uboot-imx@nxp.com>; Wasim Khan > > > >> <wasim.khan@nxp.com>; Ye Li <ye.li@nxp.com> > > > >> Subject: Re: [EXT] Re: [PATCH v8 01/15] crypto/fsl: Add support > > > >> for CAAM Job ring driver model > > > >> > > > >> Caution: EXT Email > > > >> > > > >> Am 2022-03-07 11:56, schrieb Gaurav Jain: > > > >> >> -----Original Message----- > > > >> >> From: Michael Walle <michael@walle.cc> > > > >> >> Sent: Monday, March 7, 2022 3:28 PM > > > >> >> To: sbabic@denx.de > > > >> >> Cc: Varun Sethi <V.Sethi@nxp.com>; Adrian Alonso > > > >> >> <adrian.alonso@nxp.com>; Alison Wang <alison.wang@nxp.com>; > > > >> >> Andy > > > >> Tang > > > >> >> <andy.tang@nxp.com>; festevam@gmail.com; Franck Lenormand > > > >> >> <franck.lenormand@nxp.com>; Gaurav Jain <gaurav.jain@nxp.com>; > > > >> >> Horia Geanta <horia.geanta@nxp.com>; Ji Luo <ji.luo@nxp.com>; > > > >> >> marex@denx.de; Meenakshi Aggarwal > > > >> >> <meenakshi.aggarwal@nxp.com>; Mingkai Hu > <mingkai.hu@nxp.com>; > > > >> >> olteanv@gmail.com; Pankaj Gupta <pankaj.gupta@nxp.com>; Peng > > > >> >> Fan <peng.fan@nxp.com>; Pramod > > > Kumar > > > >> >> <pramod.kumar_1@nxp.com>; Priyanka Jain > > > >> >> <priyanka.jain@nxp.com>; Rajesh Bhagat > > > >> >> <rajesh.bhagat@nxp.com>; Sahil Malhotra > > > >> >> <sahil.malhotra@nxp.com>; Shengzhou Liu > > > >> >> <shengzhou.liu@nxp.com>; Silvano Di Ninno > > > >> >> <silvano.dininno@nxp.com>; sjg@chromium.org; u- > > > >> >> boot@lists.denx.de; dl-uboot-imx <uboot-imx@nxp.com>; Wasim > > > >> >> Khan <wasim.khan@nxp.com>; Ye Li <ye.li@nxp.com>; Michael > > > >> >> Walle <michael@walle.cc> > > > >> >> Subject: Re: [EXT] Re: [PATCH v8 01/15] crypto/fsl: Add > > > >> >> support for CAAM Job ring driver model > > > >> >> > > > >> >> Caution: EXT Email > > > >> >> > > > >> >> > On 03.03.22 14:41, Gaurav Jain wrote: > > > >> >> >> As we have not received any response from imx6dl_mamoj > > > >> >> >> board > > > >> maintainer. > > > >> >> >> I propose the below solution > > > >> >> >> > > > >> >> >> --- a/arch/arm/mach-imx/Kconfig > > > >> >> >> +++ b/arch/arm/mach-imx/Kconfig > > > >> >> >> @@ -49,8 +49,8 @@ config USE_IMXIMG_PLUGIN config > IMX_HAB > > > >> >> >> - select FSL_CAAM if HAS_CAAM > > > >> >> >> - imply CMD_DEKBLOB if HAS_CAAM > > > >> >> >> + imply FSL_CAAM if HAS_CAAM > > > >> >> >> + imply CMD_DEKBLOB if FSL_CAAM > > > >> >> >> Help > > > >> >> >> > > > >> >> > > > > >> >> > IMO this is ok, I was also wrong, Marek is not the > > > >> >> > maintainer of this board. This was the only board with > > > >> >> > broken build - let's say, I will still wait a couple of > > > >> >> > days, and if there is no comments, I will apply your series > > > >> >> > (but then V10). I can apply this fix myself, no need to post > > > >> >> > the series again (I have not seen any other comment or > > > >> >> > request to > > > >> >> change). > > > >> >> > > > >> >> I don't understand why the solution isn't the same one as for > > > >> >> the layerscape part in this series[1]: enable the config per > > > >> >> board (that is your boards) and leave all others the same as before? > > > >> > > > > >> > imx6dl_mamoj caam driver is not enabled by any of my changes. > > > >> > This board is enabling IMX_HAB which select FSL_CAAM. > > > >> > Proposed changes making it imply so that FSL_CAAM can be > > > >> > disabled in board defconfig. > > > >> > > > >> Ahh it was already selected before. But mhh, does IMX_HAB even > > > >> makes sense without FSL_CAAM? Why was is a hard dependency before? > > > > > > > > With imply, this will still enable FSL_CAAM unless it is > > > > explicitly disabled in defconfig. With select I do not have choice > > > > of disabling FSL_CAAM in defconfig. Now I have disabled FSL_CAAM > > > > only for imx6dl_mamoj_defconfig, as it is reporting spl size > > > > issues with caam driver model approach. > > > > > > I can see *what* you are doing, but that doesn't answer *why* it was > > > a hard dependency before and why now of a sudden can be a soft > dependency. > > > > I am not sure of any other dependency, but from the code ./arch/arm/mach- > imx/cmd_dek.c needs caam for blob_encap_dek operation for mx6, mx7, > mx7ulp. > > Making it soft dependency allows me to disable caam for imx6dl_mamoj. > > Yes, but can you reasonably, functionally, do that? Or are you just making things > link but now the platform is non functional? Nothing that's an actual shell cmd > should be linked in / included in the SPL binary (it should get discarded if built), > but my recollection from migrating the HAB/CAAM symbols to Kconfig is that > functionally you can't do what you're trying to do. > I further checked on your concern and propose the below change to stop building caam driver in SPL for imx6dl_mamoj. --- a/configs/imx6dl_mamoj_defconfig +++ b/configs/imx6dl_mamoj_defconfig @@ -61,3 +61,4 @@ CONFIG_USB_GADGET_MANUFACTURER="FSL" CONFIG_USB_GADGET_VENDOR_NUM=0x0525 CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_CI_UDC=y +CONFIG_SPL_CRYPTO=n Gaurav > -- > Tom
On Tue, Mar 8, 2022 at 8:10 AM Gaurav Jain <gaurav.jain@nxp.com> wrote: > I further checked on your concern and propose the below change to stop building caam driver in SPL for imx6dl_mamoj. > > --- a/configs/imx6dl_mamoj_defconfig > +++ b/configs/imx6dl_mamoj_defconfig > @@ -61,3 +61,4 @@ CONFIG_USB_GADGET_MANUFACTURER="FSL" > CONFIG_USB_GADGET_VENDOR_NUM=0x0525 > CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 > CONFIG_CI_UDC=y > +CONFIG_SPL_CRYPTO=n No, this is not how defconfig works. You should set: # CONFIG_SPL_CRYPTO is not set
> -----Original Message----- > From: Fabio Estevam <festevam@gmail.com> > Sent: Tuesday, March 8, 2022 4:42 PM > To: Gaurav Jain <gaurav.jain@nxp.com> > Cc: Tom Rini <trini@konsulko.com>; Michael Walle <michael@walle.cc>; > sbabic@denx.de; Varun Sethi <V.Sethi@nxp.com>; Adrian Alonso > <adrian.alonso@nxp.com>; Alison Wang <alison.wang@nxp.com>; Andy Tang > <andy.tang@nxp.com>; Franck Lenormand <franck.lenormand@nxp.com>; > Horia Geanta <horia.geanta@nxp.com>; Ji Luo <ji.luo@nxp.com>; > marex@denx.de; Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>; > Mingkai Hu <mingkai.hu@nxp.com>; olteanv@gmail.com; Pankaj Gupta > <pankaj.gupta@nxp.com>; Peng Fan <peng.fan@nxp.com>; Pramod Kumar > <pramod.kumar_1@nxp.com>; Priyanka Jain <priyanka.jain@nxp.com>; Rajesh > Bhagat <rajesh.bhagat@nxp.com>; Sahil Malhotra <sahil.malhotra@nxp.com>; > Shengzhou Liu <shengzhou.liu@nxp.com>; Silvano Di Ninno > <silvano.dininno@nxp.com>; sjg@chromium.org; u-boot@lists.denx.de; dl- > uboot-imx <uboot-imx@nxp.com>; Wasim Khan <wasim.khan@nxp.com>; Ye Li > <ye.li@nxp.com> > Subject: Re: [EXT] Re: [PATCH v8 01/15] crypto/fsl: Add support for CAAM Job > ring driver model > > Caution: EXT Email > > On Tue, Mar 8, 2022 at 8:10 AM Gaurav Jain <gaurav.jain@nxp.com> wrote: > > > I further checked on your concern and propose the below change to stop > building caam driver in SPL for imx6dl_mamoj. > > > > --- a/configs/imx6dl_mamoj_defconfig > > +++ b/configs/imx6dl_mamoj_defconfig > > @@ -61,3 +61,4 @@ CONFIG_USB_GADGET_MANUFACTURER="FSL" > > CONFIG_USB_GADGET_VENDOR_NUM=0x0525 > > CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 > > CONFIG_CI_UDC=y > > +CONFIG_SPL_CRYPTO=n > > No, this is not how defconfig works. > > You should set: > > # CONFIG_SPL_CRYPTO is not set Ok. Noted. Gaurav
On Tue, Mar 08, 2022 at 08:12:27AM -0300, Fabio Estevam wrote: > On Tue, Mar 8, 2022 at 8:10 AM Gaurav Jain <gaurav.jain@nxp.com> wrote: > > > I further checked on your concern and propose the below change to stop building caam driver in SPL for imx6dl_mamoj. > > > > --- a/configs/imx6dl_mamoj_defconfig > > +++ b/configs/imx6dl_mamoj_defconfig > > @@ -61,3 +61,4 @@ CONFIG_USB_GADGET_MANUFACTURER="FSL" > > CONFIG_USB_GADGET_VENDOR_NUM=0x0525 > > CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 > > CONFIG_CI_UDC=y > > +CONFIG_SPL_CRYPTO=n > > No, this is not how defconfig works. > > You should set: > > # CONFIG_SPL_CRYPTO is not set But more, WHY is this the right answer? You're disabling functionality and the board maintainers aren't even on the CC list for this thread it looks like. Why are you not fixing the board so it still links? What makes this board a problem that other (I assume) imx6dl boards are not?
> -----Original Message----- > From: Tom Rini <trini@konsulko.com> > Sent: Tuesday, March 8, 2022 6:19 PM > To: Fabio Estevam <festevam@gmail.com> > Cc: Gaurav Jain <gaurav.jain@nxp.com>; Michael Walle <michael@walle.cc>; > sbabic@denx.de; Varun Sethi <V.Sethi@nxp.com>; Adrian Alonso > <adrian.alonso@nxp.com>; Alison Wang <alison.wang@nxp.com>; Andy Tang > <andy.tang@nxp.com>; Franck Lenormand <franck.lenormand@nxp.com>; > Horia Geanta <horia.geanta@nxp.com>; Ji Luo <ji.luo@nxp.com>; > marex@denx.de; Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>; > Mingkai Hu <mingkai.hu@nxp.com>; olteanv@gmail.com; Pankaj Gupta > <pankaj.gupta@nxp.com>; Peng Fan <peng.fan@nxp.com>; Pramod Kumar > <pramod.kumar_1@nxp.com>; Priyanka Jain <priyanka.jain@nxp.com>; Rajesh > Bhagat <rajesh.bhagat@nxp.com>; Sahil Malhotra <sahil.malhotra@nxp.com>; > Shengzhou Liu <shengzhou.liu@nxp.com>; Silvano Di Ninno > <silvano.dininno@nxp.com>; sjg@chromium.org; u-boot@lists.denx.de; dl- > uboot-imx <uboot-imx@nxp.com>; Wasim Khan <wasim.khan@nxp.com>; Ye Li > <ye.li@nxp.com> > Subject: Re: [EXT] Re: [PATCH v8 01/15] crypto/fsl: Add support for CAAM Job > ring driver model > > On Tue, Mar 08, 2022 at 08:12:27AM -0300, Fabio Estevam wrote: > > On Tue, Mar 8, 2022 at 8:10 AM Gaurav Jain <gaurav.jain@nxp.com> wrote: > > > > > I further checked on your concern and propose the below change to stop > building caam driver in SPL for imx6dl_mamoj. > > > > > > --- a/configs/imx6dl_mamoj_defconfig > > > +++ b/configs/imx6dl_mamoj_defconfig > > > @@ -61,3 +61,4 @@ CONFIG_USB_GADGET_MANUFACTURER="FSL" > > > CONFIG_USB_GADGET_VENDOR_NUM=0x0525 > > > CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 > > > CONFIG_CI_UDC=y > > > +CONFIG_SPL_CRYPTO=n > > > > No, this is not how defconfig works. > > > > You should set: > > > > # CONFIG_SPL_CRYPTO is not set > > But more, WHY is this the right answer? You're disabling functionality and the > board maintainers aren't even on the CC list for this thread it looks like. Why are > you not fixing the board so it still links? What makes this board a problem that > other (I assume) imx6dl boards are not? > SPL exceeds the maximum size for only imx6dl_mamoj. spl/u-boot-spl.bin exceeds file size limit: limit: 0xefa0 bytes actual: 0x1004d bytes excess: 0x10ad bytes on further checking I see that caam is not initialized in SPL but only built. So disabling the build for caam driver in SPL should not be a problem. (Added Jagan, Raffaele, Simone as board maintainer.) Gaurav > -- > Tom
Hi Tom, On 08.03.22 13:48, Tom Rini wrote: > On Tue, Mar 08, 2022 at 08:12:27AM -0300, Fabio Estevam wrote: >> On Tue, Mar 8, 2022 at 8:10 AM Gaurav Jain <gaurav.jain@nxp.com> wrote: >> >>> I further checked on your concern and propose the below change to stop building caam driver in SPL for imx6dl_mamoj. >>> >>> --- a/configs/imx6dl_mamoj_defconfig >>> +++ b/configs/imx6dl_mamoj_defconfig >>> @@ -61,3 +61,4 @@ CONFIG_USB_GADGET_MANUFACTURER="FSL" >>> CONFIG_USB_GADGET_VENDOR_NUM=0x0525 >>> CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 >>> CONFIG_CI_UDC=y >>> +CONFIG_SPL_CRYPTO=n >> >> No, this is not how defconfig works. >> >> You should set: >> >> # CONFIG_SPL_CRYPTO is not set > > But more, WHY is this the right answer? You're disabling functionality > and the board maintainers aren't even on the CC list for this thread it > looks like. This was my blocking point, too, for this series. There is no answer about the board. I can just imagine (as for other MX6DL) that the required functionality is secure boot, then CONFIG_IMX_HAB is enough. But well, just the board maintainers can say. Added Raffaele and Jagan as reported maintainers for this board. > Why are you not fixing the board so it still links? What > makes this board a problem that other (I assume) imx6dl boards are not? Well, this board has, compared to other MX6DL, a lot of SPL_ option that are bloating the SPL size. And then does not match anymore with the internal RAm, while other MX6DL boards are not so affected by the increased size because they have no SPL at all or SPL with less options and then smaller. We do not need to fix the link, but reduce the size, and nobody else than the maintainers can tell us if removing some feature is ok. Regards, Stefano
On Tue, Mar 08, 2022 at 01:21:41PM +0000, Gaurav Jain wrote: > > > > -----Original Message----- > > From: Tom Rini <trini@konsulko.com> > > Sent: Tuesday, March 8, 2022 6:19 PM > > To: Fabio Estevam <festevam@gmail.com> > > Cc: Gaurav Jain <gaurav.jain@nxp.com>; Michael Walle <michael@walle.cc>; > > sbabic@denx.de; Varun Sethi <V.Sethi@nxp.com>; Adrian Alonso > > <adrian.alonso@nxp.com>; Alison Wang <alison.wang@nxp.com>; Andy Tang > > <andy.tang@nxp.com>; Franck Lenormand <franck.lenormand@nxp.com>; > > Horia Geanta <horia.geanta@nxp.com>; Ji Luo <ji.luo@nxp.com>; > > marex@denx.de; Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>; > > Mingkai Hu <mingkai.hu@nxp.com>; olteanv@gmail.com; Pankaj Gupta > > <pankaj.gupta@nxp.com>; Peng Fan <peng.fan@nxp.com>; Pramod Kumar > > <pramod.kumar_1@nxp.com>; Priyanka Jain <priyanka.jain@nxp.com>; Rajesh > > Bhagat <rajesh.bhagat@nxp.com>; Sahil Malhotra <sahil.malhotra@nxp.com>; > > Shengzhou Liu <shengzhou.liu@nxp.com>; Silvano Di Ninno > > <silvano.dininno@nxp.com>; sjg@chromium.org; u-boot@lists.denx.de; dl- > > uboot-imx <uboot-imx@nxp.com>; Wasim Khan <wasim.khan@nxp.com>; Ye Li > > <ye.li@nxp.com> > > Subject: Re: [EXT] Re: [PATCH v8 01/15] crypto/fsl: Add support for CAAM Job > > ring driver model > > > > On Tue, Mar 08, 2022 at 08:12:27AM -0300, Fabio Estevam wrote: > > > On Tue, Mar 8, 2022 at 8:10 AM Gaurav Jain <gaurav.jain@nxp.com> wrote: > > > > > > > I further checked on your concern and propose the below change to stop > > building caam driver in SPL for imx6dl_mamoj. > > > > > > > > --- a/configs/imx6dl_mamoj_defconfig > > > > +++ b/configs/imx6dl_mamoj_defconfig > > > > @@ -61,3 +61,4 @@ CONFIG_USB_GADGET_MANUFACTURER="FSL" > > > > CONFIG_USB_GADGET_VENDOR_NUM=0x0525 > > > > CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 > > > > CONFIG_CI_UDC=y > > > > +CONFIG_SPL_CRYPTO=n > > > > > > No, this is not how defconfig works. > > > > > > You should set: > > > > > > # CONFIG_SPL_CRYPTO is not set > > > > But more, WHY is this the right answer? You're disabling functionality and the > > board maintainers aren't even on the CC list for this thread it looks like. Why are > > you not fixing the board so it still links? What makes this board a problem that > > other (I assume) imx6dl boards are not? > > > SPL exceeds the maximum size for only imx6dl_mamoj. > spl/u-boot-spl.bin exceeds file size limit: > limit: 0xefa0 bytes > actual: 0x1004d bytes > excess: 0x10ad bytes > > on further checking I see that caam is not initialized in SPL but only built. > So disabling the build for caam driver in SPL should not be a problem. > > (Added Jagan, Raffaele, Simone as board maintainer.) That's a lot of growth, what's going on? And is the CAAM being built but not initialized a generic issue with imx6 platforms? That seems like something to further understand, and hopefully the board maintainers can chime in here soon.
Hi On Tue, Mar 8, 2022 at 2:28 PM Stefano Babic <sbabic@denx.de> wrote: > > Hi Tom, > > On 08.03.22 13:48, Tom Rini wrote: > > On Tue, Mar 08, 2022 at 08:12:27AM -0300, Fabio Estevam wrote: > >> On Tue, Mar 8, 2022 at 8:10 AM Gaurav Jain <gaurav.jain@nxp.com> wrote: > >> > >>> I further checked on your concern and propose the below change to stop building caam driver in SPL for imx6dl_mamoj. > >>> > >>> --- a/configs/imx6dl_mamoj_defconfig > >>> +++ b/configs/imx6dl_mamoj_defconfig > >>> @@ -61,3 +61,4 @@ CONFIG_USB_GADGET_MANUFACTURER="FSL" > >>> CONFIG_USB_GADGET_VENDOR_NUM=0x0525 > >>> CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 > >>> CONFIG_CI_UDC=y > >>> +CONFIG_SPL_CRYPTO=n > >> > >> No, this is not how defconfig works. > >> > >> You should set: > >> > >> # CONFIG_SPL_CRYPTO is not set > > > > But more, WHY is this the right answer? You're disabling functionality > > and the board maintainers aren't even on the CC list for this thread it > > looks like. > > This was my blocking point, too, for this series. There is no answer > about the board. > > I can just imagine (as for other MX6DL) that the required functionality > is secure boot, then CONFIG_IMX_HAB is enough. But well, just the board > maintainers can say. Added Raffaele and Jagan as reported maintainers > for this board. > > > Why are you not fixing the board so it still links? What > > makes this board a problem that other (I assume) imx6dl boards are not? > > Well, this board has, compared to other MX6DL, a lot of SPL_ option that > are bloating the SPL size. And then does not match anymore with the > internal RAm, while other MX6DL boards are not so affected by the > increased size because they have no SPL at all or SPL with less options > and then smaller. We do not need to fix the link, but reduce the size, > and nobody else than the maintainers can tell us if removing some > feature is ok. > I will test this week, and try to find a board here to test * Jagan * Do you have a momoj? Michael > Regards, > Stefano > > -- > ===================================================================== > DENX Software Engineering GmbH, Managing Director: Wolfgang Denk > HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany > Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic@denx.de > =====================================================================
Hi Michael > -----Original Message----- > From: Michael Nazzareno Trimarchi <michael@amarulasolutions.com> > Sent: Tuesday, March 8, 2022 7:05 PM > To: Stefano Babic <sbabic@denx.de> > Cc: Tom Rini <trini@konsulko.com>; Fabio Estevam <festevam@gmail.com>; > Gaurav Jain <gaurav.jain@nxp.com>; Michael Walle <michael@walle.cc>; > Varun Sethi <V.Sethi@nxp.com>; Adrian Alonso <adrian.alonso@nxp.com>; > Alison Wang <alison.wang@nxp.com>; Andy Tang <andy.tang@nxp.com>; > Franck Lenormand <franck.lenormand@nxp.com>; Horia Geanta > <horia.geanta@nxp.com>; Ji Luo <ji.luo@nxp.com>; marex@denx.de; > Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>; Mingkai Hu > <mingkai.hu@nxp.com>; olteanv@gmail.com; Pankaj Gupta > <pankaj.gupta@nxp.com>; Peng Fan <peng.fan@nxp.com>; Pramod Kumar > <pramod.kumar_1@nxp.com>; Priyanka Jain <priyanka.jain@nxp.com>; > Rajesh Bhagat <rajesh.bhagat@nxp.com>; Sahil Malhotra > <sahil.malhotra@nxp.com>; Shengzhou Liu <shengzhou.liu@nxp.com>; > Silvano Di Ninno <silvano.dininno@nxp.com>; sjg@chromium.org; u- > boot@lists.denx.de; dl-uboot-imx <uboot-imx@nxp.com>; Wasim Khan > <wasim.khan@nxp.com>; Ye Li <ye.li@nxp.com>; Raffaele RECALCATI > <raffaele.recalcati@bticino.it>; Jagan Teki <jagan@amarulasolutions.com> > Subject: Re: [EXT] Re: [PATCH v8 01/15] crypto/fsl: Add support for CAAM Job > ring driver model > > Caution: EXT Email > > Hi > > On Tue, Mar 8, 2022 at 2:28 PM Stefano Babic <sbabic@denx.de> wrote: > > > > Hi Tom, > > > > On 08.03.22 13:48, Tom Rini wrote: > > > On Tue, Mar 08, 2022 at 08:12:27AM -0300, Fabio Estevam wrote: > > >> On Tue, Mar 8, 2022 at 8:10 AM Gaurav Jain <gaurav.jain@nxp.com> > wrote: > > >> > > >>> I further checked on your concern and propose the below change to > stop building caam driver in SPL for imx6dl_mamoj. > > >>> > > >>> --- a/configs/imx6dl_mamoj_defconfig > > >>> +++ b/configs/imx6dl_mamoj_defconfig > > >>> @@ -61,3 +61,4 @@ CONFIG_USB_GADGET_MANUFACTURER="FSL" > > >>> CONFIG_USB_GADGET_VENDOR_NUM=0x0525 > > >>> CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 > > >>> CONFIG_CI_UDC=y > > >>> +CONFIG_SPL_CRYPTO=n > > >> > > >> No, this is not how defconfig works. > > >> > > >> You should set: > > >> > > >> # CONFIG_SPL_CRYPTO is not set > > > > > > But more, WHY is this the right answer? You're disabling > > > functionality and the board maintainers aren't even on the CC list > > > for this thread it looks like. > > > > This was my blocking point, too, for this series. There is no answer > > about the board. > > > > I can just imagine (as for other MX6DL) that the required > > functionality is secure boot, then CONFIG_IMX_HAB is enough. But well, > > just the board maintainers can say. Added Raffaele and Jagan as > > reported maintainers for this board. > > > > > Why are you not fixing the board so it still links? What makes > > > this board a problem that other (I assume) imx6dl boards are not? > > > > Well, this board has, compared to other MX6DL, a lot of SPL_ option > > that are bloating the SPL size. And then does not match anymore with > > the internal RAm, while other MX6DL boards are not so affected by the > > increased size because they have no SPL at all or SPL with less > > options and then smaller. We do not need to fix the link, but reduce > > the size, and nobody else than the maintainers can tell us if removing > > some feature is ok. > > > > I will test this week, and try to find a board here to test > > * Jagan * Do you have a momoj? Have you tested mamoj board? Regards Gaurav > > Michael > > > Regards, > > Stefano > > > > -- > > > ================================================================ > ===== > > DENX Software Engineering GmbH, Managing Director: Wolfgang Denk > > HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany > > Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic@denx.de > > > ================================================================ > ===== > > > > -- > Michael Nazzareno Trimarchi > Co-Founder & Chief Executive Officer > M. +39 347 913 2170 > michael@amarulasolutions.com > __________________________________ > > Amarula Solutions BV > Joop Geesinkweg 125, 1114 AB, Amsterdam, NL T. +31 (0)85 111 9172 > info@amarulasolutions.com > https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fwww.a > marulasolutions.com%2F&data=04%7C01%7Cgaurav.jain%40nxp.com% > 7C843e57f75346449f13ae08da010867b6%7C686ea1d3bc2b4c6fa92cd99c5c3 > 01635%7C0%7C0%7C637823432854617357%7CUnknown%7CTWFpbGZsb3d8 > eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3 > D%7C3000&sdata=f025HmlIM8FuTEYspDjwOevTT1k7JRZeIiS%2FpTH2hc > Y%3D&reserved=0
Hello Michael A gentle reminder!! As you said earlier, can you test the mamoj board with proposed solution to fix SPL size issue. Regards Gaurav Jain > -----Original Message----- > From: Gaurav Jain > Sent: Monday, March 14, 2022 11:18 AM > To: Michael Nazzareno Trimarchi <michael@amarulasolutions.com>; Stefano > Babic <sbabic@denx.de> > Cc: Tom Rini <trini@konsulko.com>; Fabio Estevam <festevam@gmail.com>; > Michael Walle <michael@walle.cc>; Varun Sethi <V.Sethi@nxp.com>; Adrian > Alonso <adrian.alonso@nxp.com>; Alison Wang <alison.wang@nxp.com>; > Andy Tang <andy.tang@nxp.com>; Franck Lenormand > <franck.lenormand@nxp.com>; Horia Geanta <horia.geanta@nxp.com>; Ji > Luo <ji.luo@nxp.com>; marex@denx.de; Meenakshi Aggarwal > <meenakshi.aggarwal@nxp.com>; Mingkai Hu <mingkai.hu@nxp.com>; > olteanv@gmail.com; Pankaj Gupta <pankaj.gupta@nxp.com>; Peng Fan > <peng.fan@nxp.com>; Pramod Kumar <pramod.kumar_1@nxp.com>; > Priyanka Jain <priyanka.jain@nxp.com>; Rajesh Bhagat > <rajesh.bhagat@nxp.com>; Sahil Malhotra <sahil.malhotra@nxp.com>; > Shengzhou Liu <shengzhou.liu@nxp.com>; Silvano Di Ninno > <silvano.dininno@nxp.com>; sjg@chromium.org; u-boot@lists.denx.de; dl- > uboot-imx <uboot-imx@nxp.com>; Wasim Khan <wasim.khan@nxp.com>; > Ye Li <ye.li@nxp.com>; Raffaele RECALCATI <raffaele.recalcati@bticino.it>; > Jagan Teki <jagan@amarulasolutions.com> > Subject: RE: [EXT] Re: [PATCH v8 01/15] crypto/fsl: Add support for CAAM Job > ring driver model > > Hi Michael > > > -----Original Message----- > > From: Michael Nazzareno Trimarchi <michael@amarulasolutions.com> > > Sent: Tuesday, March 8, 2022 7:05 PM > > To: Stefano Babic <sbabic@denx.de> > > Cc: Tom Rini <trini@konsulko.com>; Fabio Estevam > <festevam@gmail.com>; > > Gaurav Jain <gaurav.jain@nxp.com>; Michael Walle <michael@walle.cc>; > > Varun Sethi <V.Sethi@nxp.com>; Adrian Alonso <adrian.alonso@nxp.com>; > > Alison Wang <alison.wang@nxp.com>; Andy Tang <andy.tang@nxp.com>; > > Franck Lenormand <franck.lenormand@nxp.com>; Horia Geanta > > <horia.geanta@nxp.com>; Ji Luo <ji.luo@nxp.com>; marex@denx.de; > > Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>; Mingkai Hu > > <mingkai.hu@nxp.com>; olteanv@gmail.com; Pankaj Gupta > > <pankaj.gupta@nxp.com>; Peng Fan <peng.fan@nxp.com>; Pramod Kumar > > <pramod.kumar_1@nxp.com>; Priyanka Jain <priyanka.jain@nxp.com>; > > Rajesh Bhagat <rajesh.bhagat@nxp.com>; Sahil Malhotra > > <sahil.malhotra@nxp.com>; Shengzhou Liu <shengzhou.liu@nxp.com>; > > Silvano Di Ninno <silvano.dininno@nxp.com>; sjg@chromium.org; u- > > boot@lists.denx.de; dl-uboot-imx <uboot-imx@nxp.com>; Wasim Khan > > <wasim.khan@nxp.com>; Ye Li <ye.li@nxp.com>; Raffaele RECALCATI > > <raffaele.recalcati@bticino.it>; Jagan Teki > > <jagan@amarulasolutions.com> > > Subject: Re: [EXT] Re: [PATCH v8 01/15] crypto/fsl: Add support for > > CAAM Job ring driver model > > > > Caution: EXT Email > > > > Hi > > > > On Tue, Mar 8, 2022 at 2:28 PM Stefano Babic <sbabic@denx.de> wrote: > > > > > > Hi Tom, > > > > > > On 08.03.22 13:48, Tom Rini wrote: > > > > On Tue, Mar 08, 2022 at 08:12:27AM -0300, Fabio Estevam wrote: > > > >> On Tue, Mar 8, 2022 at 8:10 AM Gaurav Jain <gaurav.jain@nxp.com> > > wrote: > > > >> > > > >>> I further checked on your concern and propose the below change > > > >>> to > > stop building caam driver in SPL for imx6dl_mamoj. > > > >>> > > > >>> --- a/configs/imx6dl_mamoj_defconfig > > > >>> +++ b/configs/imx6dl_mamoj_defconfig > > > >>> @@ -61,3 +61,4 @@ CONFIG_USB_GADGET_MANUFACTURER="FSL" > > > >>> CONFIG_USB_GADGET_VENDOR_NUM=0x0525 > > > >>> CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 > > > >>> CONFIG_CI_UDC=y > > > >>> +CONFIG_SPL_CRYPTO=n > > > >> > > > >> No, this is not how defconfig works. > > > >> > > > >> You should set: > > > >> > > > >> # CONFIG_SPL_CRYPTO is not set > > > > > > > > But more, WHY is this the right answer? You're disabling > > > > functionality and the board maintainers aren't even on the CC list > > > > for this thread it looks like. > > > > > > This was my blocking point, too, for this series. There is no answer > > > about the board. > > > > > > I can just imagine (as for other MX6DL) that the required > > > functionality is secure boot, then CONFIG_IMX_HAB is enough. But > > > well, just the board maintainers can say. Added Raffaele and Jagan > > > as reported maintainers for this board. > > > > > > > Why are you not fixing the board so it still links? What makes > > > > this board a problem that other (I assume) imx6dl boards are not? > > > > > > Well, this board has, compared to other MX6DL, a lot of SPL_ option > > > that are bloating the SPL size. And then does not match anymore with > > > the internal RAm, while other MX6DL boards are not so affected by > > > the increased size because they have no SPL at all or SPL with less > > > options and then smaller. We do not need to fix the link, but reduce > > > the size, and nobody else than the maintainers can tell us if > > > removing some feature is ok. > > > > > > > I will test this week, and try to find a board here to test > > > > * Jagan * Do you have a momoj? > > Have you tested mamoj board? > > Regards > Gaurav > > > > Michael > > > > > Regards, > > > Stefano > > > > > > -- > > > > > > ================================================================ > > ===== > > > DENX Software Engineering GmbH, Managing Director: Wolfgang Denk > > > HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, > > > Germany > > > Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: > > > sbabic@denx.de > > > > > > ================================================================ > > ===== > > > > > > > > -- > > Michael Nazzareno Trimarchi > > Co-Founder & Chief Executive Officer > > M. +39 347 913 2170 > > michael@amarulasolutions.com > > __________________________________ > > > > Amarula Solutions BV > > Joop Geesinkweg 125, 1114 AB, Amsterdam, NL T. +31 (0)85 111 9172 > > info@amarulasolutions.com > > > https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fwww.a > > marulasolutions.com%2F&data=04%7C01%7Cgaurav.jain%40nxp.com% > > > 7C843e57f75346449f13ae08da010867b6%7C686ea1d3bc2b4c6fa92cd99c5c3 > > > 01635%7C0%7C0%7C637823432854617357%7CUnknown%7CTWFpbGZsb3d8 > > > eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3 > > > D%7C3000&sdata=f025HmlIM8FuTEYspDjwOevTT1k7JRZeIiS%2FpTH2hc > > Y%3D&reserved=0
HI Please send me a link to apply your series Michael On Thu, Mar 17, 2022 at 1:10 PM Gaurav Jain <gaurav.jain@nxp.com> wrote: > > Hello Michael > > A gentle reminder!! > As you said earlier, can you test the mamoj board with proposed solution to fix SPL size issue. > > Regards > Gaurav Jain > > > -----Original Message----- > > From: Gaurav Jain > > Sent: Monday, March 14, 2022 11:18 AM > > To: Michael Nazzareno Trimarchi <michael@amarulasolutions.com>; Stefano > > Babic <sbabic@denx.de> > > Cc: Tom Rini <trini@konsulko.com>; Fabio Estevam <festevam@gmail.com>; > > Michael Walle <michael@walle.cc>; Varun Sethi <V.Sethi@nxp.com>; Adrian > > Alonso <adrian.alonso@nxp.com>; Alison Wang <alison.wang@nxp.com>; > > Andy Tang <andy.tang@nxp.com>; Franck Lenormand > > <franck.lenormand@nxp.com>; Horia Geanta <horia.geanta@nxp.com>; Ji > > Luo <ji.luo@nxp.com>; marex@denx.de; Meenakshi Aggarwal > > <meenakshi.aggarwal@nxp.com>; Mingkai Hu <mingkai.hu@nxp.com>; > > olteanv@gmail.com; Pankaj Gupta <pankaj.gupta@nxp.com>; Peng Fan > > <peng.fan@nxp.com>; Pramod Kumar <pramod.kumar_1@nxp.com>; > > Priyanka Jain <priyanka.jain@nxp.com>; Rajesh Bhagat > > <rajesh.bhagat@nxp.com>; Sahil Malhotra <sahil.malhotra@nxp.com>; > > Shengzhou Liu <shengzhou.liu@nxp.com>; Silvano Di Ninno > > <silvano.dininno@nxp.com>; sjg@chromium.org; u-boot@lists.denx.de; dl- > > uboot-imx <uboot-imx@nxp.com>; Wasim Khan <wasim.khan@nxp.com>; > > Ye Li <ye.li@nxp.com>; Raffaele RECALCATI <raffaele.recalcati@bticino.it>; > > Jagan Teki <jagan@amarulasolutions.com> > > Subject: RE: [EXT] Re: [PATCH v8 01/15] crypto/fsl: Add support for CAAM Job > > ring driver model > > > > Hi Michael > > > > > -----Original Message----- > > > From: Michael Nazzareno Trimarchi <michael@amarulasolutions.com> > > > Sent: Tuesday, March 8, 2022 7:05 PM > > > To: Stefano Babic <sbabic@denx.de> > > > Cc: Tom Rini <trini@konsulko.com>; Fabio Estevam > > <festevam@gmail.com>; > > > Gaurav Jain <gaurav.jain@nxp.com>; Michael Walle <michael@walle.cc>; > > > Varun Sethi <V.Sethi@nxp.com>; Adrian Alonso <adrian.alonso@nxp.com>; > > > Alison Wang <alison.wang@nxp.com>; Andy Tang <andy.tang@nxp.com>; > > > Franck Lenormand <franck.lenormand@nxp.com>; Horia Geanta > > > <horia.geanta@nxp.com>; Ji Luo <ji.luo@nxp.com>; marex@denx.de; > > > Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>; Mingkai Hu > > > <mingkai.hu@nxp.com>; olteanv@gmail.com; Pankaj Gupta > > > <pankaj.gupta@nxp.com>; Peng Fan <peng.fan@nxp.com>; Pramod Kumar > > > <pramod.kumar_1@nxp.com>; Priyanka Jain <priyanka.jain@nxp.com>; > > > Rajesh Bhagat <rajesh.bhagat@nxp.com>; Sahil Malhotra > > > <sahil.malhotra@nxp.com>; Shengzhou Liu <shengzhou.liu@nxp.com>; > > > Silvano Di Ninno <silvano.dininno@nxp.com>; sjg@chromium.org; u- > > > boot@lists.denx.de; dl-uboot-imx <uboot-imx@nxp.com>; Wasim Khan > > > <wasim.khan@nxp.com>; Ye Li <ye.li@nxp.com>; Raffaele RECALCATI > > > <raffaele.recalcati@bticino.it>; Jagan Teki > > > <jagan@amarulasolutions.com> > > > Subject: Re: [EXT] Re: [PATCH v8 01/15] crypto/fsl: Add support for > > > CAAM Job ring driver model > > > > > > Caution: EXT Email > > > > > > Hi > > > > > > On Tue, Mar 8, 2022 at 2:28 PM Stefano Babic <sbabic@denx.de> wrote: > > > > > > > > Hi Tom, > > > > > > > > On 08.03.22 13:48, Tom Rini wrote: > > > > > On Tue, Mar 08, 2022 at 08:12:27AM -0300, Fabio Estevam wrote: > > > > >> On Tue, Mar 8, 2022 at 8:10 AM Gaurav Jain <gaurav.jain@nxp.com> > > > wrote: > > > > >> > > > > >>> I further checked on your concern and propose the below change > > > > >>> to > > > stop building caam driver in SPL for imx6dl_mamoj. > > > > >>> > > > > >>> --- a/configs/imx6dl_mamoj_defconfig > > > > >>> +++ b/configs/imx6dl_mamoj_defconfig > > > > >>> @@ -61,3 +61,4 @@ CONFIG_USB_GADGET_MANUFACTURER="FSL" > > > > >>> CONFIG_USB_GADGET_VENDOR_NUM=0x0525 > > > > >>> CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 > > > > >>> CONFIG_CI_UDC=y > > > > >>> +CONFIG_SPL_CRYPTO=n > > > > >> > > > > >> No, this is not how defconfig works. > > > > >> > > > > >> You should set: > > > > >> > > > > >> # CONFIG_SPL_CRYPTO is not set > > > > > > > > > > But more, WHY is this the right answer? You're disabling > > > > > functionality and the board maintainers aren't even on the CC list > > > > > for this thread it looks like. > > > > > > > > This was my blocking point, too, for this series. There is no answer > > > > about the board. > > > > > > > > I can just imagine (as for other MX6DL) that the required > > > > functionality is secure boot, then CONFIG_IMX_HAB is enough. But > > > > well, just the board maintainers can say. Added Raffaele and Jagan > > > > as reported maintainers for this board. > > > > > > > > > Why are you not fixing the board so it still links? What makes > > > > > this board a problem that other (I assume) imx6dl boards are not? > > > > > > > > Well, this board has, compared to other MX6DL, a lot of SPL_ option > > > > that are bloating the SPL size. And then does not match anymore with > > > > the internal RAm, while other MX6DL boards are not so affected by > > > > the increased size because they have no SPL at all or SPL with less > > > > options and then smaller. We do not need to fix the link, but reduce > > > > the size, and nobody else than the maintainers can tell us if > > > > removing some feature is ok. > > > > > > > > > > I will test this week, and try to find a board here to test > > > > > > * Jagan * Do you have a momoj? > > > > Have you tested mamoj board? > > > > Regards > > Gaurav > > > > > > Michael > > > > > > > Regards, > > > > Stefano > > > > > > > > -- > > > > > > > > > ================================================================ > > > ===== > > > > DENX Software Engineering GmbH, Managing Director: Wolfgang Denk > > > > HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, > > > > Germany > > > > Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: > > > > sbabic@denx.de > > > > > > > > > ================================================================ > > > ===== > > > > > > > > > > > > -- > > > Michael Nazzareno Trimarchi > > > Co-Founder & Chief Executive Officer > > > M. +39 347 913 2170 > > > michael@amarulasolutions.com > > > __________________________________ > > > > > > Amarula Solutions BV > > > Joop Geesinkweg 125, 1114 AB, Amsterdam, NL T. +31 (0)85 111 9172 > > > info@amarulasolutions.com > > > > > https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fwww.a > > > marulasolutions.com%2F&data=04%7C01%7Cgaurav.jain%40nxp.com% > > > > > 7C843e57f75346449f13ae08da010867b6%7C686ea1d3bc2b4c6fa92cd99c5c3 > > > > > 01635%7C0%7C0%7C637823432854617357%7CUnknown%7CTWFpbGZsb3d8 > > > > > eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3 > > > > > D%7C3000&sdata=f025HmlIM8FuTEYspDjwOevTT1k7JRZeIiS%2FpTH2hc > > > Y%3D&reserved=0
Hi Gaurav On Sat, Mar 19, 2022 at 10:47 AM Michael Nazzareno Trimarchi <michael@amarulasolutions.com> wrote: > > HI > > Please send me a link to apply your series > > Michael > > On Thu, Mar 17, 2022 at 1:10 PM Gaurav Jain <gaurav.jain@nxp.com> wrote: > > > > Hello Michael > > > > A gentle reminder!! > > As you said earlier, can you test the mamoj board with proposed solution to fix SPL size issue. > > > > Regards > > Gaurav Jain > > > > > -----Original Message----- > > > From: Gaurav Jain > > > Sent: Monday, March 14, 2022 11:18 AM > > > To: Michael Nazzareno Trimarchi <michael@amarulasolutions.com>; Stefano > > > Babic <sbabic@denx.de> > > > Cc: Tom Rini <trini@konsulko.com>; Fabio Estevam <festevam@gmail.com>; > > > Michael Walle <michael@walle.cc>; Varun Sethi <V.Sethi@nxp.com>; Adrian > > > Alonso <adrian.alonso@nxp.com>; Alison Wang <alison.wang@nxp.com>; > > > Andy Tang <andy.tang@nxp.com>; Franck Lenormand > > > <franck.lenormand@nxp.com>; Horia Geanta <horia.geanta@nxp.com>; Ji > > > Luo <ji.luo@nxp.com>; marex@denx.de; Meenakshi Aggarwal > > > <meenakshi.aggarwal@nxp.com>; Mingkai Hu <mingkai.hu@nxp.com>; > > > olteanv@gmail.com; Pankaj Gupta <pankaj.gupta@nxp.com>; Peng Fan > > > <peng.fan@nxp.com>; Pramod Kumar <pramod.kumar_1@nxp.com>; > > > Priyanka Jain <priyanka.jain@nxp.com>; Rajesh Bhagat > > > <rajesh.bhagat@nxp.com>; Sahil Malhotra <sahil.malhotra@nxp.com>; > > > Shengzhou Liu <shengzhou.liu@nxp.com>; Silvano Di Ninno > > > <silvano.dininno@nxp.com>; sjg@chromium.org; u-boot@lists.denx.de; dl- > > > uboot-imx <uboot-imx@nxp.com>; Wasim Khan <wasim.khan@nxp.com>; > > > Ye Li <ye.li@nxp.com>; Raffaele RECALCATI <raffaele.recalcati@bticino.it>; > > > Jagan Teki <jagan@amarulasolutions.com> > > > Subject: RE: [EXT] Re: [PATCH v8 01/15] crypto/fsl: Add support for CAAM Job > > > ring driver model > > > > > > Hi Michael > > > > > > > -----Original Message----- > > > > From: Michael Nazzareno Trimarchi <michael@amarulasolutions.com> > > > > Sent: Tuesday, March 8, 2022 7:05 PM > > > > To: Stefano Babic <sbabic@denx.de> > > > > Cc: Tom Rini <trini@konsulko.com>; Fabio Estevam > > > <festevam@gmail.com>; > > > > Gaurav Jain <gaurav.jain@nxp.com>; Michael Walle <michael@walle.cc>; > > > > Varun Sethi <V.Sethi@nxp.com>; Adrian Alonso <adrian.alonso@nxp.com>; > > > > Alison Wang <alison.wang@nxp.com>; Andy Tang <andy.tang@nxp.com>; > > > > Franck Lenormand <franck.lenormand@nxp.com>; Horia Geanta > > > > <horia.geanta@nxp.com>; Ji Luo <ji.luo@nxp.com>; marex@denx.de; > > > > Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>; Mingkai Hu > > > > <mingkai.hu@nxp.com>; olteanv@gmail.com; Pankaj Gupta > > > > <pankaj.gupta@nxp.com>; Peng Fan <peng.fan@nxp.com>; Pramod Kumar > > > > <pramod.kumar_1@nxp.com>; Priyanka Jain <priyanka.jain@nxp.com>; > > > > Rajesh Bhagat <rajesh.bhagat@nxp.com>; Sahil Malhotra > > > > <sahil.malhotra@nxp.com>; Shengzhou Liu <shengzhou.liu@nxp.com>; > > > > Silvano Di Ninno <silvano.dininno@nxp.com>; sjg@chromium.org; u- > > > > boot@lists.denx.de; dl-uboot-imx <uboot-imx@nxp.com>; Wasim Khan > > > > <wasim.khan@nxp.com>; Ye Li <ye.li@nxp.com>; Raffaele RECALCATI > > > > <raffaele.recalcati@bticino.it>; Jagan Teki > > > > <jagan@amarulasolutions.com> > > > > Subject: Re: [EXT] Re: [PATCH v8 01/15] crypto/fsl: Add support for > > > > CAAM Job ring driver model > > > > > > > > Caution: EXT Email > > > > > > > > Hi > > > > > > > > On Tue, Mar 8, 2022 at 2:28 PM Stefano Babic <sbabic@denx.de> wrote: > > > > > > > > > > Hi Tom, > > > > > > > > > > On 08.03.22 13:48, Tom Rini wrote: > > > > > > On Tue, Mar 08, 2022 at 08:12:27AM -0300, Fabio Estevam wrote: > > > > > >> On Tue, Mar 8, 2022 at 8:10 AM Gaurav Jain <gaurav.jain@nxp.com> > > > > wrote: > > > > > >> > > > > > >>> I further checked on your concern and propose the below change > > > > > >>> to > > > > stop building caam driver in SPL for imx6dl_mamoj. > > > > > >>> > > > > > >>> --- a/configs/imx6dl_mamoj_defconfig > > > > > >>> +++ b/configs/imx6dl_mamoj_defconfig > > > > > >>> @@ -61,3 +61,4 @@ CONFIG_USB_GADGET_MANUFACTURER="FSL" > > > > > >>> CONFIG_USB_GADGET_VENDOR_NUM=0x0525 > > > > > >>> CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 > > > > > >>> CONFIG_CI_UDC=y > > > > > >>> +CONFIG_SPL_CRYPTO=n > > > > > >> > > > > > >> No, this is not how defconfig works. > > > > > >> > > > > > >> You should set: > > > > > >> > > > > > >> # CONFIG_SPL_CRYPTO is not set > > > > > > > > > > > > But more, WHY is this the right answer? You're disabling > > > > > > functionality and the board maintainers aren't even on the CC list > > > > > > for this thread it looks like. > > > > > > > > > > This was my blocking point, too, for this series. There is no answer > > > > > about the board. > > > > > > > > > > I can just imagine (as for other MX6DL) that the required > > > > > functionality is secure boot, then CONFIG_IMX_HAB is enough. But > > > > > well, just the board maintainers can say. Added Raffaele and Jagan > > > > > as reported maintainers for this board. > > > > > > > > > > > Why are you not fixing the board so it still links? What makes > > > > > > this board a problem that other (I assume) imx6dl boards are not? > > > > > > > > > > Well, this board has, compared to other MX6DL, a lot of SPL_ option > > > > > that are bloating the SPL size. And then does not match anymore with > > > > > the internal RAm, while other MX6DL boards are not so affected by > > > > > the increased size because they have no SPL at all or SPL with less > > > > > options and then smaller. We do not need to fix the link, but reduce > > > > > the size, and nobody else than the maintainers can tell us if > > > > > removing some feature is ok. > > > > > > > > > > > > > I will test this week, and try to find a board here to test > > > > > > > > * Jagan * Do you have a momoj? > > > > > > Have you tested mamoj board? > > > git diff diff --git a/arch/arm/mach-imx/mx6/Kconfig b/arch/arm/mach-imx/mx6/Kconfig index 98df4d4e42..b665ec887e 100644 --- a/arch/arm/mach-imx/mx6/Kconfig +++ b/arch/arm/mach-imx/mx6/Kconfig @@ -309,7 +309,6 @@ config TARGET_MX6DL_MAMOJ select PINCTRL select SPL select SPL_DM if SPL - select SPL_GPIO if SPL select SPL_LIBCOMMON_SUPPORT if SPL select SPL_LIBDISK_SUPPORT if SPL select SPL_LIBGENERIC_SUPPORT if SPL I strongly suggest to drop this and check again for now. I don't have access to board and I have asked Jagan Michael > > > Regards > > > Gaurav > > > > > > > > Michael > > > > > > > > > Regards, > > > > > Stefano > > > > > > > > > > -- > > > > > > > > > > > > ================================================================ > > > > ===== > > > > > DENX Software Engineering GmbH, Managing Director: Wolfgang Denk > > > > > HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, > > > > > Germany > > > > > Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: > > > > > sbabic@denx.de > > > > > > > > > > > > ================================================================ > > > > ===== > > > > > > > > > > > > > > > > -- > > > > Michael Nazzareno Trimarchi > > > > Co-Founder & Chief Executive Officer > > > > M. +39 347 913 2170 > > > > michael@amarulasolutions.com > > > > __________________________________ > > > > > > > > Amarula Solutions BV > > > > Joop Geesinkweg 125, 1114 AB, Amsterdam, NL T. +31 (0)85 111 9172 > > > > info@amarulasolutions.com > > > > > > > https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fwww.a > > > > marulasolutions.com%2F&data=04%7C01%7Cgaurav.jain%40nxp.com% > > > > > > > 7C843e57f75346449f13ae08da010867b6%7C686ea1d3bc2b4c6fa92cd99c5c3 > > > > > > > 01635%7C0%7C0%7C637823432854617357%7CUnknown%7CTWFpbGZsb3d8 > > > > > > > eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3 > > > > > > > D%7C3000&sdata=f025HmlIM8FuTEYspDjwOevTT1k7JRZeIiS%2FpTH2hc > > > > Y%3D&reserved=0 > > > > -- > Michael Nazzareno Trimarchi > Co-Founder & Chief Executive Officer > M. +39 347 913 2170 > michael@amarulasolutions.com > __________________________________ > > Amarula Solutions BV > Joop Geesinkweg 125, 1114 AB, Amsterdam, NL > T. +31 (0)85 111 9172 > info@amarulasolutions.com > www.amarulasolutions.com
Hi Michael, On Sat, Mar 19, 2022 at 6:47 AM Michael Nazzareno Trimarchi <michael@amarulasolutions.com> wrote: > > HI > > Please send me a link to apply your series You can get the series from patchwork (just click in the 'series' button) https://patchwork.ozlabs.org/project/uboot/patch/20220112133127.16880-2-gaurav.jain@nxp.com/
Hi On Sat, Mar 19, 2022 at 2:25 PM Fabio Estevam <festevam@gmail.com> wrote: > > Hi Michael, > > On Sat, Mar 19, 2022 at 6:47 AM Michael Nazzareno Trimarchi > <michael@amarulasolutions.com> wrote: > > > > HI > > > > Please send me a link to apply your series > > You can get the series from patchwork (just click in the 'series' button) > https://patchwork.ozlabs.org/project/uboot/patch/20220112133127.16880-2-gaurav.jain@nxp.com/ Done, well, I have tried remove DM_GPIO in SPL. Seems that I need to remove a lot of features. I have tested LTO build but size of SPL increase. Is that strange? Michael
On Sat, Mar 19, 2022 at 02:51:01PM +0100, Michael Nazzareno Trimarchi wrote: > Hi > > On Sat, Mar 19, 2022 at 2:25 PM Fabio Estevam <festevam@gmail.com> wrote: > > > > Hi Michael, > > > > On Sat, Mar 19, 2022 at 6:47 AM Michael Nazzareno Trimarchi > > <michael@amarulasolutions.com> wrote: > > > > > > HI > > > > > > Please send me a link to apply your series > > > > You can get the series from patchwork (just click in the 'series' button) > > https://patchwork.ozlabs.org/project/uboot/patch/20220112133127.16880-2-gaurav.jain@nxp.com/ > > Done, well, I have tried remove DM_GPIO in SPL. Seems that I need to > remove a lot of features. I have tested LTO build but size > of SPL increase. Is that strange? That is very strange. Can you post your patches somewhere?
Hi Tom On Sat, Mar 19, 2022 at 5:05 PM Tom Rini <trini@konsulko.com> wrote: > > On Sat, Mar 19, 2022 at 02:51:01PM +0100, Michael Nazzareno Trimarchi wrote: > > Hi > > > > On Sat, Mar 19, 2022 at 2:25 PM Fabio Estevam <festevam@gmail.com> wrote: > > > > > > Hi Michael, > > > > > > On Sat, Mar 19, 2022 at 6:47 AM Michael Nazzareno Trimarchi > > > <michael@amarulasolutions.com> wrote: > > > > > > > > HI > > > > > > > > Please send me a link to apply your series > > > > > > You can get the series from patchwork (just click in the 'series' button) > > > https://patchwork.ozlabs.org/project/uboot/patch/20220112133127.16880-2-gaurav.jain@nxp.com/ > > > > Done, well, I have tried remove DM_GPIO in SPL. Seems that I need to > > remove a lot of features. I have tested LTO build but size > > of SPL increase. Is that strange? > > That is very strange. Can you post your patches somewhere? > > -- > Tom Start from here 9776c4e9d00ac49d6388ffe9e084ff03b37ae479 export ARCH=arm export CROSS_COMPILE=arm-linux-gnueabihf- make imx6dl_mamoj_defconfig build it Try then to enable LTO and build it again spl/u-boot-spl.bin exceeds file size limit: limit: 0xefa0 bytes actual: 0xf071 bytes excess: 0xd1 bytes So LTO does not help even on beginning on this board. You don't need to apply any patch for this test Michael
On Sat, Mar 19, 2022 at 05:48:59PM +0100, Michael Nazzareno Trimarchi wrote: > Hi Tom > > On Sat, Mar 19, 2022 at 5:05 PM Tom Rini <trini@konsulko.com> wrote: > > > > On Sat, Mar 19, 2022 at 02:51:01PM +0100, Michael Nazzareno Trimarchi wrote: > > > Hi > > > > > > On Sat, Mar 19, 2022 at 2:25 PM Fabio Estevam <festevam@gmail.com> wrote: > > > > > > > > Hi Michael, > > > > > > > > On Sat, Mar 19, 2022 at 6:47 AM Michael Nazzareno Trimarchi > > > > <michael@amarulasolutions.com> wrote: > > > > > > > > > > HI > > > > > > > > > > Please send me a link to apply your series > > > > > > > > You can get the series from patchwork (just click in the 'series' button) > > > > https://patchwork.ozlabs.org/project/uboot/patch/20220112133127.16880-2-gaurav.jain@nxp.com/ > > > > > > Done, well, I have tried remove DM_GPIO in SPL. Seems that I need to > > > remove a lot of features. I have tested LTO build but size > > > of SPL increase. Is that strange? > > > > That is very strange. Can you post your patches somewhere? > > > > -- > > Tom > > Start from here 9776c4e9d00ac49d6388ffe9e084ff03b37ae479 > export ARCH=arm > export CROSS_COMPILE=arm-linux-gnueabihf- > > make imx6dl_mamoj_defconfig > build it > > Try then to enable LTO and build it again > > spl/u-boot-spl.bin exceeds file size limit: > limit: 0xefa0 bytes > actual: 0xf071 bytes > excess: 0xd1 bytes > > So LTO does not help even on beginning on this board. You don't need > to apply any patch for this test I think that's some artifact of mixing LTO/non-LTO and the world not getting rebuilt? Just enabling LTO after the defconfig works fine and is smaller than before.
Hi Tom On Sat, Mar 19, 2022 at 6:03 PM Tom Rini <trini@konsulko.com> wrote: > > On Sat, Mar 19, 2022 at 05:48:59PM +0100, Michael Nazzareno Trimarchi wrote: > > Hi Tom > > > > On Sat, Mar 19, 2022 at 5:05 PM Tom Rini <trini@konsulko.com> wrote: > > > > > > On Sat, Mar 19, 2022 at 02:51:01PM +0100, Michael Nazzareno Trimarchi wrote: > > > > Hi > > > > > > > > On Sat, Mar 19, 2022 at 2:25 PM Fabio Estevam <festevam@gmail.com> wrote: > > > > > > > > > > Hi Michael, > > > > > > > > > > On Sat, Mar 19, 2022 at 6:47 AM Michael Nazzareno Trimarchi > > > > > <michael@amarulasolutions.com> wrote: > > > > > > > > > > > > HI > > > > > > > > > > > > Please send me a link to apply your series > > > > > > > > > > You can get the series from patchwork (just click in the 'series' button) > > > > > https://patchwork.ozlabs.org/project/uboot/patch/20220112133127.16880-2-gaurav.jain@nxp.com/ > > > > > > > > Done, well, I have tried remove DM_GPIO in SPL. Seems that I need to > > > > remove a lot of features. I have tested LTO build but size > > > > of SPL increase. Is that strange? > > > > > > That is very strange. Can you post your patches somewhere? > > > > > > -- > > > Tom > > > > Start from here 9776c4e9d00ac49d6388ffe9e084ff03b37ae479 > > export ARCH=arm > > export CROSS_COMPILE=arm-linux-gnueabihf- > > > > make imx6dl_mamoj_defconfig > > build it > > > > Try then to enable LTO and build it again > > > > spl/u-boot-spl.bin exceeds file size limit: > > limit: 0xefa0 bytes > > actual: 0xf071 bytes > > excess: 0xd1 bytes > > > > So LTO does not help even on beginning on this board. You don't need > > to apply any patch for this test > > I think that's some artifact of mixing LTO/non-LTO and the world not > getting rebuilt? Just enabling LTO after the defconfig works fine and > is smaller than before. > In order to save space I did not change what we have. Every build starts from a mrproper and new configuration. I can not mix LTO/non-LTO in this case. I'm using upstream defconfig and upstream defconfig + LTO enabled and the result is that spl increase in size for LTO building. I'm working to keep out part that are not really needed but I was hoping that LTO give me some help here Michael > -- > Tom
On Sat, Mar 19, 2022 at 06:08:18PM +0100, Michael Nazzareno Trimarchi wrote: > Hi Tom > > On Sat, Mar 19, 2022 at 6:03 PM Tom Rini <trini@konsulko.com> wrote: > > > > On Sat, Mar 19, 2022 at 05:48:59PM +0100, Michael Nazzareno Trimarchi wrote: > > > Hi Tom > > > > > > On Sat, Mar 19, 2022 at 5:05 PM Tom Rini <trini@konsulko.com> wrote: > > > > > > > > On Sat, Mar 19, 2022 at 02:51:01PM +0100, Michael Nazzareno Trimarchi wrote: > > > > > Hi > > > > > > > > > > On Sat, Mar 19, 2022 at 2:25 PM Fabio Estevam <festevam@gmail.com> wrote: > > > > > > > > > > > > Hi Michael, > > > > > > > > > > > > On Sat, Mar 19, 2022 at 6:47 AM Michael Nazzareno Trimarchi > > > > > > <michael@amarulasolutions.com> wrote: > > > > > > > > > > > > > > HI > > > > > > > > > > > > > > Please send me a link to apply your series > > > > > > > > > > > > You can get the series from patchwork (just click in the 'series' button) > > > > > > https://patchwork.ozlabs.org/project/uboot/patch/20220112133127.16880-2-gaurav.jain@nxp.com/ > > > > > > > > > > Done, well, I have tried remove DM_GPIO in SPL. Seems that I need to > > > > > remove a lot of features. I have tested LTO build but size > > > > > of SPL increase. Is that strange? > > > > > > > > That is very strange. Can you post your patches somewhere? > > > > > > > > -- > > > > Tom > > > > > > Start from here 9776c4e9d00ac49d6388ffe9e084ff03b37ae479 > > > export ARCH=arm > > > export CROSS_COMPILE=arm-linux-gnueabihf- > > > > > > make imx6dl_mamoj_defconfig > > > build it > > > > > > Try then to enable LTO and build it again > > > > > > spl/u-boot-spl.bin exceeds file size limit: > > > limit: 0xefa0 bytes > > > actual: 0xf071 bytes > > > excess: 0xd1 bytes > > > > > > So LTO does not help even on beginning on this board. You don't need > > > to apply any patch for this test > > > > I think that's some artifact of mixing LTO/non-LTO and the world not > > getting rebuilt? Just enabling LTO after the defconfig works fine and > > is smaller than before. > > In order to save space I did not change what we have. Every build starts from > a mrproper and new configuration. I can not mix LTO/non-LTO in this case. I'm > using upstream defconfig and upstream defconfig + LTO enabled and the result is > that spl increase in size for LTO building. I'm working to keep out > part that are not really needed but > I was hoping that LTO give me some help here Yes, LTO saves about 5KiB on the SPL binary. You just need to enable it in the config before you start building, not after you've built everything once.
Hi On Sat, Mar 19, 2022 at 6:25 PM Tom Rini <trini@konsulko.com> wrote: > > On Sat, Mar 19, 2022 at 06:08:18PM +0100, Michael Nazzareno Trimarchi wrote: > > Hi Tom > > > > On Sat, Mar 19, 2022 at 6:03 PM Tom Rini <trini@konsulko.com> wrote: > > > > > > On Sat, Mar 19, 2022 at 05:48:59PM +0100, Michael Nazzareno Trimarchi wrote: > > > > Hi Tom > > > > > > > > On Sat, Mar 19, 2022 at 5:05 PM Tom Rini <trini@konsulko.com> wrote: > > > > > > > > > > On Sat, Mar 19, 2022 at 02:51:01PM +0100, Michael Nazzareno Trimarchi wrote: > > > > > > Hi > > > > > > > > > > > > On Sat, Mar 19, 2022 at 2:25 PM Fabio Estevam <festevam@gmail.com> wrote: > > > > > > > > > > > > > > Hi Michael, > > > > > > > > > > > > > > On Sat, Mar 19, 2022 at 6:47 AM Michael Nazzareno Trimarchi > > > > > > > <michael@amarulasolutions.com> wrote: > > > > > > > > > > > > > > > > HI > > > > > > > > > > > > > > > > Please send me a link to apply your series > > > > > > > > > > > > > > You can get the series from patchwork (just click in the 'series' button) > > > > > > > https://patchwork.ozlabs.org/project/uboot/patch/20220112133127.16880-2-gaurav.jain@nxp.com/ > > > > > > > > > > > > Done, well, I have tried remove DM_GPIO in SPL. Seems that I need to > > > > > > remove a lot of features. I have tested LTO build but size > > > > > > of SPL increase. Is that strange? > > > > > > > > > > That is very strange. Can you post your patches somewhere? > > > > > > > > > > -- > > > > > Tom > > > > > > > > Start from here 9776c4e9d00ac49d6388ffe9e084ff03b37ae479 > > > > export ARCH=arm > > > > export CROSS_COMPILE=arm-linux-gnueabihf- > > > > > > > > make imx6dl_mamoj_defconfig > > > > build it > > > > > > > > Try then to enable LTO and build it again > > > > > > > > spl/u-boot-spl.bin exceeds file size limit: > > > > limit: 0xefa0 bytes > > > > actual: 0xf071 bytes > > > > excess: 0xd1 bytes > > > > > > > > So LTO does not help even on beginning on this board. You don't need > > > > to apply any patch for this test > > > > > > I think that's some artifact of mixing LTO/non-LTO and the world not > > > getting rebuilt? Just enabling LTO after the defconfig works fine and > > > is smaller than before. > > > > In order to save space I did not change what we have. Every build starts from > > a mrproper and new configuration. I can not mix LTO/non-LTO in this case. I'm > > using upstream defconfig and upstream defconfig + LTO enabled and the result is > > that spl increase in size for LTO building. I'm working to keep out > > part that are not really needed but > > I was hoping that LTO give me some help here > > Yes, LTO saves about 5KiB on the SPL binary. You just need to enable it > in the config before you start building, not after you've built > everything once. Offcourse ;) but this not the case. I don't drink enough to think that change a config, decrease the build size ;) Michael > > -- > Tom
On Sat, Mar 19, 2022 at 06:27:38PM +0100, Michael Nazzareno Trimarchi wrote: > Hi > > On Sat, Mar 19, 2022 at 6:25 PM Tom Rini <trini@konsulko.com> wrote: > > > > On Sat, Mar 19, 2022 at 06:08:18PM +0100, Michael Nazzareno Trimarchi wrote: > > > Hi Tom > > > > > > On Sat, Mar 19, 2022 at 6:03 PM Tom Rini <trini@konsulko.com> wrote: > > > > > > > > On Sat, Mar 19, 2022 at 05:48:59PM +0100, Michael Nazzareno Trimarchi wrote: > > > > > Hi Tom > > > > > > > > > > On Sat, Mar 19, 2022 at 5:05 PM Tom Rini <trini@konsulko.com> wrote: > > > > > > > > > > > > On Sat, Mar 19, 2022 at 02:51:01PM +0100, Michael Nazzareno Trimarchi wrote: > > > > > > > Hi > > > > > > > > > > > > > > On Sat, Mar 19, 2022 at 2:25 PM Fabio Estevam <festevam@gmail.com> wrote: > > > > > > > > > > > > > > > > Hi Michael, > > > > > > > > > > > > > > > > On Sat, Mar 19, 2022 at 6:47 AM Michael Nazzareno Trimarchi > > > > > > > > <michael@amarulasolutions.com> wrote: > > > > > > > > > > > > > > > > > > HI > > > > > > > > > > > > > > > > > > Please send me a link to apply your series > > > > > > > > > > > > > > > > You can get the series from patchwork (just click in the 'series' button) > > > > > > > > https://patchwork.ozlabs.org/project/uboot/patch/20220112133127.16880-2-gaurav.jain@nxp.com/ > > > > > > > > > > > > > > Done, well, I have tried remove DM_GPIO in SPL. Seems that I need to > > > > > > > remove a lot of features. I have tested LTO build but size > > > > > > > of SPL increase. Is that strange? > > > > > > > > > > > > That is very strange. Can you post your patches somewhere? > > > > > > > > > > > > -- > > > > > > Tom > > > > > > > > > > Start from here 9776c4e9d00ac49d6388ffe9e084ff03b37ae479 > > > > > export ARCH=arm > > > > > export CROSS_COMPILE=arm-linux-gnueabihf- > > > > > > > > > > make imx6dl_mamoj_defconfig > > > > > build it > > > > > > > > > > Try then to enable LTO and build it again > > > > > > > > > > spl/u-boot-spl.bin exceeds file size limit: > > > > > limit: 0xefa0 bytes > > > > > actual: 0xf071 bytes > > > > > excess: 0xd1 bytes > > > > > > > > > > So LTO does not help even on beginning on this board. You don't need > > > > > to apply any patch for this test > > > > > > > > I think that's some artifact of mixing LTO/non-LTO and the world not > > > > getting rebuilt? Just enabling LTO after the defconfig works fine and > > > > is smaller than before. > > > > > > In order to save space I did not change what we have. Every build starts from > > > a mrproper and new configuration. I can not mix LTO/non-LTO in this case. I'm > > > using upstream defconfig and upstream defconfig + LTO enabled and the result is > > > that spl increase in size for LTO building. I'm working to keep out > > > part that are not really needed but > > > I was hoping that LTO give me some help here > > > > Yes, LTO saves about 5KiB on the SPL binary. You just need to enable it > > in the config before you start building, not after you've built > > everything once. > > Offcourse ;) but this not the case. I don't drink enough to think that > change a config, decrease the build size ;) LTO is an entirely different way of the compiler / linker optimizing the binary. So yes, in this case enabling a single option decreases the size.
Hi Tom On Sat, Mar 19, 2022 at 6:30 PM Tom Rini <trini@konsulko.com> wrote: > > On Sat, Mar 19, 2022 at 06:27:38PM +0100, Michael Nazzareno Trimarchi wrote: > > Hi > > > > On Sat, Mar 19, 2022 at 6:25 PM Tom Rini <trini@konsulko.com> wrote: > > > > > > On Sat, Mar 19, 2022 at 06:08:18PM +0100, Michael Nazzareno Trimarchi wrote: > > > > Hi Tom > > > > > > > > On Sat, Mar 19, 2022 at 6:03 PM Tom Rini <trini@konsulko.com> wrote: > > > > > > > > > > On Sat, Mar 19, 2022 at 05:48:59PM +0100, Michael Nazzareno Trimarchi wrote: > > > > > > Hi Tom > > > > > > > > > > > > On Sat, Mar 19, 2022 at 5:05 PM Tom Rini <trini@konsulko.com> wrote: > > > > > > > > > > > > > > On Sat, Mar 19, 2022 at 02:51:01PM +0100, Michael Nazzareno Trimarchi wrote: > > > > > > > > Hi > > > > > > > > > > > > > > > > On Sat, Mar 19, 2022 at 2:25 PM Fabio Estevam <festevam@gmail.com> wrote: > > > > > > > > > > > > > > > > > > Hi Michael, > > > > > > > > > > > > > > > > > > On Sat, Mar 19, 2022 at 6:47 AM Michael Nazzareno Trimarchi > > > > > > > > > <michael@amarulasolutions.com> wrote: > > > > > > > > > > > > > > > > > > > > HI > > > > > > > > > > > > > > > > > > > > Please send me a link to apply your series > > > > > > > > > > > > > > > > > > You can get the series from patchwork (just click in the 'series' button) > > > > > > > > > https://patchwork.ozlabs.org/project/uboot/patch/20220112133127.16880-2-gaurav.jain@nxp.com/ > > > > > > > > > > > > > > > > Done, well, I have tried remove DM_GPIO in SPL. Seems that I need to > > > > > > > > remove a lot of features. I have tested LTO build but size > > > > > > > > of SPL increase. Is that strange? > > > > > > > > > > > > > > That is very strange. Can you post your patches somewhere? > > > > > > > > > > > > > > -- > > > > > > > Tom > > > > > > > > > > > > Start from here 9776c4e9d00ac49d6388ffe9e084ff03b37ae479 > > > > > > export ARCH=arm > > > > > > export CROSS_COMPILE=arm-linux-gnueabihf- > > > > > > > > > > > > make imx6dl_mamoj_defconfig > > > > > > build it > > > > > > > > > > > > Try then to enable LTO and build it again > > > > > > > > > > > > spl/u-boot-spl.bin exceeds file size limit: > > > > > > limit: 0xefa0 bytes > > > > > > actual: 0xf071 bytes > > > > > > excess: 0xd1 bytes > > > > > > > > > > > > So LTO does not help even on beginning on this board. You don't need > > > > > > to apply any patch for this test > > > > > > > > > > I think that's some artifact of mixing LTO/non-LTO and the world not > > > > > getting rebuilt? Just enabling LTO after the defconfig works fine and > > > > > is smaller than before. > > > > > > > > In order to save space I did not change what we have. Every build starts from > > > > a mrproper and new configuration. I can not mix LTO/non-LTO in this case. I'm > > > > using upstream defconfig and upstream defconfig + LTO enabled and the result is > > > > that spl increase in size for LTO building. I'm working to keep out > > > > part that are not really needed but > > > > I was hoping that LTO give me some help here > > > > > > Yes, LTO saves about 5KiB on the SPL binary. You just need to enable it > > > in the config before you start building, not after you've built > > > everything once. > > > > Offcourse ;) but this not the case. I don't drink enough to think that > > change a config, decrease the build size ;) > > LTO is an entirely different way of the compiler / linker optimizing the > binary. So yes, in this case enabling a single option decreases the > size. I think we are in a circle. Let's have the result with LTO spl/keep-syms-lto.c ( cd spl && arm-linux-gnueabihf-gcc -nostdlib -nostartfiles -fuse-linker-plugin -flto=8 -Wall -Wstrict-prototypes -Wno-format-security -fno-builtin -ffreestanding -std=gnu11 -fshort-wchar -fno-strict-aliasing -fno-PIE -Os -flto=8 -fno-stack-protector -fno-delete-null-pointer-checks -Wno-pointer-sign -Wno-stringop-truncation -Wno-array-bounds -Wno-stringop-overflow -Wno-maybe-uninitialized -fmacro-prefix-map=./= -g -fstack-usage -Wno-format-nonliteral -Wno-address-of-packed-member -Wno-unused-but-set-variable -Werror=date-time -Wno-packed-not-aligned -ffunction-sections -fdata-sections -fno-stack-protector -D__KERNEL__ -D__UBOOT__ -DCONFIG_SPL_BUILD -D__ARM__ -Wa,-mimplicit-it=always -mthumb -mthumb-interwork -mabi=aapcs-linux -mno-unaligned-access -fno-common -ffixed-r9 -msoft-float -mgeneral-regs-only -pipe -march=armv7-a -D__LINUX_ARM_ARCH__=7 -mtune=generic-armv7-a -Ispl/include -Iinclude -I./arch/arm/include -include ./include/linux/kconfig.h -nostdinc -isystem /usr/lib/gcc-cross/arm-linux-gnueabihf/9/include -Wl,-T -Wl,u-boot-spl.lds -Wl,-Bstatic -Wl,--gc-sections -Wl,--no-dynamic-linker -Wl,--build-id=none -Wl,-Ttext -Wl,0x00908000 arch/arm/cpu/armv7/start.o -Wl,--whole-archive arch/arm/cpu/armv7/built-in.o arch/arm/cpu/built-in.o arch/arm/lib/built-in.o arch/arm/mach-imx/built-in.o board/bticino/mamoj/built-in.o common/spl/built-in.o common/init/built-in.o boot/built-in.o common/built-in.o cmd/built-in.o env/built-in.o lib/built-in.o disk/built-in.o drivers/built-in.o drivers/usb/dwc3/built-in.o drivers/usb/cdns3/built-in.o dts/built-in.o fs/built-in.o keep-syms-lto.o arch/arm/lib/eabi_compat.o arch/arm/lib/lib.a -Wl,--no-whole-archive -Wl,-Map,u-boot-spl.map -o u-boot-spl ) arm-linux-gnueabihf-objcopy -j .text -j .secure_text -j .secure_data -j .rodata -j .hash -j .data -j .got -j .got.plt -j .u_boot_list -j .rel.dyn -j .binman_sym_table -j .text_rest -j .dtb.init.rodata -j .efi_runtime -j .efi_runtime_rel -O binary spl/u-boot-spl spl/u-boot-spl-nodtb.bin arm-linux-gnueabihf-objdump -t spl/u-boot-spl > spl/u-boot-spl.sym cat spl/u-boot-spl-nodtb.bin spl/u-boot-spl.dtb > spl/u-boot-spl-dtb.bin cp spl/u-boot-spl-dtb.bin spl/u-boot-spl.bin spl/u-boot-spl.bin exceeds file size limit: limit: 0xefa0 bytes actual: 0xf079 bytes excess: 0xd9 bytes make: *** [Makefile:2082: spl/u-boot-spl.bin] Error 1 make: *** Deleting file 'spl/u-boot-spl.bin' and without NUX_ARM_ARCH__=7 -mtune=generic-armv7-a -D__ASSEMBLY__ -x c -o spl/u-boot-spl.cfgout arch/arm/mach-imx/spl_sd.cfg ./tools/mkimage -n spl/u-boot-spl.cfgout -T imximage -e 0x00908000 -d spl/u-boot-spl.bin SPL >SPL.log && cat SPL.log Image Type: Freescale IMX Boot Image Image Ver: 2 (i.MX53/6/7 compatible) Mode: DCD Data Size: 73824 Bytes = 72.09 KiB = 0.07 MiB Load Address: 00907420 Entry Point: 00908000 HAB Blocks: 0x00907400 0x00000000 0x0000fc00 DCD Blocks: 0x00910000 0x0000002c 0x00000004 make -f ./scripts/Makefile.build obj=arch/arm/mach-imx u-boot-with-spl.imx mkdir -p spl/ ./tools/mkimage -n spl/u-boot-spl.cfgout -T imximage -e 0x00908000 -d spl/u-boot-spl.bin SPL >SPL.log && cat SPL.log Image Type: Freescale IMX Boot Image Image Ver: 2 (i.MX53/6/7 compatible) Mode: DCD Data Size: 73824 Bytes = 72.09 KiB = 0.07 MiB Load Address: 00907420 Entry Point: 00908000 HAB Blocks: 0x00907400 0x00000000 0x0000fc00 DCD Blocks: 0x00910000 0x0000002c 0x00000004 arm-linux-gnueabihf-objcopy -j .text -j .secure_text -j .secure_data -j .rodata -j .hash -j .data -j .got -j .got.plt -j .u_boot_list -j .rel.dyn -j .binman_sym_table -j .text_rest -j .dtb.init.rodata -j .efi_runtime -j .efi_runtime_rel -I binary -O binary --pad-to=0x11000 SPL u-boot-with-spl.imx && cat u-boot.img >> u-boot-with-spl.imx || rm -f u-boot-with-spl.imx What I'm trying to say is that I have followed the correct steps and this is the LTO change git diff diff --git a/configs/imx6dl_mamoj_defconfig b/configs/imx6dl_mamoj_defconfig index ae27857e6f..4a535012b2 100644 --- a/configs/imx6dl_mamoj_defconfig +++ b/configs/imx6dl_mamoj_defconfig @@ -14,6 +14,7 @@ CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_DRIVERS_MISC=y CONFIG_IMX_HAB=y # CONFIG_CMD_BMODE is not set +CONFIG_LTO=y CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTDELAY=3 CONFIG_SPL_OS_BOOT=y Michael > > -- > Tom
On Sat, Mar 19, 2022 at 06:37:18PM +0100, Michael Nazzareno Trimarchi wrote: > Hi Tom > > On Sat, Mar 19, 2022 at 6:30 PM Tom Rini <trini@konsulko.com> wrote: > > > > On Sat, Mar 19, 2022 at 06:27:38PM +0100, Michael Nazzareno Trimarchi wrote: > > > Hi > > > > > > On Sat, Mar 19, 2022 at 6:25 PM Tom Rini <trini@konsulko.com> wrote: > > > > > > > > On Sat, Mar 19, 2022 at 06:08:18PM +0100, Michael Nazzareno Trimarchi wrote: > > > > > Hi Tom > > > > > > > > > > On Sat, Mar 19, 2022 at 6:03 PM Tom Rini <trini@konsulko.com> wrote: > > > > > > > > > > > > On Sat, Mar 19, 2022 at 05:48:59PM +0100, Michael Nazzareno Trimarchi wrote: > > > > > > > Hi Tom > > > > > > > > > > > > > > On Sat, Mar 19, 2022 at 5:05 PM Tom Rini <trini@konsulko.com> wrote: > > > > > > > > > > > > > > > > On Sat, Mar 19, 2022 at 02:51:01PM +0100, Michael Nazzareno Trimarchi wrote: > > > > > > > > > Hi > > > > > > > > > > > > > > > > > > On Sat, Mar 19, 2022 at 2:25 PM Fabio Estevam <festevam@gmail.com> wrote: > > > > > > > > > > > > > > > > > > > > Hi Michael, > > > > > > > > > > > > > > > > > > > > On Sat, Mar 19, 2022 at 6:47 AM Michael Nazzareno Trimarchi > > > > > > > > > > <michael@amarulasolutions.com> wrote: > > > > > > > > > > > > > > > > > > > > > > HI > > > > > > > > > > > > > > > > > > > > > > Please send me a link to apply your series > > > > > > > > > > > > > > > > > > > > You can get the series from patchwork (just click in the 'series' button) > > > > > > > > > > https://patchwork.ozlabs.org/project/uboot/patch/20220112133127.16880-2-gaurav.jain@nxp.com/ > > > > > > > > > > > > > > > > > > Done, well, I have tried remove DM_GPIO in SPL. Seems that I need to > > > > > > > > > remove a lot of features. I have tested LTO build but size > > > > > > > > > of SPL increase. Is that strange? > > > > > > > > > > > > > > > > That is very strange. Can you post your patches somewhere? > > > > > > > > > > > > > > > > -- > > > > > > > > Tom > > > > > > > > > > > > > > Start from here 9776c4e9d00ac49d6388ffe9e084ff03b37ae479 > > > > > > > export ARCH=arm > > > > > > > export CROSS_COMPILE=arm-linux-gnueabihf- > > > > > > > > > > > > > > make imx6dl_mamoj_defconfig > > > > > > > build it > > > > > > > > > > > > > > Try then to enable LTO and build it again > > > > > > > > > > > > > > spl/u-boot-spl.bin exceeds file size limit: > > > > > > > limit: 0xefa0 bytes > > > > > > > actual: 0xf071 bytes > > > > > > > excess: 0xd1 bytes > > > > > > > > > > > > > > So LTO does not help even on beginning on this board. You don't need > > > > > > > to apply any patch for this test > > > > > > > > > > > > I think that's some artifact of mixing LTO/non-LTO and the world not > > > > > > getting rebuilt? Just enabling LTO after the defconfig works fine and > > > > > > is smaller than before. > > > > > > > > > > In order to save space I did not change what we have. Every build starts from > > > > > a mrproper and new configuration. I can not mix LTO/non-LTO in this case. I'm > > > > > using upstream defconfig and upstream defconfig + LTO enabled and the result is > > > > > that spl increase in size for LTO building. I'm working to keep out > > > > > part that are not really needed but > > > > > I was hoping that LTO give me some help here > > > > > > > > Yes, LTO saves about 5KiB on the SPL binary. You just need to enable it > > > > in the config before you start building, not after you've built > > > > everything once. > > > > > > Offcourse ;) but this not the case. I don't drink enough to think that > > > change a config, decrease the build size ;) > > > > LTO is an entirely different way of the compiler / linker optimizing the > > binary. So yes, in this case enabling a single option decreases the > > size. > > > I think we are in a circle. Let's have the result with LTO > > spl/keep-syms-lto.c > ( cd spl && arm-linux-gnueabihf-gcc -nostdlib -nostartfiles > -fuse-linker-plugin -flto=8 -Wall -Wstrict-prototypes > -Wno-format-security -fno-builtin -ffreestanding -std=gnu11 > -fshort-wchar -fno-strict-aliasing -fno-PIE -Os -flto=8 > -fno-stack-protector -fno-delete-null-pointer-checks -Wno-pointer-sign > -Wno-stringop-truncation -Wno-array-bounds -Wno-stringop-overflow > -Wno-maybe-uninitialized -fmacro-prefix-map=./= -g -fstack-usage > -Wno-format-nonliteral -Wno-address-of-packed-member > -Wno-unused-but-set-variable -Werror=date-time -Wno-packed-not-aligned > -ffunction-sections -fdata-sections -fno-stack-protector -D__KERNEL__ > -D__UBOOT__ -DCONFIG_SPL_BUILD -D__ARM__ -Wa,-mimplicit-it=always > -mthumb -mthumb-interwork -mabi=aapcs-linux -mno-unaligned-access > -fno-common -ffixed-r9 -msoft-float -mgeneral-regs-only -pipe > -march=armv7-a -D__LINUX_ARM_ARCH__=7 -mtune=generic-armv7-a > -Ispl/include -Iinclude -I./arch/arm/include -include > ./include/linux/kconfig.h -nostdinc -isystem > /usr/lib/gcc-cross/arm-linux-gnueabihf/9/include -Wl,-T > -Wl,u-boot-spl.lds -Wl,-Bstatic -Wl,--gc-sections > -Wl,--no-dynamic-linker -Wl,--build-id=none -Wl,-Ttext -Wl,0x00908000 > arch/arm/cpu/armv7/start.o -Wl,--whole-archive > arch/arm/cpu/armv7/built-in.o arch/arm/cpu/built-in.o > arch/arm/lib/built-in.o arch/arm/mach-imx/built-in.o > board/bticino/mamoj/built-in.o common/spl/built-in.o > common/init/built-in.o boot/built-in.o common/built-in.o > cmd/built-in.o env/built-in.o lib/built-in.o disk/built-in.o > drivers/built-in.o drivers/usb/dwc3/built-in.o > drivers/usb/cdns3/built-in.o dts/built-in.o fs/built-in.o > keep-syms-lto.o arch/arm/lib/eabi_compat.o arch/arm/lib/lib.a > -Wl,--no-whole-archive -Wl,-Map,u-boot-spl.map -o u-boot-spl ) > arm-linux-gnueabihf-objcopy -j .text -j .secure_text -j > .secure_data -j .rodata -j .hash -j .data -j .got -j .got.plt -j > .u_boot_list -j .rel.dyn -j .binman_sym_table -j .text_rest -j > .dtb.init.rodata -j .efi_runtime -j .efi_runtime_rel -O binary > spl/u-boot-spl spl/u-boot-spl-nodtb.bin > arm-linux-gnueabihf-objdump -t spl/u-boot-spl > spl/u-boot-spl.sym > cat spl/u-boot-spl-nodtb.bin spl/u-boot-spl.dtb > spl/u-boot-spl-dtb.bin > cp spl/u-boot-spl-dtb.bin spl/u-boot-spl.bin > spl/u-boot-spl.bin exceeds file size limit: > limit: 0xefa0 bytes > actual: 0xf079 bytes > excess: 0xd9 bytes > make: *** [Makefile:2082: spl/u-boot-spl.bin] Error 1 > make: *** Deleting file 'spl/u-boot-spl.bin' > > and without > > NUX_ARM_ARCH__=7 -mtune=generic-armv7-a -D__ASSEMBLY__ -x c -o > spl/u-boot-spl.cfgout arch/arm/mach-imx/spl_sd.cfg > ./tools/mkimage -n spl/u-boot-spl.cfgout -T imximage -e 0x00908000 > -d spl/u-boot-spl.bin SPL >SPL.log && cat SPL.log > Image Type: Freescale IMX Boot Image > Image Ver: 2 (i.MX53/6/7 compatible) > Mode: DCD > Data Size: 73824 Bytes = 72.09 KiB = 0.07 MiB > Load Address: 00907420 > Entry Point: 00908000 > HAB Blocks: 0x00907400 0x00000000 0x0000fc00 > DCD Blocks: 0x00910000 0x0000002c 0x00000004 > make -f ./scripts/Makefile.build obj=arch/arm/mach-imx u-boot-with-spl.imx > mkdir -p spl/ > ./tools/mkimage -n spl/u-boot-spl.cfgout -T imximage -e 0x00908000 > -d spl/u-boot-spl.bin SPL >SPL.log && cat SPL.log > Image Type: Freescale IMX Boot Image > Image Ver: 2 (i.MX53/6/7 compatible) > Mode: DCD > Data Size: 73824 Bytes = 72.09 KiB = 0.07 MiB > Load Address: 00907420 > Entry Point: 00908000 > HAB Blocks: 0x00907400 0x00000000 0x0000fc00 > DCD Blocks: 0x00910000 0x0000002c 0x00000004 > arm-linux-gnueabihf-objcopy -j .text -j .secure_text -j > .secure_data -j .rodata -j .hash -j .data -j .got -j .got.plt -j > .u_boot_list -j .rel.dyn -j .binman_sym_table -j .text_rest -j > .dtb.init.rodata -j .efi_runtime -j .efi_runtime_rel -I binary -O > binary --pad-to=0x11000 SPL u-boot-with-spl.imx && cat u-boot.img >> > u-boot-with-spl.imx || rm -f u-boot-with-spl.imx > > > What I'm trying to say is that I have followed the correct steps and > this is the LTO change > > git diff > diff --git a/configs/imx6dl_mamoj_defconfig b/configs/imx6dl_mamoj_defconfig > index ae27857e6f..4a535012b2 100644 > --- a/configs/imx6dl_mamoj_defconfig > +++ b/configs/imx6dl_mamoj_defconfig > @@ -14,6 +14,7 @@ CONFIG_SPL_TEXT_BASE=0x00908000 > CONFIG_SPL_DRIVERS_MISC=y > CONFIG_IMX_HAB=y > # CONFIG_CMD_BMODE is not set > +CONFIG_LTO=y > CONFIG_DISTRO_DEFAULTS=y > CONFIG_BOOTDELAY=3 > CONFIG_SPL_OS_BOOT=y Here's what I see: $ git describe HEAD v2022.04-rc4-50-g9776c4e9d00a $ make imx6dl_mamoj_defconfig HOSTCC scripts/basic/fixdep HOSTCC scripts/kconfig/conf.o YACC scripts/kconfig/zconf.tab.c LEX scripts/kconfig/zconf.lex.c HOSTCC scripts/kconfig/zconf.tab.o HOSTLD scripts/kconfig/conf # # configuration written to .config # $ sed -i -e 's/# CONFIG_LTO is not set/CONFIG_LTO=y/' .config $ grep LTO .config CONFIG_ARCH_SUPPORTS_LTO=y CONFIG_LTO=y $ make CROSS_COMPILE=~/.buildman-toolchains/gcc-11.1.0-nolibc/arm-linux-gnueabi/bin/arm-linux-gnueabi- -sj12 ===================== WARNING ====================== This board does not use CONFIG_DM_SERIAL (Driver Model for Serial drivers). Please update the board to use CONFIG_DM_SERIAL before the v2023.04 release. Failure to update by the deadline may result in board removal. See doc/driver-model/migration.rst for more info. ==================================================== arch/arm/dts/imx6dl-dhcom-pdk2.dtb: Warning (pwms_property): /display-bl:pwms: cell 3 is not a phandle reference arch/arm/dts/imx6dl-dhcom-pdk2.dtb: Warning (pwms_property): /display-bl: Missing property '#pwm-cells' in node /soc/bus@2000000/gpc@20dc000 or bad phandle (referred from pwms[3]) arch/arm/dts/imx6q-dhcom-pdk2.dtb: Warning (pwms_property): /display-bl:pwms: cell 3 is not a phandle reference arch/arm/dts/imx6q-dhcom-pdk2.dtb: Warning (pwms_property): /display-bl: Missing property '#pwm-cells' in node /soc/bus@2000000/gpc@20dc000 or bad phandle (referred from pwms[3]) $ ls -lh spl/u-boot-spl* -rwxrwxr-x 1 trini trini 944K Mar 19 13:40 spl/u-boot-spl -rw-rw-r-- 1 trini trini 54K Mar 19 13:40 spl/u-boot-spl.bin -rw-rw-r-- 1 trini trini 1.6K Mar 19 13:40 spl/u-boot-spl.cfgout -rw-rw-r-- 1 trini trini 2.2K Mar 19 13:40 spl/u-boot-spl.dtb -rw-rw-r-- 1 trini trini 54K Mar 19 13:40 spl/u-boot-spl-dtb.bin -rw-rw-r-- 1 trini trini 728 Mar 19 13:40 spl/u-boot-spl.lds -rw-rw-r-- 1 trini trini 5.9K Mar 19 13:40 spl/u-boot-spl.ltrans0.ltrans.su -rw-rw-r-- 1 trini trini 7.2K Mar 19 13:40 spl/u-boot-spl.ltrans1.ltrans.su -rw-rw-r-- 1 trini trini 182K Mar 19 13:40 spl/u-boot-spl.map -rwxrwxr-x 1 trini trini 51K Mar 19 13:40 spl/u-boot-spl-nodtb.bin -rw-rw-r-- 1 trini trini 135K Mar 19 13:40 spl/u-boot-spl.sym
HI Tom On Sat, Mar 19, 2022 at 6:44 PM Tom Rini <trini@konsulko.com> wrote: > > On Sat, Mar 19, 2022 at 06:37:18PM +0100, Michael Nazzareno Trimarchi wrote: > > Hi Tom > > > > On Sat, Mar 19, 2022 at 6:30 PM Tom Rini <trini@konsulko.com> wrote: > > > > > > On Sat, Mar 19, 2022 at 06:27:38PM +0100, Michael Nazzareno Trimarchi wrote: > > > > Hi > > > > > > > > On Sat, Mar 19, 2022 at 6:25 PM Tom Rini <trini@konsulko.com> wrote: > > > > > > > > > > On Sat, Mar 19, 2022 at 06:08:18PM +0100, Michael Nazzareno Trimarchi wrote: > > > > > > Hi Tom > > > > > > > > > > > > On Sat, Mar 19, 2022 at 6:03 PM Tom Rini <trini@konsulko.com> wrote: > > > > > > > > > > > > > > On Sat, Mar 19, 2022 at 05:48:59PM +0100, Michael Nazzareno Trimarchi wrote: > > > > > > > > Hi Tom > > > > > > > > > > > > > > > > On Sat, Mar 19, 2022 at 5:05 PM Tom Rini <trini@konsulko.com> wrote: > > > > > > > > > > > > > > > > > > On Sat, Mar 19, 2022 at 02:51:01PM +0100, Michael Nazzareno Trimarchi wrote: > > > > > > > > > > Hi > > > > > > > > > > > > > > > > > > > > On Sat, Mar 19, 2022 at 2:25 PM Fabio Estevam <festevam@gmail.com> wrote: > > > > > > > > > > > > > > > > > > > > > > Hi Michael, > > > > > > > > > > > > > > > > > > > > > > On Sat, Mar 19, 2022 at 6:47 AM Michael Nazzareno Trimarchi > > > > > > > > > > > <michael@amarulasolutions.com> wrote: > > > > > > > > > > > > > > > > > > > > > > > > HI > > > > > > > > > > > > > > > > > > > > > > > > Please send me a link to apply your series > > > > > > > > > > > > > > > > > > > > > > You can get the series from patchwork (just click in the 'series' button) > > > > > > > > > > > https://patchwork.ozlabs.org/project/uboot/patch/20220112133127.16880-2-gaurav.jain@nxp.com/ > > > > > > > > > > > > > > > > > > > > Done, well, I have tried remove DM_GPIO in SPL. Seems that I need to > > > > > > > > > > remove a lot of features. I have tested LTO build but size > > > > > > > > > > of SPL increase. Is that strange? > > > > > > > > > > > > > > > > > > That is very strange. Can you post your patches somewhere? > > > > > > > > > > > > > > > > > > -- > > > > > > > > > Tom > > > > > > > > > > > > > > > > Start from here 9776c4e9d00ac49d6388ffe9e084ff03b37ae479 > > > > > > > > export ARCH=arm > > > > > > > > export CROSS_COMPILE=arm-linux-gnueabihf- > > > > > > > > > > > > > > > > make imx6dl_mamoj_defconfig > > > > > > > > build it > > > > > > > > > > > > > > > > Try then to enable LTO and build it again > > > > > > > > > > > > > > > > spl/u-boot-spl.bin exceeds file size limit: > > > > > > > > limit: 0xefa0 bytes > > > > > > > > actual: 0xf071 bytes > > > > > > > > excess: 0xd1 bytes > > > > > > > > > > > > > > > > So LTO does not help even on beginning on this board. You don't need > > > > > > > > to apply any patch for this test > > > > > > > > > > > > > > I think that's some artifact of mixing LTO/non-LTO and the world not > > > > > > > getting rebuilt? Just enabling LTO after the defconfig works fine and > > > > > > > is smaller than before. > > > > > > > > > > > > In order to save space I did not change what we have. Every build starts from > > > > > > a mrproper and new configuration. I can not mix LTO/non-LTO in this case. I'm > > > > > > using upstream defconfig and upstream defconfig + LTO enabled and the result is > > > > > > that spl increase in size for LTO building. I'm working to keep out > > > > > > part that are not really needed but > > > > > > I was hoping that LTO give me some help here > > > > > > > > > > Yes, LTO saves about 5KiB on the SPL binary. You just need to enable it > > > > > in the config before you start building, not after you've built > > > > > everything once. > > > > > > > > Offcourse ;) but this not the case. I don't drink enough to think that > > > > change a config, decrease the build size ;) > > > > > > LTO is an entirely different way of the compiler / linker optimizing the > > > binary. So yes, in this case enabling a single option decreases the > > > size. > > > > > > I think we are in a circle. Let's have the result with LTO > > > > spl/keep-syms-lto.c > > ( cd spl && arm-linux-gnueabihf-gcc -nostdlib -nostartfiles > > -fuse-linker-plugin -flto=8 -Wall -Wstrict-prototypes > > -Wno-format-security -fno-builtin -ffreestanding -std=gnu11 > > -fshort-wchar -fno-strict-aliasing -fno-PIE -Os -flto=8 > > -fno-stack-protector -fno-delete-null-pointer-checks -Wno-pointer-sign > > -Wno-stringop-truncation -Wno-array-bounds -Wno-stringop-overflow > > -Wno-maybe-uninitialized -fmacro-prefix-map=./= -g -fstack-usage > > -Wno-format-nonliteral -Wno-address-of-packed-member > > -Wno-unused-but-set-variable -Werror=date-time -Wno-packed-not-aligned > > -ffunction-sections -fdata-sections -fno-stack-protector -D__KERNEL__ > > -D__UBOOT__ -DCONFIG_SPL_BUILD -D__ARM__ -Wa,-mimplicit-it=always > > -mthumb -mthumb-interwork -mabi=aapcs-linux -mno-unaligned-access > > -fno-common -ffixed-r9 -msoft-float -mgeneral-regs-only -pipe > > -march=armv7-a -D__LINUX_ARM_ARCH__=7 -mtune=generic-armv7-a > > -Ispl/include -Iinclude -I./arch/arm/include -include > > ./include/linux/kconfig.h -nostdinc -isystem > > /usr/lib/gcc-cross/arm-linux-gnueabihf/9/include -Wl,-T > > -Wl,u-boot-spl.lds -Wl,-Bstatic -Wl,--gc-sections > > -Wl,--no-dynamic-linker -Wl,--build-id=none -Wl,-Ttext -Wl,0x00908000 > > arch/arm/cpu/armv7/start.o -Wl,--whole-archive > > arch/arm/cpu/armv7/built-in.o arch/arm/cpu/built-in.o > > arch/arm/lib/built-in.o arch/arm/mach-imx/built-in.o > > board/bticino/mamoj/built-in.o common/spl/built-in.o > > common/init/built-in.o boot/built-in.o common/built-in.o > > cmd/built-in.o env/built-in.o lib/built-in.o disk/built-in.o > > drivers/built-in.o drivers/usb/dwc3/built-in.o > > drivers/usb/cdns3/built-in.o dts/built-in.o fs/built-in.o > > keep-syms-lto.o arch/arm/lib/eabi_compat.o arch/arm/lib/lib.a > > -Wl,--no-whole-archive -Wl,-Map,u-boot-spl.map -o u-boot-spl ) > > arm-linux-gnueabihf-objcopy -j .text -j .secure_text -j > > .secure_data -j .rodata -j .hash -j .data -j .got -j .got.plt -j > > .u_boot_list -j .rel.dyn -j .binman_sym_table -j .text_rest -j > > .dtb.init.rodata -j .efi_runtime -j .efi_runtime_rel -O binary > > spl/u-boot-spl spl/u-boot-spl-nodtb.bin > > arm-linux-gnueabihf-objdump -t spl/u-boot-spl > spl/u-boot-spl.sym > > cat spl/u-boot-spl-nodtb.bin spl/u-boot-spl.dtb > spl/u-boot-spl-dtb.bin > > cp spl/u-boot-spl-dtb.bin spl/u-boot-spl.bin > > spl/u-boot-spl.bin exceeds file size limit: > > limit: 0xefa0 bytes > > actual: 0xf079 bytes > > excess: 0xd9 bytes > > make: *** [Makefile:2082: spl/u-boot-spl.bin] Error 1 > > make: *** Deleting file 'spl/u-boot-spl.bin' > > > > and without > > > > NUX_ARM_ARCH__=7 -mtune=generic-armv7-a -D__ASSEMBLY__ -x c -o > > spl/u-boot-spl.cfgout arch/arm/mach-imx/spl_sd.cfg > > ./tools/mkimage -n spl/u-boot-spl.cfgout -T imximage -e 0x00908000 > > -d spl/u-boot-spl.bin SPL >SPL.log && cat SPL.log > > Image Type: Freescale IMX Boot Image > > Image Ver: 2 (i.MX53/6/7 compatible) > > Mode: DCD > > Data Size: 73824 Bytes = 72.09 KiB = 0.07 MiB > > Load Address: 00907420 > > Entry Point: 00908000 > > HAB Blocks: 0x00907400 0x00000000 0x0000fc00 > > DCD Blocks: 0x00910000 0x0000002c 0x00000004 > > make -f ./scripts/Makefile.build obj=arch/arm/mach-imx u-boot-with-spl.imx > > mkdir -p spl/ > > ./tools/mkimage -n spl/u-boot-spl.cfgout -T imximage -e 0x00908000 > > -d spl/u-boot-spl.bin SPL >SPL.log && cat SPL.log > > Image Type: Freescale IMX Boot Image > > Image Ver: 2 (i.MX53/6/7 compatible) > > Mode: DCD > > Data Size: 73824 Bytes = 72.09 KiB = 0.07 MiB > > Load Address: 00907420 > > Entry Point: 00908000 > > HAB Blocks: 0x00907400 0x00000000 0x0000fc00 > > DCD Blocks: 0x00910000 0x0000002c 0x00000004 > > arm-linux-gnueabihf-objcopy -j .text -j .secure_text -j > > .secure_data -j .rodata -j .hash -j .data -j .got -j .got.plt -j > > .u_boot_list -j .rel.dyn -j .binman_sym_table -j .text_rest -j > > .dtb.init.rodata -j .efi_runtime -j .efi_runtime_rel -I binary -O > > binary --pad-to=0x11000 SPL u-boot-with-spl.imx && cat u-boot.img >> > > u-boot-with-spl.imx || rm -f u-boot-with-spl.imx > > > > > > What I'm trying to say is that I have followed the correct steps and > > this is the LTO change > > > > git diff > > diff --git a/configs/imx6dl_mamoj_defconfig b/configs/imx6dl_mamoj_defconfig > > index ae27857e6f..4a535012b2 100644 > > --- a/configs/imx6dl_mamoj_defconfig > > +++ b/configs/imx6dl_mamoj_defconfig > > @@ -14,6 +14,7 @@ CONFIG_SPL_TEXT_BASE=0x00908000 > > CONFIG_SPL_DRIVERS_MISC=y > > CONFIG_IMX_HAB=y > > # CONFIG_CMD_BMODE is not set > > +CONFIG_LTO=y > > CONFIG_DISTRO_DEFAULTS=y > > CONFIG_BOOTDELAY=3 > > CONFIG_SPL_OS_BOOT=y > > Here's what I see: > $ git describe HEAD > v2022.04-rc4-50-g9776c4e9d00a > $ make imx6dl_mamoj_defconfig > HOSTCC scripts/basic/fixdep > HOSTCC scripts/kconfig/conf.o > YACC scripts/kconfig/zconf.tab.c > LEX scripts/kconfig/zconf.lex.c > HOSTCC scripts/kconfig/zconf.tab.o > HOSTLD scripts/kconfig/conf > # > # configuration written to .config > # > $ sed -i -e 's/# CONFIG_LTO is not set/CONFIG_LTO=y/' .config > $ grep LTO .config > CONFIG_ARCH_SUPPORTS_LTO=y > CONFIG_LTO=y > $ make CROSS_COMPILE=~/.buildman-toolchains/gcc-11.1.0-nolibc/arm-linux-gnueabi/bin/arm-linux-gnueabi- -sj12 > ===================== WARNING ====================== > This board does not use CONFIG_DM_SERIAL (Driver Model > for Serial drivers). Please update the board to use > CONFIG_DM_SERIAL before the v2023.04 release. Failure to > update by the deadline may result in board removal. > See doc/driver-model/migration.rst for more info. > ==================================================== > arch/arm/dts/imx6dl-dhcom-pdk2.dtb: Warning (pwms_property): /display-bl:pwms: cell 3 is not a phandle reference > arch/arm/dts/imx6dl-dhcom-pdk2.dtb: Warning (pwms_property): /display-bl: Missing property '#pwm-cells' in node /soc/bus@2000000/gpc@20dc000 or bad phandle (referred from pwms[3]) > arch/arm/dts/imx6q-dhcom-pdk2.dtb: Warning (pwms_property): /display-bl:pwms: cell 3 is not a phandle reference > arch/arm/dts/imx6q-dhcom-pdk2.dtb: Warning (pwms_property): /display-bl: Missing property '#pwm-cells' in node /soc/bus@2000000/gpc@20dc000 or bad phandle (referred from pwms[3]) > $ ls -lh spl/u-boot-spl* > -rwxrwxr-x 1 trini trini 944K Mar 19 13:40 spl/u-boot-spl > -rw-rw-r-- 1 trini trini 54K Mar 19 13:40 spl/u-boot-spl.bin > -rw-rw-r-- 1 trini trini 1.6K Mar 19 13:40 spl/u-boot-spl.cfgout > -rw-rw-r-- 1 trini trini 2.2K Mar 19 13:40 spl/u-boot-spl.dtb > -rw-rw-r-- 1 trini trini 54K Mar 19 13:40 spl/u-boot-spl-dtb.bin > -rw-rw-r-- 1 trini trini 728 Mar 19 13:40 spl/u-boot-spl.lds > -rw-rw-r-- 1 trini trini 5.9K Mar 19 13:40 spl/u-boot-spl.ltrans0.ltrans.su > -rw-rw-r-- 1 trini trini 7.2K Mar 19 13:40 spl/u-boot-spl.ltrans1.ltrans.su > -rw-rw-r-- 1 trini trini 182K Mar 19 13:40 spl/u-boot-spl.map > -rwxrwxr-x 1 trini trini 51K Mar 19 13:40 spl/u-boot-spl-nodtb.bin > -rw-rw-r-- 1 trini trini 135K Mar 19 13:40 spl/u-boot-spl.sym > The only difference is the toolchain gcc version 9.4.0 (Ubuntu 9.4.0-1ubuntu1~20.04) and for the result you get I'm agree with you. Michael > -- > Tom
On Sat, Mar 19, 2022 at 06:49:25PM +0100, Michael Nazzareno Trimarchi wrote: > HI Tom > > On Sat, Mar 19, 2022 at 6:44 PM Tom Rini <trini@konsulko.com> wrote: > > > > On Sat, Mar 19, 2022 at 06:37:18PM +0100, Michael Nazzareno Trimarchi wrote: > > > Hi Tom > > > > > > On Sat, Mar 19, 2022 at 6:30 PM Tom Rini <trini@konsulko.com> wrote: > > > > > > > > On Sat, Mar 19, 2022 at 06:27:38PM +0100, Michael Nazzareno Trimarchi wrote: > > > > > Hi > > > > > > > > > > On Sat, Mar 19, 2022 at 6:25 PM Tom Rini <trini@konsulko.com> wrote: > > > > > > > > > > > > On Sat, Mar 19, 2022 at 06:08:18PM +0100, Michael Nazzareno Trimarchi wrote: > > > > > > > Hi Tom > > > > > > > > > > > > > > On Sat, Mar 19, 2022 at 6:03 PM Tom Rini <trini@konsulko.com> wrote: > > > > > > > > > > > > > > > > On Sat, Mar 19, 2022 at 05:48:59PM +0100, Michael Nazzareno Trimarchi wrote: > > > > > > > > > Hi Tom > > > > > > > > > > > > > > > > > > On Sat, Mar 19, 2022 at 5:05 PM Tom Rini <trini@konsulko.com> wrote: > > > > > > > > > > > > > > > > > > > > On Sat, Mar 19, 2022 at 02:51:01PM +0100, Michael Nazzareno Trimarchi wrote: > > > > > > > > > > > Hi > > > > > > > > > > > > > > > > > > > > > > On Sat, Mar 19, 2022 at 2:25 PM Fabio Estevam <festevam@gmail.com> wrote: > > > > > > > > > > > > > > > > > > > > > > > > Hi Michael, > > > > > > > > > > > > > > > > > > > > > > > > On Sat, Mar 19, 2022 at 6:47 AM Michael Nazzareno Trimarchi > > > > > > > > > > > > <michael@amarulasolutions.com> wrote: > > > > > > > > > > > > > > > > > > > > > > > > > > HI > > > > > > > > > > > > > > > > > > > > > > > > > > Please send me a link to apply your series > > > > > > > > > > > > > > > > > > > > > > > > You can get the series from patchwork (just click in the 'series' button) > > > > > > > > > > > > https://patchwork.ozlabs.org/project/uboot/patch/20220112133127.16880-2-gaurav.jain@nxp.com/ > > > > > > > > > > > > > > > > > > > > > > Done, well, I have tried remove DM_GPIO in SPL. Seems that I need to > > > > > > > > > > > remove a lot of features. I have tested LTO build but size > > > > > > > > > > > of SPL increase. Is that strange? > > > > > > > > > > > > > > > > > > > > That is very strange. Can you post your patches somewhere? > > > > > > > > > > > > > > > > > > > > -- > > > > > > > > > > Tom > > > > > > > > > > > > > > > > > > Start from here 9776c4e9d00ac49d6388ffe9e084ff03b37ae479 > > > > > > > > > export ARCH=arm > > > > > > > > > export CROSS_COMPILE=arm-linux-gnueabihf- > > > > > > > > > > > > > > > > > > make imx6dl_mamoj_defconfig > > > > > > > > > build it > > > > > > > > > > > > > > > > > > Try then to enable LTO and build it again > > > > > > > > > > > > > > > > > > spl/u-boot-spl.bin exceeds file size limit: > > > > > > > > > limit: 0xefa0 bytes > > > > > > > > > actual: 0xf071 bytes > > > > > > > > > excess: 0xd1 bytes > > > > > > > > > > > > > > > > > > So LTO does not help even on beginning on this board. You don't need > > > > > > > > > to apply any patch for this test > > > > > > > > > > > > > > > > I think that's some artifact of mixing LTO/non-LTO and the world not > > > > > > > > getting rebuilt? Just enabling LTO after the defconfig works fine and > > > > > > > > is smaller than before. > > > > > > > > > > > > > > In order to save space I did not change what we have. Every build starts from > > > > > > > a mrproper and new configuration. I can not mix LTO/non-LTO in this case. I'm > > > > > > > using upstream defconfig and upstream defconfig + LTO enabled and the result is > > > > > > > that spl increase in size for LTO building. I'm working to keep out > > > > > > > part that are not really needed but > > > > > > > I was hoping that LTO give me some help here > > > > > > > > > > > > Yes, LTO saves about 5KiB on the SPL binary. You just need to enable it > > > > > > in the config before you start building, not after you've built > > > > > > everything once. > > > > > > > > > > Offcourse ;) but this not the case. I don't drink enough to think that > > > > > change a config, decrease the build size ;) > > > > > > > > LTO is an entirely different way of the compiler / linker optimizing the > > > > binary. So yes, in this case enabling a single option decreases the > > > > size. > > > > > > > > > I think we are in a circle. Let's have the result with LTO > > > > > > spl/keep-syms-lto.c > > > ( cd spl && arm-linux-gnueabihf-gcc -nostdlib -nostartfiles > > > -fuse-linker-plugin -flto=8 -Wall -Wstrict-prototypes > > > -Wno-format-security -fno-builtin -ffreestanding -std=gnu11 > > > -fshort-wchar -fno-strict-aliasing -fno-PIE -Os -flto=8 > > > -fno-stack-protector -fno-delete-null-pointer-checks -Wno-pointer-sign > > > -Wno-stringop-truncation -Wno-array-bounds -Wno-stringop-overflow > > > -Wno-maybe-uninitialized -fmacro-prefix-map=./= -g -fstack-usage > > > -Wno-format-nonliteral -Wno-address-of-packed-member > > > -Wno-unused-but-set-variable -Werror=date-time -Wno-packed-not-aligned > > > -ffunction-sections -fdata-sections -fno-stack-protector -D__KERNEL__ > > > -D__UBOOT__ -DCONFIG_SPL_BUILD -D__ARM__ -Wa,-mimplicit-it=always > > > -mthumb -mthumb-interwork -mabi=aapcs-linux -mno-unaligned-access > > > -fno-common -ffixed-r9 -msoft-float -mgeneral-regs-only -pipe > > > -march=armv7-a -D__LINUX_ARM_ARCH__=7 -mtune=generic-armv7-a > > > -Ispl/include -Iinclude -I./arch/arm/include -include > > > ./include/linux/kconfig.h -nostdinc -isystem > > > /usr/lib/gcc-cross/arm-linux-gnueabihf/9/include -Wl,-T > > > -Wl,u-boot-spl.lds -Wl,-Bstatic -Wl,--gc-sections > > > -Wl,--no-dynamic-linker -Wl,--build-id=none -Wl,-Ttext -Wl,0x00908000 > > > arch/arm/cpu/armv7/start.o -Wl,--whole-archive > > > arch/arm/cpu/armv7/built-in.o arch/arm/cpu/built-in.o > > > arch/arm/lib/built-in.o arch/arm/mach-imx/built-in.o > > > board/bticino/mamoj/built-in.o common/spl/built-in.o > > > common/init/built-in.o boot/built-in.o common/built-in.o > > > cmd/built-in.o env/built-in.o lib/built-in.o disk/built-in.o > > > drivers/built-in.o drivers/usb/dwc3/built-in.o > > > drivers/usb/cdns3/built-in.o dts/built-in.o fs/built-in.o > > > keep-syms-lto.o arch/arm/lib/eabi_compat.o arch/arm/lib/lib.a > > > -Wl,--no-whole-archive -Wl,-Map,u-boot-spl.map -o u-boot-spl ) > > > arm-linux-gnueabihf-objcopy -j .text -j .secure_text -j > > > .secure_data -j .rodata -j .hash -j .data -j .got -j .got.plt -j > > > .u_boot_list -j .rel.dyn -j .binman_sym_table -j .text_rest -j > > > .dtb.init.rodata -j .efi_runtime -j .efi_runtime_rel -O binary > > > spl/u-boot-spl spl/u-boot-spl-nodtb.bin > > > arm-linux-gnueabihf-objdump -t spl/u-boot-spl > spl/u-boot-spl.sym > > > cat spl/u-boot-spl-nodtb.bin spl/u-boot-spl.dtb > spl/u-boot-spl-dtb.bin > > > cp spl/u-boot-spl-dtb.bin spl/u-boot-spl.bin > > > spl/u-boot-spl.bin exceeds file size limit: > > > limit: 0xefa0 bytes > > > actual: 0xf079 bytes > > > excess: 0xd9 bytes > > > make: *** [Makefile:2082: spl/u-boot-spl.bin] Error 1 > > > make: *** Deleting file 'spl/u-boot-spl.bin' > > > > > > and without > > > > > > NUX_ARM_ARCH__=7 -mtune=generic-armv7-a -D__ASSEMBLY__ -x c -o > > > spl/u-boot-spl.cfgout arch/arm/mach-imx/spl_sd.cfg > > > ./tools/mkimage -n spl/u-boot-spl.cfgout -T imximage -e 0x00908000 > > > -d spl/u-boot-spl.bin SPL >SPL.log && cat SPL.log > > > Image Type: Freescale IMX Boot Image > > > Image Ver: 2 (i.MX53/6/7 compatible) > > > Mode: DCD > > > Data Size: 73824 Bytes = 72.09 KiB = 0.07 MiB > > > Load Address: 00907420 > > > Entry Point: 00908000 > > > HAB Blocks: 0x00907400 0x00000000 0x0000fc00 > > > DCD Blocks: 0x00910000 0x0000002c 0x00000004 > > > make -f ./scripts/Makefile.build obj=arch/arm/mach-imx u-boot-with-spl.imx > > > mkdir -p spl/ > > > ./tools/mkimage -n spl/u-boot-spl.cfgout -T imximage -e 0x00908000 > > > -d spl/u-boot-spl.bin SPL >SPL.log && cat SPL.log > > > Image Type: Freescale IMX Boot Image > > > Image Ver: 2 (i.MX53/6/7 compatible) > > > Mode: DCD > > > Data Size: 73824 Bytes = 72.09 KiB = 0.07 MiB > > > Load Address: 00907420 > > > Entry Point: 00908000 > > > HAB Blocks: 0x00907400 0x00000000 0x0000fc00 > > > DCD Blocks: 0x00910000 0x0000002c 0x00000004 > > > arm-linux-gnueabihf-objcopy -j .text -j .secure_text -j > > > .secure_data -j .rodata -j .hash -j .data -j .got -j .got.plt -j > > > .u_boot_list -j .rel.dyn -j .binman_sym_table -j .text_rest -j > > > .dtb.init.rodata -j .efi_runtime -j .efi_runtime_rel -I binary -O > > > binary --pad-to=0x11000 SPL u-boot-with-spl.imx && cat u-boot.img >> > > > u-boot-with-spl.imx || rm -f u-boot-with-spl.imx > > > > > > > > > What I'm trying to say is that I have followed the correct steps and > > > this is the LTO change > > > > > > git diff > > > diff --git a/configs/imx6dl_mamoj_defconfig b/configs/imx6dl_mamoj_defconfig > > > index ae27857e6f..4a535012b2 100644 > > > --- a/configs/imx6dl_mamoj_defconfig > > > +++ b/configs/imx6dl_mamoj_defconfig > > > @@ -14,6 +14,7 @@ CONFIG_SPL_TEXT_BASE=0x00908000 > > > CONFIG_SPL_DRIVERS_MISC=y > > > CONFIG_IMX_HAB=y > > > # CONFIG_CMD_BMODE is not set > > > +CONFIG_LTO=y > > > CONFIG_DISTRO_DEFAULTS=y > > > CONFIG_BOOTDELAY=3 > > > CONFIG_SPL_OS_BOOT=y > > > > Here's what I see: > > $ git describe HEAD > > v2022.04-rc4-50-g9776c4e9d00a > > $ make imx6dl_mamoj_defconfig > > HOSTCC scripts/basic/fixdep > > HOSTCC scripts/kconfig/conf.o > > YACC scripts/kconfig/zconf.tab.c > > LEX scripts/kconfig/zconf.lex.c > > HOSTCC scripts/kconfig/zconf.tab.o > > HOSTLD scripts/kconfig/conf > > # > > # configuration written to .config > > # > > $ sed -i -e 's/# CONFIG_LTO is not set/CONFIG_LTO=y/' .config > > $ grep LTO .config > > CONFIG_ARCH_SUPPORTS_LTO=y > > CONFIG_LTO=y > > $ make CROSS_COMPILE=~/.buildman-toolchains/gcc-11.1.0-nolibc/arm-linux-gnueabi/bin/arm-linux-gnueabi- -sj12 > > ===================== WARNING ====================== > > This board does not use CONFIG_DM_SERIAL (Driver Model > > for Serial drivers). Please update the board to use > > CONFIG_DM_SERIAL before the v2023.04 release. Failure to > > update by the deadline may result in board removal. > > See doc/driver-model/migration.rst for more info. > > ==================================================== > > arch/arm/dts/imx6dl-dhcom-pdk2.dtb: Warning (pwms_property): /display-bl:pwms: cell 3 is not a phandle reference > > arch/arm/dts/imx6dl-dhcom-pdk2.dtb: Warning (pwms_property): /display-bl: Missing property '#pwm-cells' in node /soc/bus@2000000/gpc@20dc000 or bad phandle (referred from pwms[3]) > > arch/arm/dts/imx6q-dhcom-pdk2.dtb: Warning (pwms_property): /display-bl:pwms: cell 3 is not a phandle reference > > arch/arm/dts/imx6q-dhcom-pdk2.dtb: Warning (pwms_property): /display-bl: Missing property '#pwm-cells' in node /soc/bus@2000000/gpc@20dc000 or bad phandle (referred from pwms[3]) > > $ ls -lh spl/u-boot-spl* > > -rwxrwxr-x 1 trini trini 944K Mar 19 13:40 spl/u-boot-spl > > -rw-rw-r-- 1 trini trini 54K Mar 19 13:40 spl/u-boot-spl.bin > > -rw-rw-r-- 1 trini trini 1.6K Mar 19 13:40 spl/u-boot-spl.cfgout > > -rw-rw-r-- 1 trini trini 2.2K Mar 19 13:40 spl/u-boot-spl.dtb > > -rw-rw-r-- 1 trini trini 54K Mar 19 13:40 spl/u-boot-spl-dtb.bin > > -rw-rw-r-- 1 trini trini 728 Mar 19 13:40 spl/u-boot-spl.lds > > -rw-rw-r-- 1 trini trini 5.9K Mar 19 13:40 spl/u-boot-spl.ltrans0.ltrans.su > > -rw-rw-r-- 1 trini trini 7.2K Mar 19 13:40 spl/u-boot-spl.ltrans1.ltrans.su > > -rw-rw-r-- 1 trini trini 182K Mar 19 13:40 spl/u-boot-spl.map > > -rwxrwxr-x 1 trini trini 51K Mar 19 13:40 spl/u-boot-spl-nodtb.bin > > -rw-rw-r-- 1 trini trini 135K Mar 19 13:40 spl/u-boot-spl.sym > > > > The only difference is the toolchain gcc version 9.4.0 (Ubuntu > 9.4.0-1ubuntu1~20.04) and for the result you get I'm agree with you. Yeah, that's too old of a toolchain for LTO to be usable. A patch to catch and error out in that case would be good :)
HI Tom On Sat, Mar 19, 2022 at 6:51 PM Tom Rini <trini@konsulko.com> wrote: > > On Sat, Mar 19, 2022 at 06:49:25PM +0100, Michael Nazzareno Trimarchi wrote: > > HI Tom > > > > On Sat, Mar 19, 2022 at 6:44 PM Tom Rini <trini@konsulko.com> wrote: > > > > > > On Sat, Mar 19, 2022 at 06:37:18PM +0100, Michael Nazzareno Trimarchi wrote: > > > > Hi Tom > > > > > > > > On Sat, Mar 19, 2022 at 6:30 PM Tom Rini <trini@konsulko.com> wrote: > > > > > > > > > > On Sat, Mar 19, 2022 at 06:27:38PM +0100, Michael Nazzareno Trimarchi wrote: > > > > > > Hi > > > > > > > > > > > > On Sat, Mar 19, 2022 at 6:25 PM Tom Rini <trini@konsulko.com> wrote: > > > > > > > > > > > > > > On Sat, Mar 19, 2022 at 06:08:18PM +0100, Michael Nazzareno Trimarchi wrote: > > > > > > > > Hi Tom > > > > > > > > > > > > > > > > On Sat, Mar 19, 2022 at 6:03 PM Tom Rini <trini@konsulko.com> wrote: > > > > > > > > > > > > > > > > > > On Sat, Mar 19, 2022 at 05:48:59PM +0100, Michael Nazzareno Trimarchi wrote: > > > > > > > > > > Hi Tom > > > > > > > > > > > > > > > > > > > > On Sat, Mar 19, 2022 at 5:05 PM Tom Rini <trini@konsulko.com> wrote: > > > > > > > > > > > > > > > > > > > > > > On Sat, Mar 19, 2022 at 02:51:01PM +0100, Michael Nazzareno Trimarchi wrote: > > > > > > > > > > > > Hi > > > > > > > > > > > > > > > > > > > > > > > > On Sat, Mar 19, 2022 at 2:25 PM Fabio Estevam <festevam@gmail.com> wrote: > > > > > > > > > > > > > > > > > > > > > > > > > > Hi Michael, > > > > > > > > > > > > > > > > > > > > > > > > > > On Sat, Mar 19, 2022 at 6:47 AM Michael Nazzareno Trimarchi > > > > > > > > > > > > > <michael@amarulasolutions.com> wrote: > > > > > > > > > > > > > > > > > > > > > > > > > > > > HI > > > > > > > > > > > > > > > > > > > > > > > > > > > > Please send me a link to apply your series > > > > > > > > > > > > > > > > > > > > > > > > > > You can get the series from patchwork (just click in the 'series' button) > > > > > > > > > > > > > https://patchwork.ozlabs.org/project/uboot/patch/20220112133127.16880-2-gaurav.jain@nxp.com/ > > > > > > > > > > > > > > > > > > > > > > > > Done, well, I have tried remove DM_GPIO in SPL. Seems that I need to > > > > > > > > > > > > remove a lot of features. I have tested LTO build but size > > > > > > > > > > > > of SPL increase. Is that strange? > > > > > > > > > > > > > > > > > > > > > > That is very strange. Can you post your patches somewhere? > > > > > > > > > > > > > > > > > > > > > > -- > > > > > > > > > > > Tom > > > > > > > > > > > > > > > > > > > > Start from here 9776c4e9d00ac49d6388ffe9e084ff03b37ae479 > > > > > > > > > > export ARCH=arm > > > > > > > > > > export CROSS_COMPILE=arm-linux-gnueabihf- > > > > > > > > > > > > > > > > > > > > make imx6dl_mamoj_defconfig > > > > > > > > > > build it > > > > > > > > > > > > > > > > > > > > Try then to enable LTO and build it again > > > > > > > > > > > > > > > > > > > > spl/u-boot-spl.bin exceeds file size limit: > > > > > > > > > > limit: 0xefa0 bytes > > > > > > > > > > actual: 0xf071 bytes > > > > > > > > > > excess: 0xd1 bytes > > > > > > > > > > > > > > > > > > > > So LTO does not help even on beginning on this board. You don't need > > > > > > > > > > to apply any patch for this test > > > > > > > > > > > > > > > > > > I think that's some artifact of mixing LTO/non-LTO and the world not > > > > > > > > > getting rebuilt? Just enabling LTO after the defconfig works fine and > > > > > > > > > is smaller than before. > > > > > > > > > > > > > > > > In order to save space I did not change what we have. Every build starts from > > > > > > > > a mrproper and new configuration. I can not mix LTO/non-LTO in this case. I'm > > > > > > > > using upstream defconfig and upstream defconfig + LTO enabled and the result is > > > > > > > > that spl increase in size for LTO building. I'm working to keep out > > > > > > > > part that are not really needed but > > > > > > > > I was hoping that LTO give me some help here > > > > > > > > > > > > > > Yes, LTO saves about 5KiB on the SPL binary. You just need to enable it > > > > > > > in the config before you start building, not after you've built > > > > > > > everything once. > > > > > > > > > > > > Offcourse ;) but this not the case. I don't drink enough to think that > > > > > > change a config, decrease the build size ;) > > > > > > > > > > LTO is an entirely different way of the compiler / linker optimizing the > > > > > binary. So yes, in this case enabling a single option decreases the > > > > > size. > > > > > > > > > > > > I think we are in a circle. Let's have the result with LTO > > > > > > > > spl/keep-syms-lto.c > > > > ( cd spl && arm-linux-gnueabihf-gcc -nostdlib -nostartfiles > > > > -fuse-linker-plugin -flto=8 -Wall -Wstrict-prototypes > > > > -Wno-format-security -fno-builtin -ffreestanding -std=gnu11 > > > > -fshort-wchar -fno-strict-aliasing -fno-PIE -Os -flto=8 > > > > -fno-stack-protector -fno-delete-null-pointer-checks -Wno-pointer-sign > > > > -Wno-stringop-truncation -Wno-array-bounds -Wno-stringop-overflow > > > > -Wno-maybe-uninitialized -fmacro-prefix-map=./= -g -fstack-usage > > > > -Wno-format-nonliteral -Wno-address-of-packed-member > > > > -Wno-unused-but-set-variable -Werror=date-time -Wno-packed-not-aligned > > > > -ffunction-sections -fdata-sections -fno-stack-protector -D__KERNEL__ > > > > -D__UBOOT__ -DCONFIG_SPL_BUILD -D__ARM__ -Wa,-mimplicit-it=always > > > > -mthumb -mthumb-interwork -mabi=aapcs-linux -mno-unaligned-access > > > > -fno-common -ffixed-r9 -msoft-float -mgeneral-regs-only -pipe > > > > -march=armv7-a -D__LINUX_ARM_ARCH__=7 -mtune=generic-armv7-a > > > > -Ispl/include -Iinclude -I./arch/arm/include -include > > > > ./include/linux/kconfig.h -nostdinc -isystem > > > > /usr/lib/gcc-cross/arm-linux-gnueabihf/9/include -Wl,-T > > > > -Wl,u-boot-spl.lds -Wl,-Bstatic -Wl,--gc-sections > > > > -Wl,--no-dynamic-linker -Wl,--build-id=none -Wl,-Ttext -Wl,0x00908000 > > > > arch/arm/cpu/armv7/start.o -Wl,--whole-archive > > > > arch/arm/cpu/armv7/built-in.o arch/arm/cpu/built-in.o > > > > arch/arm/lib/built-in.o arch/arm/mach-imx/built-in.o > > > > board/bticino/mamoj/built-in.o common/spl/built-in.o > > > > common/init/built-in.o boot/built-in.o common/built-in.o > > > > cmd/built-in.o env/built-in.o lib/built-in.o disk/built-in.o > > > > drivers/built-in.o drivers/usb/dwc3/built-in.o > > > > drivers/usb/cdns3/built-in.o dts/built-in.o fs/built-in.o > > > > keep-syms-lto.o arch/arm/lib/eabi_compat.o arch/arm/lib/lib.a > > > > -Wl,--no-whole-archive -Wl,-Map,u-boot-spl.map -o u-boot-spl ) > > > > arm-linux-gnueabihf-objcopy -j .text -j .secure_text -j > > > > .secure_data -j .rodata -j .hash -j .data -j .got -j .got.plt -j > > > > .u_boot_list -j .rel.dyn -j .binman_sym_table -j .text_rest -j > > > > .dtb.init.rodata -j .efi_runtime -j .efi_runtime_rel -O binary > > > > spl/u-boot-spl spl/u-boot-spl-nodtb.bin > > > > arm-linux-gnueabihf-objdump -t spl/u-boot-spl > spl/u-boot-spl.sym > > > > cat spl/u-boot-spl-nodtb.bin spl/u-boot-spl.dtb > spl/u-boot-spl-dtb.bin > > > > cp spl/u-boot-spl-dtb.bin spl/u-boot-spl.bin > > > > spl/u-boot-spl.bin exceeds file size limit: > > > > limit: 0xefa0 bytes > > > > actual: 0xf079 bytes > > > > excess: 0xd9 bytes > > > > make: *** [Makefile:2082: spl/u-boot-spl.bin] Error 1 > > > > make: *** Deleting file 'spl/u-boot-spl.bin' > > > > > > > > and without > > > > > > > > NUX_ARM_ARCH__=7 -mtune=generic-armv7-a -D__ASSEMBLY__ -x c -o > > > > spl/u-boot-spl.cfgout arch/arm/mach-imx/spl_sd.cfg > > > > ./tools/mkimage -n spl/u-boot-spl.cfgout -T imximage -e 0x00908000 > > > > -d spl/u-boot-spl.bin SPL >SPL.log && cat SPL.log > > > > Image Type: Freescale IMX Boot Image > > > > Image Ver: 2 (i.MX53/6/7 compatible) > > > > Mode: DCD > > > > Data Size: 73824 Bytes = 72.09 KiB = 0.07 MiB > > > > Load Address: 00907420 > > > > Entry Point: 00908000 > > > > HAB Blocks: 0x00907400 0x00000000 0x0000fc00 > > > > DCD Blocks: 0x00910000 0x0000002c 0x00000004 > > > > make -f ./scripts/Makefile.build obj=arch/arm/mach-imx u-boot-with-spl.imx > > > > mkdir -p spl/ > > > > ./tools/mkimage -n spl/u-boot-spl.cfgout -T imximage -e 0x00908000 > > > > -d spl/u-boot-spl.bin SPL >SPL.log && cat SPL.log > > > > Image Type: Freescale IMX Boot Image > > > > Image Ver: 2 (i.MX53/6/7 compatible) > > > > Mode: DCD > > > > Data Size: 73824 Bytes = 72.09 KiB = 0.07 MiB > > > > Load Address: 00907420 > > > > Entry Point: 00908000 > > > > HAB Blocks: 0x00907400 0x00000000 0x0000fc00 > > > > DCD Blocks: 0x00910000 0x0000002c 0x00000004 > > > > arm-linux-gnueabihf-objcopy -j .text -j .secure_text -j > > > > .secure_data -j .rodata -j .hash -j .data -j .got -j .got.plt -j > > > > .u_boot_list -j .rel.dyn -j .binman_sym_table -j .text_rest -j > > > > .dtb.init.rodata -j .efi_runtime -j .efi_runtime_rel -I binary -O > > > > binary --pad-to=0x11000 SPL u-boot-with-spl.imx && cat u-boot.img >> > > > > u-boot-with-spl.imx || rm -f u-boot-with-spl.imx > > > > > > > > > > > > What I'm trying to say is that I have followed the correct steps and > > > > this is the LTO change > > > > > > > > git diff > > > > diff --git a/configs/imx6dl_mamoj_defconfig b/configs/imx6dl_mamoj_defconfig > > > > index ae27857e6f..4a535012b2 100644 > > > > --- a/configs/imx6dl_mamoj_defconfig > > > > +++ b/configs/imx6dl_mamoj_defconfig > > > > @@ -14,6 +14,7 @@ CONFIG_SPL_TEXT_BASE=0x00908000 > > > > CONFIG_SPL_DRIVERS_MISC=y > > > > CONFIG_IMX_HAB=y > > > > # CONFIG_CMD_BMODE is not set > > > > +CONFIG_LTO=y > > > > CONFIG_DISTRO_DEFAULTS=y > > > > CONFIG_BOOTDELAY=3 > > > > CONFIG_SPL_OS_BOOT=y > > > > > > Here's what I see: > > > $ git describe HEAD > > > v2022.04-rc4-50-g9776c4e9d00a > > > $ make imx6dl_mamoj_defconfig > > > HOSTCC scripts/basic/fixdep > > > HOSTCC scripts/kconfig/conf.o > > > YACC scripts/kconfig/zconf.tab.c > > > LEX scripts/kconfig/zconf.lex.c > > > HOSTCC scripts/kconfig/zconf.tab.o > > > HOSTLD scripts/kconfig/conf > > > # > > > # configuration written to .config > > > # > > > $ sed -i -e 's/# CONFIG_LTO is not set/CONFIG_LTO=y/' .config > > > $ grep LTO .config > > > CONFIG_ARCH_SUPPORTS_LTO=y > > > CONFIG_LTO=y > > > $ make CROSS_COMPILE=~/.buildman-toolchains/gcc-11.1.0-nolibc/arm-linux-gnueabi/bin/arm-linux-gnueabi- -sj12 > > > ===================== WARNING ====================== > > > This board does not use CONFIG_DM_SERIAL (Driver Model > > > for Serial drivers). Please update the board to use > > > CONFIG_DM_SERIAL before the v2023.04 release. Failure to > > > update by the deadline may result in board removal. > > > See doc/driver-model/migration.rst for more info. > > > ==================================================== > > > arch/arm/dts/imx6dl-dhcom-pdk2.dtb: Warning (pwms_property): /display-bl:pwms: cell 3 is not a phandle reference > > > arch/arm/dts/imx6dl-dhcom-pdk2.dtb: Warning (pwms_property): /display-bl: Missing property '#pwm-cells' in node /soc/bus@2000000/gpc@20dc000 or bad phandle (referred from pwms[3]) > > > arch/arm/dts/imx6q-dhcom-pdk2.dtb: Warning (pwms_property): /display-bl:pwms: cell 3 is not a phandle reference > > > arch/arm/dts/imx6q-dhcom-pdk2.dtb: Warning (pwms_property): /display-bl: Missing property '#pwm-cells' in node /soc/bus@2000000/gpc@20dc000 or bad phandle (referred from pwms[3]) > > > $ ls -lh spl/u-boot-spl* > > > -rwxrwxr-x 1 trini trini 944K Mar 19 13:40 spl/u-boot-spl > > > -rw-rw-r-- 1 trini trini 54K Mar 19 13:40 spl/u-boot-spl.bin > > > -rw-rw-r-- 1 trini trini 1.6K Mar 19 13:40 spl/u-boot-spl.cfgout > > > -rw-rw-r-- 1 trini trini 2.2K Mar 19 13:40 spl/u-boot-spl.dtb > > > -rw-rw-r-- 1 trini trini 54K Mar 19 13:40 spl/u-boot-spl-dtb.bin > > > -rw-rw-r-- 1 trini trini 728 Mar 19 13:40 spl/u-boot-spl.lds > > > -rw-rw-r-- 1 trini trini 5.9K Mar 19 13:40 spl/u-boot-spl.ltrans0.ltrans.su > > > -rw-rw-r-- 1 trini trini 7.2K Mar 19 13:40 spl/u-boot-spl.ltrans1.ltrans.su > > > -rw-rw-r-- 1 trini trini 182K Mar 19 13:40 spl/u-boot-spl.map > > > -rwxrwxr-x 1 trini trini 51K Mar 19 13:40 spl/u-boot-spl-nodtb.bin > > > -rw-rw-r-- 1 trini trini 135K Mar 19 13:40 spl/u-boot-spl.sym > > > > > > > The only difference is the toolchain gcc version 9.4.0 (Ubuntu > > 9.4.0-1ubuntu1~20.04) and for the result you get I'm agree with you. > > Yeah, that's too old of a toolchain for LTO to be usable. A patch to > catch and error out in that case would be good :) Let's do it this way. I will test with the newer gcc version and decrease the size and send a patch. This can be done on Monday, because I don't have access to it. Michael > > -- > Tom
Hi Michael, >HI Tom > >On Sat, Mar 19, 2022 at 6:51 PM Tom Rini <trini@konsulko.com> wrote: >> >> On Sat, Mar 19, 2022 at 06:49:25PM +0100, Michael Nazzareno Trimarchi wrote: >> > HI Tom >> > >> > On Sat, Mar 19, 2022 at 6:44 PM Tom Rini <trini@konsulko.com> wrote: >> > > >> > > On Sat, Mar 19, 2022 at 06:37:18PM +0100, Michael Nazzareno Trimarchi wrote: >> > > > Hi Tom >> > > > >> > > > On Sat, Mar 19, 2022 at 6:30 PM Tom Rini <trini@konsulko.com> wrote: >> > > > > >> > > > > On Sat, Mar 19, 2022 at 06:27:38PM +0100, Michael Nazzareno Trimarchi wrote: >> > > > > > Hi >> > > > > > >> > > > > > On Sat, Mar 19, 2022 at 6:25 PM Tom Rini <trini@konsulko.com> wrote: >> > > > > > > >> > > > > > > On Sat, Mar 19, 2022 at 06:08:18PM +0100, Michael Nazzareno Trimarchi wrote: >> > > > > > > > Hi Tom >>> > > > > > > > >>> > > > > > > > On Sat, Mar 19, 2022 at 6:03 PM Tom Rini <trini@konsulko.com> wrote: >>> > > > > > > > > >>>> > > > > > > > > On Sat, Mar 19, 2022 at 05:48:59PM +0100, Michael Nazzareno Trimarchi wrote: >>>> > > > > > > > > > Hi Tom >>> > > > > > > > > > >>> > > > > > > > > > On Sat, Mar 19, 2022 at 5:05 PM Tom Rini <trini@konsulko.com> wrote: >> > > > > > > > > > > >> > > > > > > > > > > On Sat, Mar 19, 2022 at 02:51:01PM +0100, Michael Nazzareno Trimarchi wrote: >> > > > > > > > > > > > Hi >> > > > > > > > > > > > >> > > > > > > > > > > > On Sat, Mar 19, 2022 at 2:25 PM Fabio Estevam <festevam@gmail.com> wrote: >> > > > > > > > > > > > > >> > > > > > > > > > > > > Hi Michael, >> > > > > > > > > > > > > >> > > > > > > > > > > > > On Sat, Mar 19, 2022 at 6:47 AM Michael Nazzareno Trimarchi >> > > > > > > > > > > > > <michael@amarulasolutions.com> wrote: >> > > > > > > > > > > > > > >> > > > > > > > > > > > > > HI >> > > > > > > > > > > > > > >> > > > > > > > > > > > > > Please send me a link to apply your series >> > > > > > > > > > > > > >> > > > > > > > > > > > > You can get the series from patchwork (just click in the 'series' button) >> > > > > > > > > > > > > https://eur01.safelinks.protection.outlook.com/?>url=https%3A%2F%2Fpatchwork.ozlabs.org%2Fproject%2Fuboot%2Fpatch%2F20220112133127.16880-2->gaurav.jain%40nxp.com%2F&data=04%7C01%7Craffaele.recalcati%40bticino.it%7Cd7b85983151448602>62808da09d260da%7C199686b5bef4496087867a6b1888fee3%7C1%7C0%7C637833096424290979%7CUnkn>own%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C30>00&sdata=cLvLVUDGQzJ7VTyzBrTqOeobl0lgBOxJtmhV2RMjvB0%3D&reserved=0<https://eur01.safelinks.protection.outlook.com/?>url=https%3A%2F%2Fpatchwork.ozlabs.org%2Fproject%2Fuboot%2Fpatch%2F20220112133127.16880-2-gaurav.jain%40nxp.com%2F&data=04%7C01%7Craffaele.recalcati%40bticino.it%7Cd7b8598315144860262808da09d260da%7C199686b5bef4496087867a6b1888fee3%7C1%7C0%7C637833096424290979%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000&sdata=cLvLVUDGQzJ7VTyzBrTqOeobl0lgBOxJtmhV2RMjvB0%3D&reserved=0> >> > > > > > > > > > > > >> > > > > > > > > > > > Done, well, I have tried remove DM_GPIO in SPL. Seems that I need to >> > > > > > > > > > > > remove a lot of features. I have tested LTO build but size >> > > > > > > > > > > > of SPL increase. Is that strange? >> > > > > > > > > > > >> > > > > > > > > > > That is very strange. Can you post your patches somewhere? >> > > > > > > > > > > >> > > > > > > > > > > -- >> > > > > > > > > > > Tom >> > > > > > > > > > >> > > > > > > > > > Start from here 9776c4e9d00ac49d6388ffe9e084ff03b37ae479 >> > > > > > > > > > export ARCH=arm >> > > > > > > > > > export CROSS_COMPILE=arm-linux-gnueabihf- >> > > > > > > > > > >> > > > > > > > > > make imx6dl_mamoj_defconfig >> > > > > > > > > > build it >> > > > > > > > > > >> > > > > > > > > > Try then to enable LTO and build it again >> > > > > > > > > > >> > > > > > > > > > spl/u-boot-spl.bin exceeds file size limit: >> > > > > > > > > > limit: 0xefa0 bytes >> > > > > > > > > > actual: 0xf071 bytes >> > > > > > > > > > excess: 0xd1 bytes >> > > > > > > > > > >> > > > > > > > > > So LTO does not help even on beginning on this board. You don't need >> > > > > > > > > > to apply any patch for this test >> > > > > > > > > >> > > > > > > > > I think that's some artifact of mixing LTO/non-LTO and the world not >> > > > > > > > > getting rebuilt? Just enabling LTO after the defconfig works fine and >> > > > > > > > > is smaller than before. >> > > > > > > > >> > > > > > > > In order to save space I did not change what we have. Every build starts from >> > > > > > > > a mrproper and new configuration. I can not mix LTO/non-LTO in this case. I'm >> > > > > > > > using upstream defconfig and upstream defconfig + LTO enabled and the result is >> > > > > > > > that spl increase in size for LTO building. I'm working to keep out >> > > > > > > > part that are not really needed but >> > > > > > > > I was hoping that LTO give me some help here >> > > > > > > >> > > > > > > Yes, LTO saves about 5KiB on the SPL binary. You just need to enable it >> > > > > > > in the config before you start building, not after you've built >> > > > > > > everything once. >> > > > > > >> > > > > > Offcourse ;) but this not the case. I don't drink enough to think that >> > > > > > change a config, decrease the build size ;) >> > > > > >> > > > > LTO is an entirely different way of the compiler / linker optimizing the >> > > > > binary. So yes, in this case enabling a single option decreases the >> > > > > size. >> > > > >> > > > >> > > > I think we are in a circle. Let's have the result with LTO >> > > > >> > > > spl/keep-syms-lto.c >> > > > ( cd spl && arm-linux-gnueabihf-gcc -nostdlib -nostartfiles >> > > > -fuse-linker-plugin -flto=8 -Wall -Wstrict-prototypes >> > > > -Wno-format-security -fno-builtin -ffreestanding -std=gnu11 >> > > > -fshort-wchar -fno-strict-aliasing -fno-PIE -Os -flto=8 >> > > > -fno-stack-protector -fno-delete-null-pointer-checks -Wno-pointer-sign >> > > > -Wno-stringop-truncation -Wno-array-bounds -Wno-stringop-overflow >> > > > -Wno-maybe-uninitialized -fmacro-prefix-map=./= -g -fstack-usage >> > > > -Wno-format-nonliteral -Wno-address-of-packed-member >> > > > -Wno-unused-but-set-variable -Werror=date-time -Wno-packed-not-aligned >> > > > -ffunction-sections -fdata-sections -fno-stack-protector -D__KERNEL__ >> > > > -D__UBOOT__ -DCONFIG_SPL_BUILD -D__ARM__ -Wa,-mimplicit-it=always >> > > > -mthumb -mthumb-interwork -mabi=aapcs-linux -mno-unaligned-access >> > > > -fno-common -ffixed-r9 -msoft-float -mgeneral-regs-only -pipe >> > > > -march=armv7-a -D__LINUX_ARM_ARCH__=7 -mtune=generic-armv7-a >> > > > -Ispl/include -Iinclude -I./arch/arm/include -include >> > > > ./include/linux/kconfig.h -nostdinc -isystem >> > > > /usr/lib/gcc-cross/arm-linux-gnueabihf/9/include -Wl,-T >> > > > -Wl,u-boot-spl.lds -Wl,-Bstatic -Wl,--gc-sections >> > > > -Wl,--no-dynamic-linker -Wl,--build-id=none -Wl,-Ttext -Wl,0x00908000 >> > > > arch/arm/cpu/armv7/start.o -Wl,--whole-archive >> > > > arch/arm/cpu/armv7/built-in.o arch/arm/cpu/built-in.o >> > > > arch/arm/lib/built-in.o arch/arm/mach-imx/built-in.o >> > > > board/bticino/mamoj/built-in.o common/spl/built-in.o >> > > > common/init/built-in.o boot/built-in.o common/built-in.o >> > > > cmd/built-in.o env/built-in.o lib/built-in.o disk/built-in.o >> > > > drivers/built-in.o drivers/usb/dwc3/built-in.o >> > > > drivers/usb/cdns3/built-in.o dts/built-in.o fs/built-in.o >> > > > keep-syms-lto.o arch/arm/lib/eabi_compat.o arch/arm/lib/lib.a >> > > > -Wl,--no-whole-archive -Wl,-Map,u-boot-spl.map -o u-boot-spl ) >> > > > arm-linux-gnueabihf-objcopy -j .text -j .secure_text -j >> > > > .secure_data -j .rodata -j .hash -j .data -j .got -j .got.plt -j >> > > > .u_boot_list -j .rel.dyn -j .binman_sym_table -j .text_rest -j >> > > > .dtb.init.rodata -j .efi_runtime -j .efi_runtime_rel -O binary >> > > > spl/u-boot-spl spl/u-boot-spl-nodtb.bin >> > > > arm-linux-gnueabihf-objdump -t spl/u-boot-spl > spl/u-boot-spl.sym >> > > > cat spl/u-boot-spl-nodtb.bin spl/u-boot-spl.dtb > spl/u-boot-spl-dtb.bin >> > > > cp spl/u-boot-spl-dtb.bin spl/u-boot-spl.bin >> > > > spl/u-boot-spl.bin exceeds file size limit: >> > > > limit: 0xefa0 bytes >> > > > actual: 0xf079 bytes >> > > > excess: 0xd9 bytes >> > > > make: *** [Makefile:2082: spl/u-boot-spl.bin] Error 1 >> > > > make: *** Deleting file 'spl/u-boot-spl.bin' >> > > > >> > > > and without >> > > > >> > > > NUX_ARM_ARCH__=7 -mtune=generic-armv7-a -D__ASSEMBLY__ -x c -o >> > > > spl/u-boot-spl.cfgout arch/arm/mach-imx/spl_sd.cfg >> > > > ./tools/mkimage -n spl/u-boot-spl.cfgout -T imximage -e 0x00908000 >> > > > -d spl/u-boot-spl.bin SPL >SPL.log && cat SPL.log >> > > > Image Type: Freescale IMX Boot Image >> > > > Image Ver: 2 (i.MX53/6/7 compatible) >> > > > Mode: DCD >> > > > Data Size: 73824 Bytes = 72.09 KiB = 0.07 MiB >> > > > Load Address: 00907420 >> > > > Entry Point: 00908000 >> > > > HAB Blocks: 0x00907400 0x00000000 0x0000fc00 >> > > > DCD Blocks: 0x00910000 0x0000002c 0x00000004 >> > > > make -f ./scripts/Makefile.build obj=arch/arm/mach-imx u-boot-with-spl.imx >> > > > mkdir -p spl/ >> > > > ./tools/mkimage -n spl/u-boot-spl.cfgout -T imximage -e 0x00908000 >> > > > -d spl/u-boot-spl.bin SPL >SPL.log && cat SPL.log >> > > > Image Type: Freescale IMX Boot Image >> > > > Image Ver: 2 (i.MX53/6/7 compatible) >> > > > Mode: DCD >> > > > Data Size: 73824 Bytes = 72.09 KiB = 0.07 MiB >> > > > Load Address: 00907420 >> > > > Entry Point: 00908000 >> > > > HAB Blocks: 0x00907400 0x00000000 0x0000fc00 >> > > > DCD Blocks: 0x00910000 0x0000002c 0x00000004 >> > > > arm-linux-gnueabihf-objcopy -j .text -j .secure_text -j >> > > > .secure_data -j .rodata -j .hash -j .data -j .got -j .got.plt -j >> > > > .u_boot_list -j .rel.dyn -j .binman_sym_table -j .text_rest -j >> > > > .dtb.init.rodata -j .efi_runtime -j .efi_runtime_rel -I binary -O >> > > > binary --pad-to=0x11000 SPL u-boot-with-spl.imx && cat u-boot.img >> >> > > > u-boot-with-spl.imx || rm -f u-boot-with-spl.imx >> > > > >> > > > >> > > > What I'm trying to say is that I have followed the correct steps and >> > > > this is the LTO change >> > > > >> > > > git diff >> > > > diff --git a/configs/imx6dl_mamoj_defconfig b/configs/imx6dl_mamoj_defconfig >> > > > index ae27857e6f..4a535012b2 100644 >> > > > --- a/configs/imx6dl_mamoj_defconfig >> > > > +++ b/configs/imx6dl_mamoj_defconfig >> > > > @@ -14,6 +14,7 @@ CONFIG_SPL_TEXT_BASE=0x00908000 >> > > > CONFIG_SPL_DRIVERS_MISC=y >> > > > CONFIG_IMX_HAB=y >> > > > # CONFIG_CMD_BMODE is not set >> > > > +CONFIG_LTO=y >> > > > CONFIG_DISTRO_DEFAULTS=y >> > > > CONFIG_BOOTDELAY=3 >> > > > CONFIG_SPL_OS_BOOT=y >> > > >> > > Here's what I see: >> > > $ git describe HEAD >> > > v2022.04-rc4-50-g9776c4e9d00a >> > > $ make imx6dl_mamoj_defconfig >> > > HOSTCC scripts/basic/fixdep >> > > HOSTCC scripts/kconfig/conf.o >> > > YACC scripts/kconfig/zconf.tab.c >> > > LEX scripts/kconfig/zconf.lex.c >> > > HOSTCC scripts/kconfig/zconf.tab.o >> > > HOSTLD scripts/kconfig/conf >> > > # >> > > # configuration written to .config >> > > # >> > > $ sed -i -e 's/# CONFIG_LTO is not set/CONFIG_LTO=y/' .config >> > > $ grep LTO .config >> > > CONFIG_ARCH_SUPPORTS_LTO=y >> > > CONFIG_LTO=y >> > > $ make CROSS_COMPILE=~/.buildman-toolchains/gcc-11.1.0-nolibc/arm-linux-gnueabi/bin/arm-l> >linux-gnueabi- -sj12 >> > > ===================== WARNING ====================== >> > > This board does not use CONFIG_DM_SERIAL (Driver Model >> > > for Serial drivers). Please update the board to use >> > > CONFIG_DM_SERIAL before the v2023.04 release. Failure to >> > > update by the deadline may result in board removal. >> > > See doc/driver-model/migration.rst for more info. >> > > ==================================================== >> > > arch/arm/dts/imx6dl-dhcom-pdk2.dtb: Warning (pwms_property): /display-bl:pwms: cell 3 is not a >phandle reference >> > > arch/arm/dts/imx6dl-dhcom-pdk2.dtb: Warning (pwms_property): /display-bl: Missing property '#pwm-cells' in node /soc/bus@2000000/gpc@20dc000 or bad phandle (referred from pwms[3]) >> > > arch/arm/dts/imx6q-dhcom-pdk2.dtb: Warning (pwms_property): /display-bl:pwms: cell 3 is not a phandle reference >> > > arch/arm/dts/imx6q-dhcom-pdk2.dtb: Warning (pwms_property): /display-bl: Missing property '>#pwm-cells' in node /soc/bus@2000000/gpc@20dc000 or bad phandle (referred from pwms[3]) >> > > $ ls -lh spl/u-boot-spl* > >> > -rwxrwxr-x 1 trini trini 944K Mar 19 13:40 spl/u-boot-spl > >> > -rw-rw-r-- 1 trini trini 54K Mar 19 13:40 spl/u-boot-spl.bin > >> > -rw-rw-r-- 1 trini trini 1.6K Mar 19 13:40 spl/u-boot-spl.cfgout > >> > -rw-rw-r-- 1 trini trini 2.2K Mar 19 13:40 spl/u-boot-spl.dtb > >> > -rw-rw-r-- 1 trini trini 54K Mar 19 13:40 spl/u-boot-spl-dtb.bin > >> > -rw-rw-r-- 1 trini trini 728 Mar 19 13:40 spl/u-boot-spl.lds > >> > -rw-rw-r-- 1 trini trini 5.9K Mar 19 13:40 spl/u-boot-spl.ltrans0.ltrans.su > >> > -rw-rw-r-- 1 trini trini 7.2K Mar 19 13:40 spl/u-boot-spl.ltrans1.ltrans.su > >> > -rw-rw-r-- 1 trini trini 182K Mar 19 13:40 spl/u-boot-spl.map > >> > -rwxrwxr-x 1 trini trini 51K Mar 19 13:40 spl/u-boot-spl-nodtb.bin >> > > -rw-rw-r-- 1 trini trini 135K Mar 19 13:40 spl/u-boot-spl.sym >> > > >> > >> > The only difference is the toolchain gcc version 9.4.0 (Ubuntu >> > 9.4.0-1ubuntu1~20.04) and for the result you get I'm agree with you. >> >> Yeah, that's too old of a toolchain for LTO to be usable. A patch to >> catch and error out in that case would be good :) > >Let's do it this way. I will test with the newer gcc version and >decrease the size and send a patch. >This can be done on Monday, because I don't have access to it. > >Michael I can test on the board if needed. Let me know. > > -- > Tom -- Michael Nazzareno Trimarchi Co-Founder & Chief Executive Officer M. +39 347 913 2170 michael@amarulasolutions.com
Hi Michael > -----Original Message----- > From: Michael Nazzareno Trimarchi <michael@amarulasolutions.com> > Sent: Saturday, March 19, 2022 11:30 PM > To: Tom Rini <trini@konsulko.com> > Cc: Fabio Estevam <festevam@gmail.com>; Gaurav Jain > <gaurav.jain@nxp.com>; Stefano Babic <sbabic@denx.de>; Michael Walle > <michael@walle.cc>; Varun Sethi <V.Sethi@nxp.com>; Adrian Alonso > <adrian.alonso@nxp.com>; Alison Wang <alison.wang@nxp.com>; Andy Tang > <andy.tang@nxp.com>; Franck Lenormand <franck.lenormand@nxp.com>; > Horia Geanta <horia.geanta@nxp.com>; Ji Luo <ji.luo@nxp.com>; > marex@denx.de; Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>; > Mingkai Hu <mingkai.hu@nxp.com>; olteanv@gmail.com; Pankaj Gupta > <pankaj.gupta@nxp.com>; Peng Fan <peng.fan@nxp.com>; Pramod Kumar > <pramod.kumar_1@nxp.com>; Priyanka Jain <priyanka.jain@nxp.com>; Rajesh > Bhagat <rajesh.bhagat@nxp.com>; Sahil Malhotra <sahil.malhotra@nxp.com>; > Shengzhou Liu <shengzhou.liu@nxp.com>; Silvano Di Ninno > <silvano.dininno@nxp.com>; sjg@chromium.org; u-boot@lists.denx.de; dl- > uboot-imx <uboot-imx@nxp.com>; Wasim Khan <wasim.khan@nxp.com>; Ye Li > <ye.li@nxp.com>; Raffaele RECALCATI <raffaele.recalcati@bticino.it>; Jagan > Teki <jagan@amarulasolutions.com> > Subject: Re: [EXT] Re: [PATCH v8 01/15] crypto/fsl: Add support for CAAM Job > ring driver model > > Caution: EXT Email > > HI Tom > > On Sat, Mar 19, 2022 at 6:51 PM Tom Rini <trini@konsulko.com> wrote: > > > > On Sat, Mar 19, 2022 at 06:49:25PM +0100, Michael Nazzareno Trimarchi > wrote: > > > HI Tom > > > > > > On Sat, Mar 19, 2022 at 6:44 PM Tom Rini <trini@konsulko.com> wrote: > > > > > > > > On Sat, Mar 19, 2022 at 06:37:18PM +0100, Michael Nazzareno Trimarchi > wrote: > > > > > Hi Tom > > > > > > > > > > On Sat, Mar 19, 2022 at 6:30 PM Tom Rini <trini@konsulko.com> wrote: > > > > > > > > > > > > On Sat, Mar 19, 2022 at 06:27:38PM +0100, Michael Nazzareno > Trimarchi wrote: > > > > > > > Hi > > > > > > > > > > > > > > On Sat, Mar 19, 2022 at 6:25 PM Tom Rini <trini@konsulko.com> > wrote: > > > > > > > > > > > > > > > > On Sat, Mar 19, 2022 at 06:08:18PM +0100, Michael Nazzareno > Trimarchi wrote: > > > > > > > > > Hi Tom > > > > > > > > > > > > > > > > > > On Sat, Mar 19, 2022 at 6:03 PM Tom Rini <trini@konsulko.com> > wrote: > > > > > > > > > > > > > > > > > > > > On Sat, Mar 19, 2022 at 05:48:59PM +0100, Michael Nazzareno > Trimarchi wrote: > > > > > > > > > > > Hi Tom > > > > > > > > > > > > > > > > > > > > > > On Sat, Mar 19, 2022 at 5:05 PM Tom Rini > <trini@konsulko.com> wrote: > > > > > > > > > > > > > > > > > > > > > > > > On Sat, Mar 19, 2022 at 02:51:01PM +0100, Michael > Nazzareno Trimarchi wrote: > > > > > > > > > > > > > Hi > > > > > > > > > > > > > > > > > > > > > > > > > > On Sat, Mar 19, 2022 at 2:25 PM Fabio Estevam > <festevam@gmail.com> wrote: > > > > > > > > > > > > > > > > > > > > > > > > > > > > Hi Michael, > > > > > > > > > > > > > > > > > > > > > > > > > > > > On Sat, Mar 19, 2022 at 6:47 AM Michael > > > > > > > > > > > > > > Nazzareno Trimarchi <michael@amarulasolutions.com> > wrote: > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > HI > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > Please send me a link to apply your series > > > > > > > > > > > > > > > > > > > > > > > > > > > > You can get the series from patchwork (just > > > > > > > > > > > > > > click in the 'series' button) > > > > > > > > > > > > > > https://eur01.safelinks.protection.outlook.com > > > > > > > > > > > > > > /?url=https%3A%2F%2Fpatchwork.ozlabs.org%2Fpro > > > > > > > > > > > > > > ject%2Fuboot%2Fpatch%2F20220112133127.16880-2- > > > > > > > > > > > > > > gaurav.jain%40nxp.com%2F&data=04%7C01%7Cga > > > > > > > > > > > > > > urav.jain%40nxp.com%7Cf2e5639efe9e491287e008da > > > > > > > > > > > > > > 09d260f9%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C > > > > > > > > > > > > > > > 0%7C0%7C637833096989631395%7CUnknown%7CTWFpbGZ > > > > > > > > > > > > > > sb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBT > > > > > > > > > > > > > > iI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000&sdata=Sv5 > > > > > > > > > > > > > > > W81K1CO1KdNO%2FW8v4cCrqK4gLC0IoChfHYmHSEZM%3D& > > > > > > > > > > > > > > amp;reserved=0 > > > > > > > > > > > > > > > > > > > > > > > > > > Done, well, I have tried remove DM_GPIO in SPL. > > > > > > > > > > > > > Seems that I need to remove a lot of features. I > > > > > > > > > > > > > have tested LTO build but size of SPL increase. Is that > strange? > > > > > > > > > > > > > > > > > > > > > > > > That is very strange. Can you post your patches somewhere? > > > > > > > > > > > > > > > > > > > > > > > > -- > > > > > > > > > > > > Tom > > > > > > > > > > > > > > > > > > > > > > Start from here > > > > > > > > > > > 9776c4e9d00ac49d6388ffe9e084ff03b37ae479 > > > > > > > > > > > export ARCH=arm > > > > > > > > > > > export CROSS_COMPILE=arm-linux-gnueabihf- > > > > > > > > > > > > > > > > > > > > > > make imx6dl_mamoj_defconfig build it > > > > > > > > > > > > > > > > > > > > > > Try then to enable LTO and build it again > > > > > > > > > > > > > > > > > > > > > > spl/u-boot-spl.bin exceeds file size limit: > > > > > > > > > > > limit: 0xefa0 bytes > > > > > > > > > > > actual: 0xf071 bytes > > > > > > > > > > > excess: 0xd1 bytes > > > > > > > > > > > > > > > > > > > > > > So LTO does not help even on beginning on this > > > > > > > > > > > board. You don't need to apply any patch for this > > > > > > > > > > > test > > > > > > > > > > > > > > > > > > > > I think that's some artifact of mixing LTO/non-LTO and > > > > > > > > > > the world not getting rebuilt? Just enabling LTO > > > > > > > > > > after the defconfig works fine and is smaller than before. > > > > > > > > > > > > > > > > > > In order to save space I did not change what we have. > > > > > > > > > Every build starts from a mrproper and new > > > > > > > > > configuration. I can not mix LTO/non-LTO in this case. > > > > > > > > > I'm using upstream defconfig and upstream defconfig + > > > > > > > > > LTO enabled and the result is that spl increase in size > > > > > > > > > for LTO building. I'm working to keep out part that are > > > > > > > > > not really needed but I was hoping that LTO give me some > > > > > > > > > help here > > > > > > > > > > > > > > > > Yes, LTO saves about 5KiB on the SPL binary. You just > > > > > > > > need to enable it in the config before you start building, > > > > > > > > not after you've built everything once. > > > > > > > > > > > > > > Offcourse ;) but this not the case. I don't drink enough to > > > > > > > think that change a config, decrease the build size ;) > > > > > > > > > > > > LTO is an entirely different way of the compiler / linker > > > > > > optimizing the binary. So yes, in this case enabling a single > > > > > > option decreases the size. > > > > > > > > > > > > > > > I think we are in a circle. Let's have the result with LTO > > > > > > > > > > spl/keep-syms-lto.c > > > > > ( cd spl && arm-linux-gnueabihf-gcc -nostdlib -nostartfiles > > > > > -fuse-linker-plugin -flto=8 -Wall -Wstrict-prototypes > > > > > -Wno-format-security -fno-builtin -ffreestanding -std=gnu11 > > > > > -fshort-wchar -fno-strict-aliasing -fno-PIE -Os -flto=8 > > > > > -fno-stack-protector -fno-delete-null-pointer-checks > > > > > -Wno-pointer-sign -Wno-stringop-truncation -Wno-array-bounds > > > > > -Wno-stringop-overflow -Wno-maybe-uninitialized > > > > > -fmacro-prefix-map=./= -g -fstack-usage -Wno-format-nonliteral > > > > > -Wno-address-of-packed-member -Wno-unused-but-set-variable > > > > > -Werror=date-time -Wno-packed-not-aligned -ffunction-sections > > > > > -fdata-sections -fno-stack-protector -D__KERNEL__ -D__UBOOT__ > > > > > -DCONFIG_SPL_BUILD -D__ARM__ -Wa,-mimplicit-it=always -mthumb - > mthumb-interwork -mabi=aapcs-linux -mno-unaligned-access > > > > > -fno-common -ffixed-r9 -msoft-float -mgeneral-regs-only -pipe > > > > > -march=armv7-a -D__LINUX_ARM_ARCH__=7 -mtune=generic-armv7-a > > > > > -Ispl/include -Iinclude -I./arch/arm/include -include > > > > > ./include/linux/kconfig.h -nostdinc -isystem > > > > > /usr/lib/gcc-cross/arm-linux-gnueabihf/9/include -Wl,-T > > > > > -Wl,u-boot-spl.lds -Wl,-Bstatic -Wl,--gc-sections > > > > > -Wl,--no-dynamic-linker -Wl,--build-id=none -Wl,-Ttext > > > > > -Wl,0x00908000 arch/arm/cpu/armv7/start.o -Wl,--whole-archive > > > > > arch/arm/cpu/armv7/built-in.o arch/arm/cpu/built-in.o > > > > > arch/arm/lib/built-in.o arch/arm/mach-imx/built-in.o > > > > > board/bticino/mamoj/built-in.o common/spl/built-in.o > > > > > common/init/built-in.o boot/built-in.o common/built-in.o > > > > > cmd/built-in.o env/built-in.o lib/built-in.o disk/built-in.o > > > > > drivers/built-in.o drivers/usb/dwc3/built-in.o > > > > > drivers/usb/cdns3/built-in.o dts/built-in.o fs/built-in.o > > > > > keep-syms-lto.o arch/arm/lib/eabi_compat.o arch/arm/lib/lib.a > > > > > -Wl,--no-whole-archive -Wl,-Map,u-boot-spl.map -o u-boot-spl ) > > > > > arm-linux-gnueabihf-objcopy -j .text -j .secure_text -j > > > > > .secure_data -j .rodata -j .hash -j .data -j .got -j .got.plt -j > > > > > .u_boot_list -j .rel.dyn -j .binman_sym_table -j .text_rest -j > > > > > .dtb.init.rodata -j .efi_runtime -j .efi_runtime_rel -O binary > > > > > spl/u-boot-spl spl/u-boot-spl-nodtb.bin > > > > > arm-linux-gnueabihf-objdump -t spl/u-boot-spl > spl/u-boot-spl.sym > > > > > cat spl/u-boot-spl-nodtb.bin spl/u-boot-spl.dtb > spl/u-boot-spl-dtb.bin > > > > > cp spl/u-boot-spl-dtb.bin spl/u-boot-spl.bin > > > > > spl/u-boot-spl.bin exceeds file size limit: > > > > > limit: 0xefa0 bytes > > > > > actual: 0xf079 bytes > > > > > excess: 0xd9 bytes > > > > > make: *** [Makefile:2082: spl/u-boot-spl.bin] Error 1 > > > > > make: *** Deleting file 'spl/u-boot-spl.bin' > > > > > > > > > > and without > > > > > > > > > > NUX_ARM_ARCH__=7 -mtune=generic-armv7-a -D__ASSEMBLY__ -x c - > o > > > > > spl/u-boot-spl.cfgout arch/arm/mach-imx/spl_sd.cfg > > > > > ./tools/mkimage -n spl/u-boot-spl.cfgout -T imximage -e > > > > > 0x00908000 -d spl/u-boot-spl.bin SPL >SPL.log && cat SPL.log > > > > > Image Type: Freescale IMX Boot Image > > > > > Image Ver: 2 (i.MX53/6/7 compatible) > > > > > Mode: DCD > > > > > Data Size: 73824 Bytes = 72.09 KiB = 0.07 MiB > > > > > Load Address: 00907420 > > > > > Entry Point: 00908000 > > > > > HAB Blocks: 0x00907400 0x00000000 0x0000fc00 > > > > > DCD Blocks: 0x00910000 0x0000002c 0x00000004 > > > > > make -f ./scripts/Makefile.build obj=arch/arm/mach-imx > > > > > u-boot-with-spl.imx mkdir -p spl/ > > > > > ./tools/mkimage -n spl/u-boot-spl.cfgout -T imximage -e > > > > > 0x00908000 -d spl/u-boot-spl.bin SPL >SPL.log && cat SPL.log > > > > > Image Type: Freescale IMX Boot Image > > > > > Image Ver: 2 (i.MX53/6/7 compatible) > > > > > Mode: DCD > > > > > Data Size: 73824 Bytes = 72.09 KiB = 0.07 MiB > > > > > Load Address: 00907420 > > > > > Entry Point: 00908000 > > > > > HAB Blocks: 0x00907400 0x00000000 0x0000fc00 > > > > > DCD Blocks: 0x00910000 0x0000002c 0x00000004 > > > > > arm-linux-gnueabihf-objcopy -j .text -j .secure_text -j > > > > > .secure_data -j .rodata -j .hash -j .data -j .got -j .got.plt -j > > > > > .u_boot_list -j .rel.dyn -j .binman_sym_table -j .text_rest -j > > > > > .dtb.init.rodata -j .efi_runtime -j .efi_runtime_rel -I binary > > > > > -O binary --pad-to=0x11000 SPL u-boot-with-spl.imx && cat > > > > > u-boot.img >> u-boot-with-spl.imx || rm -f u-boot-with-spl.imx > > > > > > > > > > > > > > > What I'm trying to say is that I have followed the correct steps > > > > > and this is the LTO change > > > > > > > > > > git diff > > > > > diff --git a/configs/imx6dl_mamoj_defconfig > > > > > b/configs/imx6dl_mamoj_defconfig index ae27857e6f..4a535012b2 > > > > > 100644 > > > > > --- a/configs/imx6dl_mamoj_defconfig > > > > > +++ b/configs/imx6dl_mamoj_defconfig > > > > > @@ -14,6 +14,7 @@ CONFIG_SPL_TEXT_BASE=0x00908000 > > > > > CONFIG_SPL_DRIVERS_MISC=y CONFIG_IMX_HAB=y # > CONFIG_CMD_BMODE > > > > > is not set > > > > > +CONFIG_LTO=y > > > > > CONFIG_DISTRO_DEFAULTS=y > > > > > CONFIG_BOOTDELAY=3 > > > > > CONFIG_SPL_OS_BOOT=y > > > > > > > > Here's what I see: > > > > $ git describe HEAD > > > > v2022.04-rc4-50-g9776c4e9d00a > > > > $ make imx6dl_mamoj_defconfig > > > > HOSTCC scripts/basic/fixdep > > > > HOSTCC scripts/kconfig/conf.o > > > > YACC scripts/kconfig/zconf.tab.c > > > > LEX scripts/kconfig/zconf.lex.c > > > > HOSTCC scripts/kconfig/zconf.tab.o > > > > HOSTLD scripts/kconfig/conf > > > > # > > > > # configuration written to .config # $ sed -i -e 's/# CONFIG_LTO > > > > is not set/CONFIG_LTO=y/' .config $ grep LTO .config > > > > CONFIG_ARCH_SUPPORTS_LTO=y CONFIG_LTO=y $ make > > > > CROSS_COMPILE=~/.buildman-toolchains/gcc-11.1.0-nolibc/arm-linux-g > > > > nueabi/bin/arm-linux-gnueabi- -sj12 ===================== WARNING > > > > ====================== This board does not use CONFIG_DM_SERIAL > > > > (Driver Model for Serial drivers). Please update the board to use > > > > CONFIG_DM_SERIAL before the v2023.04 release. Failure to update by > > > > the deadline may result in board removal. > > > > See doc/driver-model/migration.rst for more info. > > > > ==================================================== > > > > arch/arm/dts/imx6dl-dhcom-pdk2.dtb: Warning (pwms_property): > > > > /display-bl:pwms: cell 3 is not a phandle reference > > > > arch/arm/dts/imx6dl-dhcom-pdk2.dtb: Warning (pwms_property): > > > > /display-bl: Missing property '#pwm-cells' in node > > > > /soc/bus@2000000/gpc@20dc000 or bad phandle (referred from > > > > pwms[3]) > > > > arch/arm/dts/imx6q-dhcom-pdk2.dtb: Warning (pwms_property): > > > > /display-bl:pwms: cell 3 is not a phandle reference > > > > arch/arm/dts/imx6q-dhcom-pdk2.dtb: Warning (pwms_property): > > > > /display-bl: Missing property '#pwm-cells' in node > > > > /soc/bus@2000000/gpc@20dc000 or bad phandle (referred from > > > > pwms[3]) $ ls -lh spl/u-boot-spl* -rwxrwxr-x 1 trini trini 944K > > > > Mar 19 13:40 spl/u-boot-spl > > > > -rw-rw-r-- 1 trini trini 54K Mar 19 13:40 spl/u-boot-spl.bin > > > > -rw-rw-r-- 1 trini trini 1.6K Mar 19 13:40 spl/u-boot-spl.cfgout > > > > -rw-rw-r-- 1 trini trini 2.2K Mar 19 13:40 spl/u-boot-spl.dtb > > > > -rw-rw-r-- 1 trini trini 54K Mar 19 13:40 spl/u-boot-spl-dtb.bin > > > > -rw-rw-r-- 1 trini trini 728 Mar 19 13:40 spl/u-boot-spl.lds > > > > -rw-rw-r-- 1 trini trini 5.9K Mar 19 13:40 > > > > spl/u-boot-spl.ltrans0.ltrans.su > > > > -rw-rw-r-- 1 trini trini 7.2K Mar 19 13:40 > > > > spl/u-boot-spl.ltrans1.ltrans.su > > > > -rw-rw-r-- 1 trini trini 182K Mar 19 13:40 spl/u-boot-spl.map > > > > -rwxrwxr-x 1 trini trini 51K Mar 19 13:40 > > > > spl/u-boot-spl-nodtb.bin > > > > -rw-rw-r-- 1 trini trini 135K Mar 19 13:40 spl/u-boot-spl.sym > > > > > > > > > > The only difference is the toolchain gcc version 9.4.0 (Ubuntu > > > 9.4.0-1ubuntu1~20.04) and for the result you get I'm agree with you. > > > > Yeah, that's too old of a toolchain for LTO to be usable. A patch to > > catch and error out in that case would be good :) > > Let's do it this way. I will test with the newer gcc version and decrease the size > and send a patch. > This can be done on Monday, because I don't have access to it. Waiting for your patch to decrease the spl size as my patch series is dependent on your fix. Gaurav > > Michael > > > > -- > > Tom > > > > -- > Michael Nazzareno Trimarchi > Co-Founder & Chief Executive Officer > M. +39 347 913 2170 > michael@amarulasolutions.com > __________________________________ > > Amarula Solutions BV > Joop Geesinkweg 125, 1114 AB, Amsterdam, NL T. +31 (0)85 111 9172 > info@amarulasolutions.com > https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fwww.ama > rulasolutions.com%2F&data=04%7C01%7Cgaurav.jain%40nxp.com%7Cf2e > 5639efe9e491287e008da09d260f9%7C686ea1d3bc2b4c6fa92cd99c5c301635% > 7C0%7C0%7C637833096989631395%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiM > C4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000&a > mp;sdata=pBaV4f5%2BrMJh7CsyEwpU0xOCQVQjWMkIyZ5%2BoPeey4k%3D&a > mp;reserved=0
Hi On Wed, Mar 23, 2022 at 1:06 PM Gaurav Jain <gaurav.jain@nxp.com> wrote: > > Hi Michael > > > -----Original Message----- > > From: Michael Nazzareno Trimarchi <michael@amarulasolutions.com> > > Sent: Saturday, March 19, 2022 11:30 PM > > To: Tom Rini <trini@konsulko.com> > > Cc: Fabio Estevam <festevam@gmail.com>; Gaurav Jain > > <gaurav.jain@nxp.com>; Stefano Babic <sbabic@denx.de>; Michael Walle > > <michael@walle.cc>; Varun Sethi <V.Sethi@nxp.com>; Adrian Alonso > > <adrian.alonso@nxp.com>; Alison Wang <alison.wang@nxp.com>; Andy Tang > > <andy.tang@nxp.com>; Franck Lenormand <franck.lenormand@nxp.com>; > > Horia Geanta <horia.geanta@nxp.com>; Ji Luo <ji.luo@nxp.com>; > > marex@denx.de; Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>; > > Mingkai Hu <mingkai.hu@nxp.com>; olteanv@gmail.com; Pankaj Gupta > > <pankaj.gupta@nxp.com>; Peng Fan <peng.fan@nxp.com>; Pramod Kumar > > <pramod.kumar_1@nxp.com>; Priyanka Jain <priyanka.jain@nxp.com>; Rajesh > > Bhagat <rajesh.bhagat@nxp.com>; Sahil Malhotra <sahil.malhotra@nxp.com>; > > Shengzhou Liu <shengzhou.liu@nxp.com>; Silvano Di Ninno > > <silvano.dininno@nxp.com>; sjg@chromium.org; u-boot@lists.denx.de; dl- > > uboot-imx <uboot-imx@nxp.com>; Wasim Khan <wasim.khan@nxp.com>; Ye Li > > <ye.li@nxp.com>; Raffaele RECALCATI <raffaele.recalcati@bticino.it>; Jagan > > Teki <jagan@amarulasolutions.com> > > Subject: Re: [EXT] Re: [PATCH v8 01/15] crypto/fsl: Add support for CAAM Job > > ring driver model > > > > Caution: EXT Email > > > > HI Tom > > > > On Sat, Mar 19, 2022 at 6:51 PM Tom Rini <trini@konsulko.com> wrote: > > > > > > On Sat, Mar 19, 2022 at 06:49:25PM +0100, Michael Nazzareno Trimarchi > > wrote: > > > > HI Tom > > > > > > > > On Sat, Mar 19, 2022 at 6:44 PM Tom Rini <trini@konsulko.com> wrote: > > > > > > > > > > On Sat, Mar 19, 2022 at 06:37:18PM +0100, Michael Nazzareno Trimarchi > > wrote: > > > > > > Hi Tom > > > > > > > > > > > > On Sat, Mar 19, 2022 at 6:30 PM Tom Rini <trini@konsulko.com> wrote: > > > > > > > > > > > > > > On Sat, Mar 19, 2022 at 06:27:38PM +0100, Michael Nazzareno > > Trimarchi wrote: > > > > > > > > Hi > > > > > > > > > > > > > > > > On Sat, Mar 19, 2022 at 6:25 PM Tom Rini <trini@konsulko.com> > > wrote: > > > > > > > > > > > > > > > > > > On Sat, Mar 19, 2022 at 06:08:18PM +0100, Michael Nazzareno > > Trimarchi wrote: > > > > > > > > > > Hi Tom > > > > > > > > > > > > > > > > > > > > On Sat, Mar 19, 2022 at 6:03 PM Tom Rini <trini@konsulko.com> > > wrote: > > > > > > > > > > > > > > > > > > > > > > On Sat, Mar 19, 2022 at 05:48:59PM +0100, Michael Nazzareno > > Trimarchi wrote: > > > > > > > > > > > > Hi Tom > > > > > > > > > > > > > > > > > > > > > > > > On Sat, Mar 19, 2022 at 5:05 PM Tom Rini > > <trini@konsulko.com> wrote: > > > > > > > > > > > > > > > > > > > > > > > > > > On Sat, Mar 19, 2022 at 02:51:01PM +0100, Michael > > Nazzareno Trimarchi wrote: > > > > > > > > > > > > > > Hi > > > > > > > > > > > > > > > > > > > > > > > > > > > > On Sat, Mar 19, 2022 at 2:25 PM Fabio Estevam > > <festevam@gmail.com> wrote: > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > Hi Michael, > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > On Sat, Mar 19, 2022 at 6:47 AM Michael > > > > > > > > > > > > > > > Nazzareno Trimarchi <michael@amarulasolutions.com> > > wrote: > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > HI > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > Please send me a link to apply your series > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > You can get the series from patchwork (just > > > > > > > > > > > > > > > click in the 'series' button) > > > > > > > > > > > > > > > https://eur01.safelinks.protection.outlook.com > > > > > > > > > > > > > > > /?url=https%3A%2F%2Fpatchwork.ozlabs.org%2Fpro > > > > > > > > > > > > > > > ject%2Fuboot%2Fpatch%2F20220112133127.16880-2- > > > > > > > > > > > > > > > gaurav.jain%40nxp.com%2F&data=04%7C01%7Cga > > > > > > > > > > > > > > > urav.jain%40nxp.com%7Cf2e5639efe9e491287e008da > > > > > > > > > > > > > > > 09d260f9%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C > > > > > > > > > > > > > > > > > 0%7C0%7C637833096989631395%7CUnknown%7CTWFpbGZ > > > > > > > > > > > > > > > sb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBT > > > > > > > > > > > > > > > iI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000&sdata=Sv5 > > > > > > > > > > > > > > > > > W81K1CO1KdNO%2FW8v4cCrqK4gLC0IoChfHYmHSEZM%3D& > > > > > > > > > > > > > > > amp;reserved=0 > > > > > > > > > > > > > > > > > > > > > > > > > > > > Done, well, I have tried remove DM_GPIO in SPL. > > > > > > > > > > > > > > Seems that I need to remove a lot of features. I > > > > > > > > > > > > > > have tested LTO build but size of SPL increase. Is that > > strange? > > > > > > > > > > > > > > > > > > > > > > > > > > That is very strange. Can you post your patches somewhere? > > > > > > > > > > > > > > > > > > > > > > > > > > -- > > > > > > > > > > > > > Tom > > > > > > > > > > > > > > > > > > > > > > > > Start from here > > > > > > > > > > > > 9776c4e9d00ac49d6388ffe9e084ff03b37ae479 > > > > > > > > > > > > export ARCH=arm > > > > > > > > > > > > export CROSS_COMPILE=arm-linux-gnueabihf- > > > > > > > > > > > > > > > > > > > > > > > > make imx6dl_mamoj_defconfig build it > > > > > > > > > > > > > > > > > > > > > > > > Try then to enable LTO and build it again > > > > > > > > > > > > > > > > > > > > > > > > spl/u-boot-spl.bin exceeds file size limit: > > > > > > > > > > > > limit: 0xefa0 bytes > > > > > > > > > > > > actual: 0xf071 bytes > > > > > > > > > > > > excess: 0xd1 bytes > > > > > > > > > > > > > > > > > > > > > > > > So LTO does not help even on beginning on this > > > > > > > > > > > > board. You don't need to apply any patch for this > > > > > > > > > > > > test > > > > > > > > > > > > > > > > > > > > > > I think that's some artifact of mixing LTO/non-LTO and > > > > > > > > > > > the world not getting rebuilt? Just enabling LTO > > > > > > > > > > > after the defconfig works fine and is smaller than before. > > > > > > > > > > > > > > > > > > > > In order to save space I did not change what we have. > > > > > > > > > > Every build starts from a mrproper and new > > > > > > > > > > configuration. I can not mix LTO/non-LTO in this case. > > > > > > > > > > I'm using upstream defconfig and upstream defconfig + > > > > > > > > > > LTO enabled and the result is that spl increase in size > > > > > > > > > > for LTO building. I'm working to keep out part that are > > > > > > > > > > not really needed but I was hoping that LTO give me some > > > > > > > > > > help here > > > > > > > > > > > > > > > > > > Yes, LTO saves about 5KiB on the SPL binary. You just > > > > > > > > > need to enable it in the config before you start building, > > > > > > > > > not after you've built everything once. > > > > > > > > > > > > > > > > Offcourse ;) but this not the case. I don't drink enough to > > > > > > > > think that change a config, decrease the build size ;) > > > > > > > > > > > > > > LTO is an entirely different way of the compiler / linker > > > > > > > optimizing the binary. So yes, in this case enabling a single > > > > > > > option decreases the size. > > > > > > > > > > > > > > > > > > I think we are in a circle. Let's have the result with LTO > > > > > > > > > > > > spl/keep-syms-lto.c > > > > > > ( cd spl && arm-linux-gnueabihf-gcc -nostdlib -nostartfiles > > > > > > -fuse-linker-plugin -flto=8 -Wall -Wstrict-prototypes > > > > > > -Wno-format-security -fno-builtin -ffreestanding -std=gnu11 > > > > > > -fshort-wchar -fno-strict-aliasing -fno-PIE -Os -flto=8 > > > > > > -fno-stack-protector -fno-delete-null-pointer-checks > > > > > > -Wno-pointer-sign -Wno-stringop-truncation -Wno-array-bounds > > > > > > -Wno-stringop-overflow -Wno-maybe-uninitialized > > > > > > -fmacro-prefix-map=./= -g -fstack-usage -Wno-format-nonliteral > > > > > > -Wno-address-of-packed-member -Wno-unused-but-set-variable > > > > > > -Werror=date-time -Wno-packed-not-aligned -ffunction-sections > > > > > > -fdata-sections -fno-stack-protector -D__KERNEL__ -D__UBOOT__ > > > > > > -DCONFIG_SPL_BUILD -D__ARM__ -Wa,-mimplicit-it=always -mthumb - > > mthumb-interwork -mabi=aapcs-linux -mno-unaligned-access > > > > > > -fno-common -ffixed-r9 -msoft-float -mgeneral-regs-only -pipe > > > > > > -march=armv7-a -D__LINUX_ARM_ARCH__=7 -mtune=generic-armv7-a > > > > > > -Ispl/include -Iinclude -I./arch/arm/include -include > > > > > > ./include/linux/kconfig.h -nostdinc -isystem > > > > > > /usr/lib/gcc-cross/arm-linux-gnueabihf/9/include -Wl,-T > > > > > > -Wl,u-boot-spl.lds -Wl,-Bstatic -Wl,--gc-sections > > > > > > -Wl,--no-dynamic-linker -Wl,--build-id=none -Wl,-Ttext > > > > > > -Wl,0x00908000 arch/arm/cpu/armv7/start.o -Wl,--whole-archive > > > > > > arch/arm/cpu/armv7/built-in.o arch/arm/cpu/built-in.o > > > > > > arch/arm/lib/built-in.o arch/arm/mach-imx/built-in.o > > > > > > board/bticino/mamoj/built-in.o common/spl/built-in.o > > > > > > common/init/built-in.o boot/built-in.o common/built-in.o > > > > > > cmd/built-in.o env/built-in.o lib/built-in.o disk/built-in.o > > > > > > drivers/built-in.o drivers/usb/dwc3/built-in.o > > > > > > drivers/usb/cdns3/built-in.o dts/built-in.o fs/built-in.o > > > > > > keep-syms-lto.o arch/arm/lib/eabi_compat.o arch/arm/lib/lib.a > > > > > > -Wl,--no-whole-archive -Wl,-Map,u-boot-spl.map -o u-boot-spl ) > > > > > > arm-linux-gnueabihf-objcopy -j .text -j .secure_text -j > > > > > > .secure_data -j .rodata -j .hash -j .data -j .got -j .got.plt -j > > > > > > .u_boot_list -j .rel.dyn -j .binman_sym_table -j .text_rest -j > > > > > > .dtb.init.rodata -j .efi_runtime -j .efi_runtime_rel -O binary > > > > > > spl/u-boot-spl spl/u-boot-spl-nodtb.bin > > > > > > arm-linux-gnueabihf-objdump -t spl/u-boot-spl > spl/u-boot-spl.sym > > > > > > cat spl/u-boot-spl-nodtb.bin spl/u-boot-spl.dtb > spl/u-boot-spl-dtb.bin > > > > > > cp spl/u-boot-spl-dtb.bin spl/u-boot-spl.bin > > > > > > spl/u-boot-spl.bin exceeds file size limit: > > > > > > limit: 0xefa0 bytes > > > > > > actual: 0xf079 bytes > > > > > > excess: 0xd9 bytes > > > > > > make: *** [Makefile:2082: spl/u-boot-spl.bin] Error 1 > > > > > > make: *** Deleting file 'spl/u-boot-spl.bin' > > > > > > > > > > > > and without > > > > > > > > > > > > NUX_ARM_ARCH__=7 -mtune=generic-armv7-a -D__ASSEMBLY__ -x c - > > o > > > > > > spl/u-boot-spl.cfgout arch/arm/mach-imx/spl_sd.cfg > > > > > > ./tools/mkimage -n spl/u-boot-spl.cfgout -T imximage -e > > > > > > 0x00908000 -d spl/u-boot-spl.bin SPL >SPL.log && cat SPL.log > > > > > > Image Type: Freescale IMX Boot Image > > > > > > Image Ver: 2 (i.MX53/6/7 compatible) > > > > > > Mode: DCD > > > > > > Data Size: 73824 Bytes = 72.09 KiB = 0.07 MiB > > > > > > Load Address: 00907420 > > > > > > Entry Point: 00908000 > > > > > > HAB Blocks: 0x00907400 0x00000000 0x0000fc00 > > > > > > DCD Blocks: 0x00910000 0x0000002c 0x00000004 > > > > > > make -f ./scripts/Makefile.build obj=arch/arm/mach-imx > > > > > > u-boot-with-spl.imx mkdir -p spl/ > > > > > > ./tools/mkimage -n spl/u-boot-spl.cfgout -T imximage -e > > > > > > 0x00908000 -d spl/u-boot-spl.bin SPL >SPL.log && cat SPL.log > > > > > > Image Type: Freescale IMX Boot Image > > > > > > Image Ver: 2 (i.MX53/6/7 compatible) > > > > > > Mode: DCD > > > > > > Data Size: 73824 Bytes = 72.09 KiB = 0.07 MiB > > > > > > Load Address: 00907420 > > > > > > Entry Point: 00908000 > > > > > > HAB Blocks: 0x00907400 0x00000000 0x0000fc00 > > > > > > DCD Blocks: 0x00910000 0x0000002c 0x00000004 > > > > > > arm-linux-gnueabihf-objcopy -j .text -j .secure_text -j > > > > > > .secure_data -j .rodata -j .hash -j .data -j .got -j .got.plt -j > > > > > > .u_boot_list -j .rel.dyn -j .binman_sym_table -j .text_rest -j > > > > > > .dtb.init.rodata -j .efi_runtime -j .efi_runtime_rel -I binary > > > > > > -O binary --pad-to=0x11000 SPL u-boot-with-spl.imx && cat > > > > > > u-boot.img >> u-boot-with-spl.imx || rm -f u-boot-with-spl.imx > > > > > > > > > > > > > > > > > > What I'm trying to say is that I have followed the correct steps > > > > > > and this is the LTO change > > > > > > > > > > > > git diff > > > > > > diff --git a/configs/imx6dl_mamoj_defconfig > > > > > > b/configs/imx6dl_mamoj_defconfig index ae27857e6f..4a535012b2 > > > > > > 100644 > > > > > > --- a/configs/imx6dl_mamoj_defconfig > > > > > > +++ b/configs/imx6dl_mamoj_defconfig > > > > > > @@ -14,6 +14,7 @@ CONFIG_SPL_TEXT_BASE=0x00908000 > > > > > > CONFIG_SPL_DRIVERS_MISC=y CONFIG_IMX_HAB=y # > > CONFIG_CMD_BMODE > > > > > > is not set > > > > > > +CONFIG_LTO=y > > > > > > CONFIG_DISTRO_DEFAULTS=y > > > > > > CONFIG_BOOTDELAY=3 > > > > > > CONFIG_SPL_OS_BOOT=y > > > > > > > > > > Here's what I see: > > > > > $ git describe HEAD > > > > > v2022.04-rc4-50-g9776c4e9d00a > > > > > $ make imx6dl_mamoj_defconfig > > > > > HOSTCC scripts/basic/fixdep > > > > > HOSTCC scripts/kconfig/conf.o > > > > > YACC scripts/kconfig/zconf.tab.c > > > > > LEX scripts/kconfig/zconf.lex.c > > > > > HOSTCC scripts/kconfig/zconf.tab.o > > > > > HOSTLD scripts/kconfig/conf > > > > > # > > > > > # configuration written to .config # $ sed -i -e 's/# CONFIG_LTO > > > > > is not set/CONFIG_LTO=y/' .config $ grep LTO .config > > > > > CONFIG_ARCH_SUPPORTS_LTO=y CONFIG_LTO=y $ make > > > > > CROSS_COMPILE=~/.buildman-toolchains/gcc-11.1.0-nolibc/arm-linux-g > > > > > nueabi/bin/arm-linux-gnueabi- -sj12 ===================== WARNING > > > > > ====================== This board does not use CONFIG_DM_SERIAL > > > > > (Driver Model for Serial drivers). Please update the board to use > > > > > CONFIG_DM_SERIAL before the v2023.04 release. Failure to update by > > > > > the deadline may result in board removal. > > > > > See doc/driver-model/migration.rst for more info. > > > > > ==================================================== > > > > > arch/arm/dts/imx6dl-dhcom-pdk2.dtb: Warning (pwms_property): > > > > > /display-bl:pwms: cell 3 is not a phandle reference > > > > > arch/arm/dts/imx6dl-dhcom-pdk2.dtb: Warning (pwms_property): > > > > > /display-bl: Missing property '#pwm-cells' in node > > > > > /soc/bus@2000000/gpc@20dc000 or bad phandle (referred from > > > > > pwms[3]) > > > > > arch/arm/dts/imx6q-dhcom-pdk2.dtb: Warning (pwms_property): > > > > > /display-bl:pwms: cell 3 is not a phandle reference > > > > > arch/arm/dts/imx6q-dhcom-pdk2.dtb: Warning (pwms_property): > > > > > /display-bl: Missing property '#pwm-cells' in node > > > > > /soc/bus@2000000/gpc@20dc000 or bad phandle (referred from > > > > > pwms[3]) $ ls -lh spl/u-boot-spl* -rwxrwxr-x 1 trini trini 944K > > > > > Mar 19 13:40 spl/u-boot-spl > > > > > -rw-rw-r-- 1 trini trini 54K Mar 19 13:40 spl/u-boot-spl.bin > > > > > -rw-rw-r-- 1 trini trini 1.6K Mar 19 13:40 spl/u-boot-spl.cfgout > > > > > -rw-rw-r-- 1 trini trini 2.2K Mar 19 13:40 spl/u-boot-spl.dtb > > > > > -rw-rw-r-- 1 trini trini 54K Mar 19 13:40 spl/u-boot-spl-dtb.bin > > > > > -rw-rw-r-- 1 trini trini 728 Mar 19 13:40 spl/u-boot-spl.lds > > > > > -rw-rw-r-- 1 trini trini 5.9K Mar 19 13:40 > > > > > spl/u-boot-spl.ltrans0.ltrans.su > > > > > -rw-rw-r-- 1 trini trini 7.2K Mar 19 13:40 > > > > > spl/u-boot-spl.ltrans1.ltrans.su > > > > > -rw-rw-r-- 1 trini trini 182K Mar 19 13:40 spl/u-boot-spl.map > > > > > -rwxrwxr-x 1 trini trini 51K Mar 19 13:40 > > > > > spl/u-boot-spl-nodtb.bin > > > > > -rw-rw-r-- 1 trini trini 135K Mar 19 13:40 spl/u-boot-spl.sym > > > > > > > > > > > > > The only difference is the toolchain gcc version 9.4.0 (Ubuntu > > > > 9.4.0-1ubuntu1~20.04) and for the result you get I'm agree with you. > > > > > > Yeah, that's too old of a toolchain for LTO to be usable. A patch to > > > catch and error out in that case would be good :) > > > > Let's do it this way. I will test with the newer gcc version and decrease the size > > and send a patch. > > This can be done on Monday, because I don't have access to it. > > Waiting for your patch to decrease the spl size as my patch series is dependent on your fix. > I will not let wait more. We had already gain using LTO enable and remove DM_GPIO (around 8k) Michael > Gaurav > > > > Michael > > > > > > -- > > > Tom > > > > > > > > -- > > Michael Nazzareno Trimarchi > > Co-Founder & Chief Executive Officer > > M. +39 347 913 2170 > > michael@amarulasolutions.com > > __________________________________ > > > > Amarula Solutions BV > > Joop Geesinkweg 125, 1114 AB, Amsterdam, NL T. +31 (0)85 111 9172 > > info@amarulasolutions.com > > https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fwww.ama > > rulasolutions.com%2F&data=04%7C01%7Cgaurav.jain%40nxp.com%7Cf2e > > 5639efe9e491287e008da09d260f9%7C686ea1d3bc2b4c6fa92cd99c5c301635% > > 7C0%7C0%7C637833096989631395%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiM > > C4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000&a > > mp;sdata=pBaV4f5%2BrMJh7CsyEwpU0xOCQVQjWMkIyZ5%2BoPeey4k%3D&a > > mp;reserved=0
diff --git a/drivers/crypto/fsl/jr.c b/drivers/crypto/fsl/jr.c index 22b649219e..8103987425 100644 --- a/drivers/crypto/fsl/jr.c +++ b/drivers/crypto/fsl/jr.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* * Copyright 2008-2014 Freescale Semiconductor, Inc. - * Copyright 2018 NXP + * Copyright 2018, 2021 NXP * * Based on CAAM driver in drivers/crypto/caam in Linux */ @@ -11,7 +11,6 @@ #include <linux/kernel.h> #include <log.h> #include <malloc.h> -#include "fsl_sec.h" #include "jr.h" #include "jobdesc.h" #include "desc_constr.h" @@ -21,7 +20,10 @@ #include <asm/cache.h> #include <asm/fsl_pamu.h> #endif +#include <dm.h> #include <dm/lists.h> +#include <dm/root.h> +#include <dm/device-internal.h> #include <linux/delay.h> #define CIRC_CNT(head, tail, size) (((head) - (tail)) & (size - 1)) @@ -35,20 +37,29 @@ uint32_t sec_offset[CONFIG_SYS_FSL_MAX_NUM_OF_SEC] = { #endif }; +#if CONFIG_IS_ENABLED(DM) +struct udevice *caam_dev; +#else #define SEC_ADDR(idx) \ (ulong)((CONFIG_SYS_FSL_SEC_ADDR + sec_offset[idx])) #define SEC_JR0_ADDR(idx) \ (ulong)(SEC_ADDR(idx) + \ (CONFIG_SYS_FSL_JR0_OFFSET - CONFIG_SYS_FSL_SEC_OFFSET)) +struct caam_regs caam_st; +#endif -struct jobring jr0[CONFIG_SYS_FSL_MAX_NUM_OF_SEC]; +static inline u32 jr_start_reg(u8 jrid) +{ + return (1 << jrid); +} -static inline void start_jr0(uint8_t sec_idx) +static inline void start_jr(struct caam_regs *caam) { - ccsr_sec_t *sec = (void *)SEC_ADDR(sec_idx); + ccsr_sec_t *sec = caam->sec; u32 ctpr_ms = sec_in32(&sec->ctpr_ms); u32 scfgr = sec_in32(&sec->scfgr); + u32 jrstart = jr_start_reg(caam->jrid); if (ctpr_ms & SEC_CTPR_MS_VIRT_EN_INCL) { /* VIRT_EN_INCL = 1 & VIRT_EN_POR = 1 or @@ -56,23 +67,16 @@ static inline void start_jr0(uint8_t sec_idx) */ if ((ctpr_ms & SEC_CTPR_MS_VIRT_EN_POR) || (scfgr & SEC_SCFGR_VIRT_EN)) - sec_out32(&sec->jrstartr, CONFIG_JRSTARTR_JR0); + sec_out32(&sec->jrstartr, jrstart); } else { /* VIRT_EN_INCL = 0 && VIRT_EN_POR_VALUE = 1 */ if (ctpr_ms & SEC_CTPR_MS_VIRT_EN_POR) - sec_out32(&sec->jrstartr, CONFIG_JRSTARTR_JR0); + sec_out32(&sec->jrstartr, jrstart); } } -static inline void jr_reset_liodn(uint8_t sec_idx) +static inline void jr_disable_irq(struct jr_regs *regs) { - ccsr_sec_t *sec = (void *)SEC_ADDR(sec_idx); - sec_out32(&sec->jrliodnr[0].ls, 0); -} - -static inline void jr_disable_irq(uint8_t sec_idx) -{ - struct jr_regs *regs = (struct jr_regs *)SEC_JR0_ADDR(sec_idx); uint32_t jrcfg = sec_in32(®s->jrcfg1); jrcfg = jrcfg | JR_INTMASK; @@ -80,10 +84,10 @@ static inline void jr_disable_irq(uint8_t sec_idx) sec_out32(®s->jrcfg1, jrcfg); } -static void jr_initregs(uint8_t sec_idx) +static void jr_initregs(uint8_t sec_idx, struct caam_regs *caam) { - struct jr_regs *regs = (struct jr_regs *)SEC_JR0_ADDR(sec_idx); - struct jobring *jr = &jr0[sec_idx]; + struct jr_regs *regs = caam->regs; + struct jobring *jr = &caam->jr[sec_idx]; caam_dma_addr_t ip_base = virt_to_phys((void *)jr->input_ring); caam_dma_addr_t op_base = virt_to_phys((void *)jr->output_ring); @@ -103,16 +107,16 @@ static void jr_initregs(uint8_t sec_idx) sec_out32(®s->irs, JR_SIZE); if (!jr->irq) - jr_disable_irq(sec_idx); + jr_disable_irq(regs); } -static int jr_init(uint8_t sec_idx) +static int jr_init(uint8_t sec_idx, struct caam_regs *caam) { - struct jobring *jr = &jr0[sec_idx]; + struct jobring *jr = &caam->jr[sec_idx]; memset(jr, 0, sizeof(struct jobring)); - jr->jq_id = DEFAULT_JR_ID; + jr->jq_id = caam->jrid; jr->irq = DEFAULT_IRQ; #ifdef CONFIG_FSL_CORENET @@ -134,53 +138,8 @@ static int jr_init(uint8_t sec_idx) memset(jr->input_ring, 0, JR_SIZE * sizeof(caam_dma_addr_t)); memset(jr->output_ring, 0, jr->op_size); - start_jr0(sec_idx); - - jr_initregs(sec_idx); - - return 0; -} - -static int jr_sw_cleanup(uint8_t sec_idx) -{ - struct jobring *jr = &jr0[sec_idx]; - - jr->head = 0; - jr->tail = 0; - jr->read_idx = 0; - jr->write_idx = 0; - memset(jr->info, 0, sizeof(jr->info)); - memset(jr->input_ring, 0, jr->size * sizeof(caam_dma_addr_t)); - memset(jr->output_ring, 0, jr->size * sizeof(struct op_ring)); - - return 0; -} - -static int jr_hw_reset(uint8_t sec_idx) -{ - struct jr_regs *regs = (struct jr_regs *)SEC_JR0_ADDR(sec_idx); - uint32_t timeout = 100000; - uint32_t jrint, jrcr; - - sec_out32(®s->jrcr, JRCR_RESET); - do { - jrint = sec_in32(®s->jrint); - } while (((jrint & JRINT_ERR_HALT_MASK) == - JRINT_ERR_HALT_INPROGRESS) && --timeout); - - jrint = sec_in32(®s->jrint); - if (((jrint & JRINT_ERR_HALT_MASK) != - JRINT_ERR_HALT_INPROGRESS) && timeout == 0) - return -1; - - timeout = 100000; - sec_out32(®s->jrcr, JRCR_RESET); - do { - jrcr = sec_in32(®s->jrcr); - } while ((jrcr & JRCR_RESET) && --timeout); - - if (timeout == 0) - return -1; + start_jr(caam); + jr_initregs(sec_idx, caam); return 0; } @@ -188,10 +147,10 @@ static int jr_hw_reset(uint8_t sec_idx) /* -1 --- error, can't enqueue -- no space available */ static int jr_enqueue(uint32_t *desc_addr, void (*callback)(uint32_t status, void *arg), - void *arg, uint8_t sec_idx) + void *arg, uint8_t sec_idx, struct caam_regs *caam) { - struct jr_regs *regs = (struct jr_regs *)SEC_JR0_ADDR(sec_idx); - struct jobring *jr = &jr0[sec_idx]; + struct jr_regs *regs = caam->regs; + struct jobring *jr = &caam->jr[sec_idx]; int head = jr->head; uint32_t desc_word; int length = desc_len(desc_addr); @@ -263,10 +222,10 @@ static int jr_enqueue(uint32_t *desc_addr, return 0; } -static int jr_dequeue(int sec_idx) +static int jr_dequeue(int sec_idx, struct caam_regs *caam) { - struct jr_regs *regs = (struct jr_regs *)SEC_JR0_ADDR(sec_idx); - struct jobring *jr = &jr0[sec_idx]; + struct jr_regs *regs = caam->regs; + struct jobring *jr = &caam->jr[sec_idx]; int head = jr->head; int tail = jr->tail; int idx, i, found; @@ -349,14 +308,18 @@ static void desc_done(uint32_t status, void *arg) { struct result *x = arg; x->status = status; -#ifndef CONFIG_SPL_BUILD caam_jr_strstatus(status); -#endif x->done = 1; } static inline int run_descriptor_jr_idx(uint32_t *desc, uint8_t sec_idx) { + struct caam_regs *caam; +#if CONFIG_IS_ENABLED(DM) + caam = dev_get_priv(caam_dev); +#else + caam = &caam_st; +#endif unsigned long long timeval = 0; unsigned long long timeout = CONFIG_USEC_DEQ_TIMEOUT; struct result op; @@ -364,7 +327,7 @@ static inline int run_descriptor_jr_idx(uint32_t *desc, uint8_t sec_idx) memset(&op, 0, sizeof(op)); - ret = jr_enqueue(desc, desc_done, &op, sec_idx); + ret = jr_enqueue(desc, desc_done, &op, sec_idx, caam); if (ret) { debug("Error in SEC enq\n"); ret = JQ_ENQ_ERR; @@ -375,7 +338,7 @@ static inline int run_descriptor_jr_idx(uint32_t *desc, uint8_t sec_idx) udelay(1); timeval += 1; - ret = jr_dequeue(sec_idx); + ret = jr_dequeue(sec_idx, caam); if (ret) { debug("Error in SEC deq\n"); ret = JQ_DEQ_ERR; @@ -402,13 +365,62 @@ int run_descriptor_jr(uint32_t *desc) return run_descriptor_jr_idx(desc, 0); } +static int jr_sw_cleanup(uint8_t sec_idx, struct caam_regs *caam) +{ + struct jobring *jr = &caam->jr[sec_idx]; + + jr->head = 0; + jr->tail = 0; + jr->read_idx = 0; + jr->write_idx = 0; + memset(jr->info, 0, sizeof(jr->info)); + memset(jr->input_ring, 0, jr->size * sizeof(caam_dma_addr_t)); + memset(jr->output_ring, 0, jr->size * sizeof(struct op_ring)); + + return 0; +} + +static int jr_hw_reset(struct jr_regs *regs) +{ + uint32_t timeout = 100000; + uint32_t jrint, jrcr; + + sec_out32(®s->jrcr, JRCR_RESET); + do { + jrint = sec_in32(®s->jrint); + } while (((jrint & JRINT_ERR_HALT_MASK) == + JRINT_ERR_HALT_INPROGRESS) && --timeout); + + jrint = sec_in32(®s->jrint); + if (((jrint & JRINT_ERR_HALT_MASK) != + JRINT_ERR_HALT_INPROGRESS) && timeout == 0) + return -1; + + timeout = 100000; + sec_out32(®s->jrcr, JRCR_RESET); + do { + jrcr = sec_in32(®s->jrcr); + } while ((jrcr & JRCR_RESET) && --timeout); + + if (timeout == 0) + return -1; + + return 0; +} + static inline int jr_reset_sec(uint8_t sec_idx) { - if (jr_hw_reset(sec_idx) < 0) + struct caam_regs *caam; +#if CONFIG_IS_ENABLED(DM) + caam = dev_get_priv(caam_dev); +#else + caam = &caam_st; +#endif + if (jr_hw_reset(caam->regs) < 0) return -1; /* Clean up the jobring structure maintained by software */ - jr_sw_cleanup(sec_idx); + jr_sw_cleanup(sec_idx, caam); return 0; } @@ -418,9 +430,15 @@ int jr_reset(void) return jr_reset_sec(0); } -static inline int sec_reset_idx(uint8_t sec_idx) +int sec_reset(void) { - ccsr_sec_t *sec = (void *)SEC_ADDR(sec_idx); + struct caam_regs *caam; +#if CONFIG_IS_ENABLED(DM) + caam = dev_get_priv(caam_dev); +#else + caam = &caam_st; +#endif + ccsr_sec_t *sec = caam->sec; uint32_t mcfgr = sec_in32(&sec->mcfgr); uint32_t timeout = 100000; @@ -446,11 +464,7 @@ static inline int sec_reset_idx(uint8_t sec_idx) return 0; } -int sec_reset(void) -{ - return sec_reset_idx(0); -} -#ifndef CONFIG_SPL_BUILD + static int deinstantiate_rng(u8 sec_idx, int state_handle_mask) { u32 *desc; @@ -496,12 +510,11 @@ static int deinstantiate_rng(u8 sec_idx, int state_handle_mask) return ret; } -static int instantiate_rng(u8 sec_idx, int gen_sk) +static int instantiate_rng(uint8_t sec_idx, ccsr_sec_t *sec, int gen_sk) { u32 *desc; u32 rdsta_val; int ret = 0, sh_idx, size; - ccsr_sec_t __iomem *sec = (ccsr_sec_t __iomem *)SEC_ADDR(sec_idx); struct rng4tst __iomem *rng = (struct rng4tst __iomem *)&sec->rng; @@ -554,9 +567,8 @@ static int instantiate_rng(u8 sec_idx, int gen_sk) return ret; } -static u8 get_rng_vid(uint8_t sec_idx) +static u8 get_rng_vid(ccsr_sec_t *sec) { - ccsr_sec_t *sec = (void *)SEC_ADDR(sec_idx); u8 vid; if (caam_get_era() < 10) { @@ -574,9 +586,8 @@ static u8 get_rng_vid(uint8_t sec_idx) * By default, the TRNG runs for 200 clocks per sample; * 1200 clocks per sample generates better entropy. */ -static void kick_trng(int ent_delay, uint8_t sec_idx) +static void kick_trng(int ent_delay, ccsr_sec_t *sec) { - ccsr_sec_t __iomem *sec = (ccsr_sec_t __iomem *)SEC_ADDR(sec_idx); struct rng4tst __iomem *rng = (struct rng4tst __iomem *)&sec->rng; u32 val; @@ -603,10 +614,9 @@ static void kick_trng(int ent_delay, uint8_t sec_idx) sec_clrbits32(&rng->rtmctl, RTMCTL_PRGM); } -static int rng_init(uint8_t sec_idx) +static int rng_init(uint8_t sec_idx, ccsr_sec_t *sec) { int ret, gen_sk, ent_delay = RTSDCTL_ENT_DLY_MIN; - ccsr_sec_t __iomem *sec = (ccsr_sec_t __iomem *)SEC_ADDR(sec_idx); struct rng4tst __iomem *rng = (struct rng4tst __iomem *)&sec->rng; u32 inst_handles; @@ -624,7 +634,7 @@ static int rng_init(uint8_t sec_idx) * the TRNG parameters. */ if (!inst_handles) { - kick_trng(ent_delay, sec_idx); + kick_trng(ent_delay, sec); ent_delay += 400; } /* @@ -634,7 +644,7 @@ static int rng_init(uint8_t sec_idx) * interval, leading to a sucessful initialization of * the RNG. */ - ret = instantiate_rng(sec_idx, gen_sk); + ret = instantiate_rng(sec_idx, sec, gen_sk); } while ((ret == -1) && (ent_delay < RTSDCTL_ENT_DLY_MAX)); if (ret) { printf("SEC%u: Failed to instantiate RNG\n", sec_idx); @@ -646,13 +656,28 @@ static int rng_init(uint8_t sec_idx) return ret; } -#endif + int sec_init_idx(uint8_t sec_idx) { - ccsr_sec_t *sec = (void *)SEC_ADDR(sec_idx); - uint32_t mcr = sec_in32(&sec->mcfgr); int ret = 0; - + struct caam_regs *caam; +#if CONFIG_IS_ENABLED(DM) + if (!caam_dev) { + printf("caam_jr: caam not found\n"); + return -1; + } + caam = dev_get_priv(caam_dev); +#else + caam_st.sec = (void *)SEC_ADDR(sec_idx); + caam_st.regs = (struct jr_regs *)SEC_JR0_ADDR(sec_idx); + caam_st.jrid = 0; + caam = &caam_st; +#endif + ccsr_sec_t *sec = caam->sec; + uint32_t mcr = sec_in32(&sec->mcfgr); +#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_IMX8M) + uint32_t jrdid_ms = 0; +#endif #ifdef CONFIG_FSL_CORENET uint32_t liodnr; uint32_t liodn_ns; @@ -682,6 +707,11 @@ int sec_init_idx(uint8_t sec_idx) mcr |= (1 << MCFGR_PS_SHIFT); #endif sec_out32(&sec->mcfgr, mcr); +#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_IMX8M) + jrdid_ms = JRDID_MS_TZ_OWN | JRDID_MS_PRIM_TZ | JRDID_MS_PRIM_DID; + sec_out32(&sec->jrliodnr[caam->jrid].ms, jrdid_ms); +#endif + jr_reset(); #ifdef CONFIG_FSL_CORENET #ifdef CONFIG_SPL_BUILD @@ -693,20 +723,19 @@ int sec_init_idx(uint8_t sec_idx) liodn_ns = CONFIG_SPL_JR0_LIODN_NS & JRNSLIODN_MASK; liodn_s = CONFIG_SPL_JR0_LIODN_S & JRSLIODN_MASK; - liodnr = sec_in32(&sec->jrliodnr[0].ls) & + liodnr = sec_in32(&sec->jrliodnr[caam->jrid].ls) & ~(JRNSLIODN_MASK | JRSLIODN_MASK); liodnr = liodnr | (liodn_ns << JRNSLIODN_SHIFT) | (liodn_s << JRSLIODN_SHIFT); - sec_out32(&sec->jrliodnr[0].ls, liodnr); + sec_out32(&sec->jrliodnr[caam->jrid].ls, liodnr); #else - liodnr = sec_in32(&sec->jrliodnr[0].ls); + liodnr = sec_in32(&sec->jrliodnr[caam->jrid].ls); liodn_ns = (liodnr & JRNSLIODN_MASK) >> JRNSLIODN_SHIFT; liodn_s = (liodnr & JRSLIODN_MASK) >> JRSLIODN_SHIFT; #endif #endif - - ret = jr_init(sec_idx); + ret = jr_init(sec_idx, caam); if (ret < 0) { printf("SEC%u: initialization failed\n", sec_idx); return -1; @@ -719,9 +748,9 @@ int sec_init_idx(uint8_t sec_idx) pamu_enable(); #endif -#ifndef CONFIG_SPL_BUILD - if (get_rng_vid(sec_idx) >= 4) { - if (rng_init(sec_idx) < 0) { + + if (get_rng_vid(caam->sec) >= 4) { + if (rng_init(sec_idx, caam->sec) < 0) { printf("SEC%u: RNG instantiation failed\n", sec_idx); return -1; } @@ -735,7 +764,6 @@ int sec_init_idx(uint8_t sec_idx) printf("SEC%u: RNG instantiated\n", sec_idx); } -#endif return ret; } @@ -743,3 +771,76 @@ int sec_init(void) { return sec_init_idx(0); } + +#if CONFIG_IS_ENABLED(DM) +static int caam_jr_ioctl(struct udevice *dev, unsigned long request, void *buf) +{ + if (request != CAAM_JR_RUN_DESC) + return -ENOSYS; + + return run_descriptor_jr(buf); +} + +static int caam_jr_probe(struct udevice *dev) +{ + struct caam_regs *caam = dev_get_priv(dev); + fdt_addr_t addr; + ofnode node; + unsigned int jr_node = 0; + + caam_dev = dev; + + addr = dev_read_addr(dev); + if (addr == FDT_ADDR_T_NONE) { + printf("caam_jr: crypto not found\n"); + return -EINVAL; + } + caam->sec = (ccsr_sec_t *)(uintptr_t)addr; + caam->regs = (struct jr_regs *)caam->sec; + + /* Check for enabled job ring node */ + ofnode_for_each_subnode(node, dev_ofnode(dev)) { + if (!ofnode_is_available(node)) + continue; + + jr_node = ofnode_read_u32_default(node, "reg", -1); + if (jr_node > 0) { + caam->regs = (struct jr_regs *)((ulong)caam->sec + jr_node); + while (!(jr_node & 0x0F)) + jr_node = jr_node >> 4; + + caam->jrid = jr_node - 1; + break; + } + } + + if (sec_init()) + printf("\nsec_init failed!\n"); + + return 0; +} + +static int caam_jr_bind(struct udevice *dev) +{ + return 0; +} + +static const struct misc_ops caam_jr_ops = { + .ioctl = caam_jr_ioctl, +}; + +static const struct udevice_id caam_jr_match[] = { + { .compatible = "fsl,sec-v4.0" }, + { } +}; + +U_BOOT_DRIVER(caam_jr) = { + .name = "caam_jr", + .id = UCLASS_MISC, + .of_match = caam_jr_match, + .ops = &caam_jr_ops, + .bind = caam_jr_bind, + .probe = caam_jr_probe, + .priv_auto = sizeof(struct caam_regs), +}; +#endif diff --git a/drivers/crypto/fsl/jr.h b/drivers/crypto/fsl/jr.h index 1047aa772c..3eb7be79da 100644 --- a/drivers/crypto/fsl/jr.h +++ b/drivers/crypto/fsl/jr.h @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright 2008-2014 Freescale Semiconductor, Inc. + * Copyright 2021 NXP * */ @@ -8,7 +9,9 @@ #define __JR_H #include <linux/compiler.h> +#include "fsl_sec.h" #include "type.h" +#include <misc.h> #define JR_SIZE 4 /* Timeout currently defined as 10 sec */ @@ -35,12 +38,21 @@ #define JRSLIODN_SHIFT 0 #define JRSLIODN_MASK 0x00000fff -#define JQ_DEQ_ERR -1 -#define JQ_DEQ_TO_ERR -2 -#define JQ_ENQ_ERR -3 +#define JRDID_MS_PRIM_DID BIT(0) +#define JRDID_MS_PRIM_TZ BIT(4) +#define JRDID_MS_TZ_OWN BIT(15) + +#define JQ_DEQ_ERR (-1) +#define JQ_DEQ_TO_ERR (-2) +#define JQ_ENQ_ERR (-3) #define RNG4_MAX_HANDLES 2 +enum { + /* Run caam jobring descriptor(in buf) */ + CAAM_JR_RUN_DESC, +}; + struct op_ring { caam_dma_addr_t desc; uint32_t status; @@ -102,6 +114,19 @@ struct result { uint32_t status; }; +/* + * struct caam_regs - CAAM initialization register interface + * + * Interface to caam memory map, jobring register, jobring storage. + */ +struct caam_regs { + ccsr_sec_t *sec; /*caam initialization registers*/ + struct jr_regs *regs; /*jobring configuration registers*/ + u8 jrid; /*id to identify a jobring*/ + /*Private sub-storage for a single JobR*/ + struct jobring jr[CONFIG_SYS_FSL_MAX_NUM_OF_SEC]; +}; + void caam_jr_strstatus(u32 status); int run_descriptor_jr(uint32_t *desc);