| Message ID | 20220223133153.730337-2-hdegoede@redhat.com |
|---|---|
| State | New |
| Headers | show |
| Series | pinctrl/baytrail platform/x86: SUS6 mux / Lenovo Yoga Tablet 2 support | expand |
On Wed, Feb 23, 2022 at 02:31:49PM +0100, Hans de Goede wrote: > On the Lenovo Yoga Tablet 2 830 / 1050 / 1051 models the 32KHz PMU clk, > which can be muxed externally to SUS pin 5 and/or 6 is used as a clock > for the audio codec. > > On the 830 and 1050 models, with ship with Android as factory OS the > pin-muxing for this is not setup by the BIOS. > > Add a pinconf group + function for the pmu_clk on SUS pin 5 and 6 to > allow setting the pinmux up from within the x86-android-tablets > platform code. With nit-pick addressed, Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> > Signed-off-by: Hans de Goede <hdegoede@redhat.com> > --- > drivers/pinctrl/intel/pinctrl-baytrail.c | 9 +++++++++ > 1 file changed, 9 insertions(+) > > diff --git a/drivers/pinctrl/intel/pinctrl-baytrail.c b/drivers/pinctrl/intel/pinctrl-baytrail.c > index 7ae71152b480..fec888c1cd05 100644 > --- a/drivers/pinctrl/intel/pinctrl-baytrail.c > +++ b/drivers/pinctrl/intel/pinctrl-baytrail.c > @@ -444,6 +444,9 @@ static const unsigned int byt_sus_pcu_spi_pins[] = { 21 }; > static const unsigned int byt_sus_pcu_spi_mode_values[] = { 0 }; > static const unsigned int byt_sus_pcu_spi_gpio_mode_values[] = { 1 }; > > +static const unsigned int byt_sus_pmu_clk1_pins[] = { 5 }; > +static const unsigned int byt_sus_pmu_clk2_pins[] = { 6 }; > + > static const struct intel_pingroup byt_sus_groups[] = { > PIN_GROUP("usb_oc_grp", byt_sus_usb_over_current_pins, byt_sus_usb_over_current_mode_values), > PIN_GROUP("usb_ulpi_grp", byt_sus_usb_ulpi_pins, byt_sus_usb_ulpi_mode_values), > @@ -451,20 +454,26 @@ static const struct intel_pingroup byt_sus_groups[] = { > PIN_GROUP("usb_oc_grp_gpio", byt_sus_usb_over_current_pins, byt_sus_usb_over_current_gpio_mode_values), > PIN_GROUP("usb_ulpi_grp_gpio", byt_sus_usb_ulpi_pins, byt_sus_usb_ulpi_gpio_mode_values), > PIN_GROUP("pcu_spi_grp_gpio", byt_sus_pcu_spi_pins, byt_sus_pcu_spi_gpio_mode_values), > + PIN_GROUP("pmu_clk1_grp", byt_sus_pmu_clk1_pins, 1), > + PIN_GROUP("pmu_clk2_grp", byt_sus_pmu_clk2_pins, 1), > }; > > static const char * const byt_sus_usb_groups[] = { > "usb_oc_grp", "usb_ulpi_grp", > }; > static const char * const byt_sus_spi_groups[] = { "pcu_spi_grp" }; > +static const char * const byt_sus_pmu_clk_groups[] = { > + "pmu_clk1_grp", "pmu_clk2_grp" }; }; on new line. > static const char * const byt_sus_gpio_groups[] = { > "usb_oc_grp_gpio", "usb_ulpi_grp_gpio", "pcu_spi_grp_gpio", > + "pmu_clk1_grp", "pmu_clk2_grp", > }; > > static const struct intel_function byt_sus_functions[] = { > FUNCTION("usb", byt_sus_usb_groups), > FUNCTION("spi", byt_sus_spi_groups), > FUNCTION("gpio", byt_sus_gpio_groups), > + FUNCTION("pmu_clk", byt_sus_pmu_clk_groups), > }; > > static const struct intel_community byt_sus_communities[] = { > -- > 2.35.1 >
On Wed, Feb 23, 2022 at 04:54:31PM +0200, Andy Shevchenko wrote: > On Wed, Feb 23, 2022 at 02:31:49PM +0100, Hans de Goede wrote: ... > > static const char * const byt_sus_usb_groups[] = { > > "usb_oc_grp", "usb_ulpi_grp", > > }; > > static const char * const byt_sus_spi_groups[] = { "pcu_spi_grp" }; > > +static const char * const byt_sus_pmu_clk_groups[] = { > > + "pmu_clk1_grp", "pmu_clk2_grp" }; > > }; on new line. And add a comma in that case. See how USB is written above.
diff --git a/drivers/pinctrl/intel/pinctrl-baytrail.c b/drivers/pinctrl/intel/pinctrl-baytrail.c index 7ae71152b480..fec888c1cd05 100644 --- a/drivers/pinctrl/intel/pinctrl-baytrail.c +++ b/drivers/pinctrl/intel/pinctrl-baytrail.c @@ -444,6 +444,9 @@ static const unsigned int byt_sus_pcu_spi_pins[] = { 21 }; static const unsigned int byt_sus_pcu_spi_mode_values[] = { 0 }; static const unsigned int byt_sus_pcu_spi_gpio_mode_values[] = { 1 }; +static const unsigned int byt_sus_pmu_clk1_pins[] = { 5 }; +static const unsigned int byt_sus_pmu_clk2_pins[] = { 6 }; + static const struct intel_pingroup byt_sus_groups[] = { PIN_GROUP("usb_oc_grp", byt_sus_usb_over_current_pins, byt_sus_usb_over_current_mode_values), PIN_GROUP("usb_ulpi_grp", byt_sus_usb_ulpi_pins, byt_sus_usb_ulpi_mode_values), @@ -451,20 +454,26 @@ static const struct intel_pingroup byt_sus_groups[] = { PIN_GROUP("usb_oc_grp_gpio", byt_sus_usb_over_current_pins, byt_sus_usb_over_current_gpio_mode_values), PIN_GROUP("usb_ulpi_grp_gpio", byt_sus_usb_ulpi_pins, byt_sus_usb_ulpi_gpio_mode_values), PIN_GROUP("pcu_spi_grp_gpio", byt_sus_pcu_spi_pins, byt_sus_pcu_spi_gpio_mode_values), + PIN_GROUP("pmu_clk1_grp", byt_sus_pmu_clk1_pins, 1), + PIN_GROUP("pmu_clk2_grp", byt_sus_pmu_clk2_pins, 1), }; static const char * const byt_sus_usb_groups[] = { "usb_oc_grp", "usb_ulpi_grp", }; static const char * const byt_sus_spi_groups[] = { "pcu_spi_grp" }; +static const char * const byt_sus_pmu_clk_groups[] = { + "pmu_clk1_grp", "pmu_clk2_grp" }; static const char * const byt_sus_gpio_groups[] = { "usb_oc_grp_gpio", "usb_ulpi_grp_gpio", "pcu_spi_grp_gpio", + "pmu_clk1_grp", "pmu_clk2_grp", }; static const struct intel_function byt_sus_functions[] = { FUNCTION("usb", byt_sus_usb_groups), FUNCTION("spi", byt_sus_spi_groups), FUNCTION("gpio", byt_sus_gpio_groups), + FUNCTION("pmu_clk", byt_sus_pmu_clk_groups), }; static const struct intel_community byt_sus_communities[] = {
On the Lenovo Yoga Tablet 2 830 / 1050 / 1051 models the 32KHz PMU clk, which can be muxed externally to SUS pin 5 and/or 6 is used as a clock for the audio codec. On the 830 and 1050 models, with ship with Android as factory OS the pin-muxing for this is not setup by the BIOS. Add a pinconf group + function for the pmu_clk on SUS pin 5 and 6 to allow setting the pinmux up from within the x86-android-tablets platform code. Signed-off-by: Hans de Goede <hdegoede@redhat.com> --- drivers/pinctrl/intel/pinctrl-baytrail.c | 9 +++++++++ 1 file changed, 9 insertions(+)