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[0/3] PCI: qcom: pipe_clk_src fixes for pcie-qcom driver

Message ID 20211218140223.500390-1-dmitry.baryshkov@linaro.org
Headers show
Series PCI: qcom: pipe_clk_src fixes for pcie-qcom driver | expand

Message

Dmitry Baryshkov Dec. 18, 2021, 2:02 p.m. UTC
After comparing upstream and downstream Qualcomm PCIe drivers, change
the way the driver works with the pipe_clk_src multiplexing.

The clock should be switched to using ref_clk (TCXO) as a parent before
turning the PCIE_x_GDSC power domain off and can be switched to using
PHY's pipe_clk after this power domain is turned on.

Downstream driver uses regulators for the GDSC, so current approach also
(incorrectly) uses them. However upstream driver uses power-domain and
so GDSC is maintained using pm_runtime_foo() calls. Change order of
operations to implement these requirements.

----------------------------------------------------------------
Dmitry Baryshkov (3):
      PCI: qcom: Balance pm_runtime_foo() calls
      PCI: qcom: Fix pipe_clk_src reparenting
      PCI: qcom: Remove unnecessary pipe_clk handling

 drivers/pci/controller/dwc/pcie-qcom.c | 122 +++++++--------------------------
 1 file changed, 25 insertions(+), 97 deletions(-)

Comments

Vinod Koul Feb. 2, 2022, 4:37 a.m. UTC | #1
On 18-12-21, 17:02, Dmitry Baryshkov wrote:
> After comparing upstream and downstream Qualcomm PCIe drivers, change
> the way the driver works with the pipe_clk_src multiplexing.
> 
> The clock should be switched to using ref_clk (TCXO) as a parent before
> turning the PCIE_x_GDSC power domain off and can be switched to using
> PHY's pipe_clk after this power domain is turned on.
> 
> Downstream driver uses regulators for the GDSC, so current approach also
> (incorrectly) uses them. However upstream driver uses power-domain and
> so GDSC is maintained using pm_runtime_foo() calls. Change order of
> operations to implement these requirements.

Reviewed-by: Vinod Koul <vkoul@kernel.org>

> 
> ----------------------------------------------------------------
> Dmitry Baryshkov (3):
>       PCI: qcom: Balance pm_runtime_foo() calls
>       PCI: qcom: Fix pipe_clk_src reparenting
>       PCI: qcom: Remove unnecessary pipe_clk handling
> 
>  drivers/pci/controller/dwc/pcie-qcom.c | 122 +++++++--------------------------
>  1 file changed, 25 insertions(+), 97 deletions(-)
Stephen Boyd Feb. 3, 2022, 9:11 p.m. UTC | #2
Quoting Dmitry Baryshkov (2021-12-18 06:02:20)
> After comparing upstream and downstream Qualcomm PCIe drivers, change
> the way the driver works with the pipe_clk_src multiplexing.
>
> The clock should be switched to using ref_clk (TCXO) as a parent before
> turning the PCIE_x_GDSC power domain off and can be switched to using
> PHY's pipe_clk after this power domain is turned on.
>
> Downstream driver uses regulators for the GDSC, so current approach also
> (incorrectly) uses them. However upstream driver uses power-domain and
> so GDSC is maintained using pm_runtime_foo() calls. Change order of
> operations to implement these requirements.

Prasad, can you test/review this series?
Lorenzo Pieralisi Feb. 11, 2022, 5:57 p.m. UTC | #3
On Thu, Feb 03, 2022 at 09:11:44PM +0000, Stephen Boyd wrote:
> Quoting Dmitry Baryshkov (2021-12-18 06:02:20)
> > After comparing upstream and downstream Qualcomm PCIe drivers, change
> > the way the driver works with the pipe_clk_src multiplexing.
> >
> > The clock should be switched to using ref_clk (TCXO) as a parent before
> > turning the PCIE_x_GDSC power domain off and can be switched to using
> > PHY's pipe_clk after this power domain is turned on.
> >
> > Downstream driver uses regulators for the GDSC, so current approach also
> > (incorrectly) uses them. However upstream driver uses power-domain and
> > so GDSC is maintained using pm_runtime_foo() calls. Change order of
> > operations to implement these requirements.
> 
> Prasad, can you test/review this series?

Waiting for testing/review and Bjorn/Andy ACKs.

Lorenzo