mbox series

[GIT,PULL] KVM/riscv fixes for 5.17, take #1

Message ID CAAhSdy0C_RMVShk=vv7FRgmVRspBkVQfiCLx-4B6pYtLU10vZA@mail.gmail.com
State Accepted
Headers show
Series [GIT,PULL] KVM/riscv fixes for 5.17, take #1 | expand

Pull-request

https://github.com/kvm-riscv/linux.git tags/kvm-riscv-fixes-5.17-1

Message

Anup Patel Feb. 2, 2022, 2:55 p.m. UTC 
Hi Paolo,

This is the first set of fixes for 5.17. We have three fixes namely
guest entry rework, sbi implementation version fix and counter
access fix.

Please pull.

Regards,
Anup

The following changes since commit b2d2af7e5df37ee3a9ba6b405bdbb7691a5c2dfc:

  kvm/x86: rework guest entry logic (2022-02-01 08:51:54 -0500)

are available in the Git repository at:

  https://github.com/kvm-riscv/linux.git tags/kvm-riscv-fixes-5.17-1

for you to fetch changes up to 403271548a840dd4f884088d6333e09f899be5ff:

  RISC-V: KVM: Fix SBI implementation version (2022-02-02 18:58:06 +0530)

----------------------------------------------------------------
KVM/riscv fixes for 5.17, take #1

- Rework guest entry logic

- Make CY, TM, and IR counters accessible in VU mode

- Fix SBI implementation version

----------------------------------------------------------------
Anup Patel (1):
      RISC-V: KVM: Fix SBI implementation version

Mark Rutland (1):
      kvm/riscv: rework guest entry logic

Mayuresh Chitale (1):
      RISC-V: KVM: make CY, TM, and IR counters accessible in VU mode

 arch/riscv/kvm/vcpu.c          | 48 +++++++++++++++++++++++++++---------------
 arch/riscv/kvm/vcpu_sbi_base.c |  3 ++-
 2 files changed, 33 insertions(+), 18 deletions(-)

Comments

Paolo Bonzini Feb. 2, 2022, 2:58 p.m. UTC | #1 
On 2/2/22 15:55, Anup Patel wrote:
>    https://github.com/kvm-riscv/linux.git  tags/kvm-riscv-fixes-5.17-1

Pulled, thanks!

Paolo