diff mbox series

[net-next,1/3] macb: bindings doc: added generic PHY and reset mappings for ZynqMP

Message ID 20220112181113.875567-2-robert.hancock@calian.com
State Changes Requested, archived
Headers show
Series Cadence MACB/GEM support for ZynqMP SGMII | expand

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Commit Message

Robert Hancock Jan. 12, 2022, 6:11 p.m. UTC
Updated macb DT binding documentation to reflect the phy-names, phys,
resets, reset-names properties which are now used with ZynqMP GEM
devices, and added a ZynqMP-specific DT example.

Signed-off-by: Robert Hancock <robert.hancock@calian.com>
---
 .../devicetree/bindings/net/macb.txt          | 33 +++++++++++++++++++
 1 file changed, 33 insertions(+)

Comments

Michal Simek Jan. 13, 2022, 7:25 a.m. UTC | #1
On 1/12/22 19:11, Robert Hancock wrote:
> Updated macb DT binding documentation to reflect the phy-names, phys,
> resets, reset-names properties which are now used with ZynqMP GEM
> devices, and added a ZynqMP-specific DT example.
> 
> Signed-off-by: Robert Hancock <robert.hancock@calian.com>
> ---
>   .../devicetree/bindings/net/macb.txt          | 33 +++++++++++++++++++
>   1 file changed, 33 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/net/macb.txt b/Documentation/devicetree/bindings/net/macb.txt
> index a1b06fd1962e..e526952145b8 100644
> --- a/Documentation/devicetree/bindings/net/macb.txt
> +++ b/Documentation/devicetree/bindings/net/macb.txt
> @@ -29,6 +29,12 @@ Required properties:
>   	Optional elements: 'rx_clk' applies to cdns,zynqmp-gem
>   	Optional elements: 'tsu_clk'
>   - clocks: Phandles to input clocks.
> +- phy_names, phys: Required with ZynqMP SoC when in SGMII mode.
> +                   phy_names should be "sgmii-phy" and phys should
> +                   reference PS-GTR generic PHY device for this controller
> +                   instance. See ZynqMP example below.
> +- resets, reset-names: Recommended with ZynqMP, specify reset control for this
> +		       controller instance with zynqmp-reset driver.
>   
>   Optional properties:
>   - mdio: node containing PHY children. If this node is not present, then PHYs
> @@ -58,3 +64,30 @@ Examples:
>   			reset-gpios = <&pioE 6 1>;
>   		};
>   	};
> +
> +	gem1: ethernet@ff0c0000 {
> +		compatible = "cdns,zynqmp-gem", "cdns,gem";
> +		interrupt-parent = <&gic>;
> +		interrupts = <0 59 4>, <0 59 4>;
> +		reg = <0x0 0xff0c0000 0x0 0x1000>;
> +		clocks = <&zynqmp_clk LPD_LSBUS>, <&zynqmp_clk GEM1_REF>,
> +			 <&zynqmp_clk GEM1_TX>, <&zynqmp_clk GEM1_RX>,
> +			 <&zynqmp_clk GEM_TSU>;
> +		clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +		#stream-id-cells = <1>;
> +		iommus = <&smmu 0x875>;
> +		power-domains = <&zynqmp_firmware PD_ETH_1>;
> +		resets = <&zynqmp_reset ZYNQMP_RESET_GEM1>;
> +		reset-names = "gem1_rst";
> +		status = "okay";
> +		phy-mode = "sgmii";
> +		phy-names = "sgmii-phy";
> +		phys = <&psgtr 1 PHY_TYPE_SGMII 1 1>;
> +		fixed-link {
> +			speed = <1000>;
> +			full-duplex;
> +			pause;
> +		};
> +	};


Geert already converted this file to yaml that's why you should target this version.

Thanks,
Michal
Robert Hancock Jan. 13, 2022, 4:34 p.m. UTC | #2
On Thu, 2022-01-13 at 08:25 +0100, Michal Simek wrote:
> 
> On 1/12/22 19:11, Robert Hancock wrote:
> > Updated macb DT binding documentation to reflect the phy-names, phys,
> > resets, reset-names properties which are now used with ZynqMP GEM
> > devices, and added a ZynqMP-specific DT example.
> > 
> > Signed-off-by: Robert Hancock <robert.hancock@calian.com>
> > ---
> >   .../devicetree/bindings/net/macb.txt          | 33 +++++++++++++++++++
> >   1 file changed, 33 insertions(+)
> > 
> > diff --git a/Documentation/devicetree/bindings/net/macb.txt
> > b/Documentation/devicetree/bindings/net/macb.txt
> > index a1b06fd1962e..e526952145b8 100644
> > --- a/Documentation/devicetree/bindings/net/macb.txt
> > +++ b/Documentation/devicetree/bindings/net/macb.txt
> > @@ -29,6 +29,12 @@ Required properties:
> >   	Optional elements: 'rx_clk' applies to cdns,zynqmp-gem
> >   	Optional elements: 'tsu_clk'
> >   - clocks: Phandles to input clocks.
> > +- phy_names, phys: Required with ZynqMP SoC when in SGMII mode.
> > +                   phy_names should be "sgmii-phy" and phys should
> > +                   reference PS-GTR generic PHY device for this controller
> > +                   instance. See ZynqMP example below.
> > +- resets, reset-names: Recommended with ZynqMP, specify reset control for
> > this
> > +		       controller instance with zynqmp-reset driver.
> >   
> >   Optional properties:
> >   - mdio: node containing PHY children. If this node is not present, then
> > PHYs
> > @@ -58,3 +64,30 @@ Examples:
> >   			reset-gpios = <&pioE 6 1>;
> >   		};
> >   	};
> > +
> > +	gem1: ethernet@ff0c0000 {
> > +		compatible = "cdns,zynqmp-gem", "cdns,gem";
> > +		interrupt-parent = <&gic>;
> > +		interrupts = <0 59 4>, <0 59 4>;
> > +		reg = <0x0 0xff0c0000 0x0 0x1000>;
> > +		clocks = <&zynqmp_clk LPD_LSBUS>, <&zynqmp_clk GEM1_REF>,
> > +			 <&zynqmp_clk GEM1_TX>, <&zynqmp_clk GEM1_RX>,
> > +			 <&zynqmp_clk GEM_TSU>;
> > +		clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
> > +		#address-cells = <1>;
> > +		#size-cells = <0>;
> > +		#stream-id-cells = <1>;
> > +		iommus = <&smmu 0x875>;
> > +		power-domains = <&zynqmp_firmware PD_ETH_1>;
> > +		resets = <&zynqmp_reset ZYNQMP_RESET_GEM1>;
> > +		reset-names = "gem1_rst";
> > +		status = "okay";
> > +		phy-mode = "sgmii";
> > +		phy-names = "sgmii-phy";
> > +		phys = <&psgtr 1 PHY_TYPE_SGMII 1 1>;
> > +		fixed-link {
> > +			speed = <1000>;
> > +			full-duplex;
> > +			pause;
> > +		};
> > +	};
> 
> Geert already converted this file to yaml that's why you should target this
> version.

Is that version in a tree somewhere that can be patched against?

> 
> Thanks,
> Michal
Geert Uytterhoeven Jan. 13, 2022, 5:43 p.m. UTC | #3
Hi Robert,

On Thu, Jan 13, 2022 at 5:34 PM Robert Hancock
<robert.hancock@calian.com> wrote:
> On Thu, 2022-01-13 at 08:25 +0100, Michal Simek wrote:
> > On 1/12/22 19:11, Robert Hancock wrote:
> > > Updated macb DT binding documentation to reflect the phy-names, phys,
> > > resets, reset-names properties which are now used with ZynqMP GEM
> > > devices, and added a ZynqMP-specific DT example.
> > >
> > > Signed-off-by: Robert Hancock <robert.hancock@calian.com>

> > > --- a/Documentation/devicetree/bindings/net/macb.txt
> > > +++ b/Documentation/devicetree/bindings/net/macb.txt

> > Geert already converted this file to yaml that's why you should target this
> > version.
>
> Is that version in a tree somewhere that can be patched against?

It has just entered upstream, and will be part of v5.17-rc1:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=4e5b6de1f46d0ea0

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
Robert Hancock Jan. 13, 2022, 5:49 p.m. UTC | #4
On Thu, 2022-01-13 at 18:43 +0100, Geert Uytterhoeven wrote:
> Hi Robert,
> 
> On Thu, Jan 13, 2022 at 5:34 PM Robert Hancock
> <robert.hancock@calian.com> wrote:
> > On Thu, 2022-01-13 at 08:25 +0100, Michal Simek wrote:
> > > On 1/12/22 19:11, Robert Hancock wrote:
> > > > Updated macb DT binding documentation to reflect the phy-names, phys,
> > > > resets, reset-names properties which are now used with ZynqMP GEM
> > > > devices, and added a ZynqMP-specific DT example.
> > > > 
> > > > Signed-off-by: Robert Hancock <robert.hancock@calian.com>
> > > > --- a/Documentation/devicetree/bindings/net/macb.txt
> > > > +++ b/Documentation/devicetree/bindings/net/macb.txt
> > > Geert already converted this file to yaml that's why you should target
> > > this
> > > version.
> > 
> > Is that version in a tree somewhere that can be patched against?
> 
> It has just entered upstream, and will be part of v5.17-rc1:
> https://urldefense.com/v3/__https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=4e5b6de1f46d0ea0__;!!IOGos0k!yRbmcDEaC2OgoZAK9hyg-FUIkIcYg6JKqNF7y0Tyw-fbnXvKAIRsccN9K5iGDZkhTko$ 
> 

Ah, I see, it went in through the devicetree tree so it's not in net-next yet.
Should be able to pick that change up once the merge window closes and update
the patch accordingly.

> Gr{oetje,eeting}s,
> 
>                         Geert
> 
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- 
> geert@linux-m68k.org
> 
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like
> that.
>                                 -- Linus Torvalds
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/net/macb.txt b/Documentation/devicetree/bindings/net/macb.txt
index a1b06fd1962e..e526952145b8 100644
--- a/Documentation/devicetree/bindings/net/macb.txt
+++ b/Documentation/devicetree/bindings/net/macb.txt
@@ -29,6 +29,12 @@  Required properties:
 	Optional elements: 'rx_clk' applies to cdns,zynqmp-gem
 	Optional elements: 'tsu_clk'
 - clocks: Phandles to input clocks.
+- phy_names, phys: Required with ZynqMP SoC when in SGMII mode.
+                   phy_names should be "sgmii-phy" and phys should
+                   reference PS-GTR generic PHY device for this controller
+                   instance. See ZynqMP example below.
+- resets, reset-names: Recommended with ZynqMP, specify reset control for this
+		       controller instance with zynqmp-reset driver.
 
 Optional properties:
 - mdio: node containing PHY children. If this node is not present, then PHYs
@@ -58,3 +64,30 @@  Examples:
 			reset-gpios = <&pioE 6 1>;
 		};
 	};
+
+	gem1: ethernet@ff0c0000 {
+		compatible = "cdns,zynqmp-gem", "cdns,gem";
+		interrupt-parent = <&gic>;
+		interrupts = <0 59 4>, <0 59 4>;
+		reg = <0x0 0xff0c0000 0x0 0x1000>;
+		clocks = <&zynqmp_clk LPD_LSBUS>, <&zynqmp_clk GEM1_REF>,
+			 <&zynqmp_clk GEM1_TX>, <&zynqmp_clk GEM1_RX>,
+			 <&zynqmp_clk GEM_TSU>;
+		clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		#stream-id-cells = <1>;
+		iommus = <&smmu 0x875>;
+		power-domains = <&zynqmp_firmware PD_ETH_1>;
+		resets = <&zynqmp_reset ZYNQMP_RESET_GEM1>;
+		reset-names = "gem1_rst";
+		status = "okay";
+		phy-mode = "sgmii";
+		phy-names = "sgmii-phy";
+		phys = <&psgtr 1 PHY_TYPE_SGMII 1 1>;
+		fixed-link {
+			speed = <1000>;
+			full-duplex;
+			pause;
+		};
+	};