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[v2,17/17] MAINTAINERS: update riscv/microchip entry

Message ID 20211217093325.30612-18-conor.dooley@microchip.com
State New
Headers show
Series Update the Icicle Kit device tree | expand

Commit Message

Conor Dooley Dec. 17, 2021, 9:33 a.m. UTC
From: Conor Dooley <conor.dooley@microchip.com>

Update the RISC-V/Microchip entry by adding the microchip dts
directory and myself as maintainer

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
 MAINTAINERS | 2 ++
 1 file changed, 2 insertions(+)

Comments

Krzysztof Kozlowski Dec. 17, 2021, 3:09 p.m. UTC | #1
On 17/12/2021 10:33, conor.dooley@microchip.com wrote:
> From: Conor Dooley <conor.dooley@microchip.com>
> 
> Update the RISC-V/Microchip entry by adding the microchip dts
> directory and myself as maintainer
> 
> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> ---
>  MAINTAINERS | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 7a2345ce8521..3b1d6be7bd56 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -16348,8 +16348,10 @@ K:	riscv
>  
>  RISC-V/MICROCHIP POLARFIRE SOC SUPPORT
>  M:	Lewis Hanly <lewis.hanly@microchip.com>
> +M:	Conor Dooley <conor.dooley@microchip.com>
>  L:	linux-riscv@lists.infradead.org
>  S:	Supported
> +F:	arch/riscv/boot/dts/microchip/
>  F:	drivers/mailbox/mailbox-mpfs.c
>  F:	drivers/soc/microchip/
>  F:	include/soc/microchip/mpfs.h
> 

Good to have the DTS covered, so FWIW:
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>

You still should get Lewis' ack (unless he merges it)

Best regards,
Krzysztof
Conor Dooley Dec. 23, 2021, 2:56 p.m. UTC | #2
On 17/12/2021 15:09, Krzysztof Kozlowski wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> 
> On 17/12/2021 10:33, conor.dooley@microchip.com wrote:
>> From: Conor Dooley <conor.dooley@microchip.com>
>>
>> Update the RISC-V/Microchip entry by adding the microchip dts
>> directory and myself as maintainer
>>
>> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
>> ---
>>   MAINTAINERS | 2 ++
>>   1 file changed, 2 insertions(+)
>>
>> diff --git a/MAINTAINERS b/MAINTAINERS
>> index 7a2345ce8521..3b1d6be7bd56 100644
>> --- a/MAINTAINERS
>> +++ b/MAINTAINERS
>> @@ -16348,8 +16348,10 @@ K:   riscv
>>
>>   RISC-V/MICROCHIP POLARFIRE SOC SUPPORT
>>   M:   Lewis Hanly <lewis.hanly@microchip.com>
>> +M:   Conor Dooley <conor.dooley@microchip.com>
>>   L:   linux-riscv@lists.infradead.org
>>   S:   Supported
>> +F:   arch/riscv/boot/dts/microchip/
>>   F:   drivers/mailbox/mailbox-mpfs.c
>>   F:   drivers/soc/microchip/
>>   F:   include/soc/microchip/mpfs.h
>>
> 
> Good to have the DTS covered, so FWIW:
> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
> 
> You still should get Lewis' ack (unless he merges it)
Aye, it'll be an ack. We don't currently have a tree & would rather do 
this via risc-v than the at91/sam arm soc tree.
> 
> Best regards,
> Krzysztof
>
Palmer Dabbelt Dec. 23, 2021, 5:36 p.m. UTC | #3
On Thu, 23 Dec 2021 06:56:45 PST (-0800), Conor.Dooley@microchip.com wrote:
> On 17/12/2021 15:09, Krzysztof Kozlowski wrote:
>> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>> 
>> On 17/12/2021 10:33, conor.dooley@microchip.com wrote:
>>> From: Conor Dooley <conor.dooley@microchip.com>
>>>
>>> Update the RISC-V/Microchip entry by adding the microchip dts
>>> directory and myself as maintainer
>>>
>>> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
>>> ---
>>>   MAINTAINERS | 2 ++
>>>   1 file changed, 2 insertions(+)
>>>
>>> diff --git a/MAINTAINERS b/MAINTAINERS
>>> index 7a2345ce8521..3b1d6be7bd56 100644
>>> --- a/MAINTAINERS
>>> +++ b/MAINTAINERS
>>> @@ -16348,8 +16348,10 @@ K:   riscv
>>>
>>>   RISC-V/MICROCHIP POLARFIRE SOC SUPPORT
>>>   M:   Lewis Hanly <lewis.hanly@microchip.com>
>>> +M:   Conor Dooley <conor.dooley@microchip.com>
>>>   L:   linux-riscv@lists.infradead.org
>>>   S:   Supported
>>> +F:   arch/riscv/boot/dts/microchip/
>>>   F:   drivers/mailbox/mailbox-mpfs.c
>>>   F:   drivers/soc/microchip/
>>>   F:   include/soc/microchip/mpfs.h
>>>
>> 
>> Good to have the DTS covered, so FWIW:
>> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
>> 
>> You still should get Lewis' ack (unless he merges it)
> Aye, it'll be an ack. We don't currently have a tree & would rather do 
> this via risc-v than the at91/sam arm soc tree.

WFM.  I'll be awaiting the ack.  I don't see any fundamental issues from 
my end, as long is it's got all the acks/reviews then I'm generally fine 
with this sort of stuff.  I'll take a look before merging it, I'm kind 
of buried right now.  Sorry!

>> 
>> Best regards,
>> Krzysztof
>> 
>
Lewis.Hanly@microchip.com Jan. 12, 2022, 1:32 p.m. UTC | #4
On 17/12/2021 15:09, Krzysztof Kozlowski wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know 
> the content is safe
> 
> On 17/12/2021 10:33, conor.dooley@microchip.com wrote:
>> From: Conor Dooley <conor.dooley@microchip.com>
>>
>> Update the RISC-V/Microchip entry by adding the microchip dts 
>> directory and myself as maintainer
>>
>> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Lewis Hanly <lewis.hanly@microchip.com>
>> ---
>>   MAINTAINERS | 2 ++
>>   1 file changed, 2 insertions(+)
>>
>> diff --git a/MAINTAINERS b/MAINTAINERS index 
>> 7a2345ce8521..3b1d6be7bd56 100644
>> --- a/MAINTAINERS
>> +++ b/MAINTAINERS
>> @@ -16348,8 +16348,10 @@ K:   riscv
>>
>>   RISC-V/MICROCHIP POLARFIRE SOC SUPPORT
>>   M:   Lewis Hanly <lewis.hanly@microchip.com>
>> +M:   Conor Dooley <conor.dooley@microchip.com>
>>   L:   linux-riscv@lists.infradead.org
>>   S:   Supported
>> +F:   arch/riscv/boot/dts/microchip/
>>   F:   drivers/mailbox/mailbox-mpfs.c
>>   F:   drivers/soc/microchip/
>>   F:   include/soc/microchip/mpfs.h
>>
> 
> Good to have the DTS covered, so FWIW:
> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
> 
> You still should get Lewis' ack (unless he merges it)
Aye, it'll be an ack. We don't currently have a tree & would rather do this via risc-v than the at91/sam arm soc tree.
> 
> Best regards,
> Krzysztof
>
diff mbox series

Patch

diff --git a/MAINTAINERS b/MAINTAINERS
index 7a2345ce8521..3b1d6be7bd56 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -16348,8 +16348,10 @@  K:	riscv
 
 RISC-V/MICROCHIP POLARFIRE SOC SUPPORT
 M:	Lewis Hanly <lewis.hanly@microchip.com>
+M:	Conor Dooley <conor.dooley@microchip.com>
 L:	linux-riscv@lists.infradead.org
 S:	Supported
+F:	arch/riscv/boot/dts/microchip/
 F:	drivers/mailbox/mailbox-mpfs.c
 F:	drivers/soc/microchip/
 F:	include/soc/microchip/mpfs.h